| /rk3399_rockchip-uboot/board/birdland/bav335x/ |
| H A D | mux.c | 110 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
129 {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
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| /rk3399_rockchip-uboot/board/gumstix/pepper/ |
| H A D | mux.c | 50 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
|
| /rk3399_rockchip-uboot/board/ti/am335x/ |
| H A D | mux.c | 152 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
171 {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
260 {OFFSET(mii1_rxd3), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-am33xx/ |
| H A D | mux_am43xx.h | 109 int mii1_rxd3; member
|
| H A D | mux_am33xx.h | 116 int mii1_rxd3; member
|
| /rk3399_rockchip-uboot/board/silica/pengwyn/ |
| H A D | mux.c | 57 {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
|
| /rk3399_rockchip-uboot/board/compulab/cm_t335/ |
| H A D | mux.c | 64 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
|
| /rk3399_rockchip-uboot/board/tcl/sl50/ |
| H A D | mux.c | 103 {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
|
| /rk3399_rockchip-uboot/board/ti/am43xx/ |
| H A D | mux.c | 37 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
|
| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | am335x-bone-common.dtsi | 121 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
|
| H A D | am335x-pxm2.dtsi | 392 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
|
| H A D | am335x-evmsk.dts | 332 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
|
| H A D | am335x-evm.dts | 251 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
|
| /rk3399_rockchip-uboot/board/compulab/cm_t43/ |
| H A D | mux.c | 21 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE | PULLDOWN_EN},
|
| /rk3399_rockchip-uboot/board/BuR/brxre1/ |
| H A D | mux.c | 117 {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
|
| /rk3399_rockchip-uboot/board/siemens/pxm2/ |
| H A D | mux.c | 75 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
|
| /rk3399_rockchip-uboot/board/bosch/shc/ |
| H A D | mux.c | 188 {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE},
|
| /rk3399_rockchip-uboot/board/BuR/brppt1/ |
| H A D | mux.c | 91 {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
|
| /rk3399_rockchip-uboot/board/siemens/rut/ |
| H A D | mux.c | 150 {OFFSET(mii1_rxd3), (MODE(7) | RXACTIVE)},
|
| /rk3399_rockchip-uboot/board/siemens/draco/ |
| H A D | mux.c | 241 {OFFSET(mii1_rxd3), (MODE(1) | RXACTIVE)},
|