| /rk3399_rockchip-uboot/board/pb1x00/ |
| H A D | lowlevel_init.S | 27 li t0, MEM_STCFG1
28 li t1, 0x00000083
31 li t0, MEM_STTIME1
32 li t1, 0x33030A10
35 li t0, MEM_STADDR1
36 li t1, 0x11803E40
40 li t1, 0xBE00000C
46 li t1, 0xBE000014
55 li t0, AU1500_SYS_ADDR
56 li t1, 1
[all …]
|
| /rk3399_rockchip-uboot/board/dbau1x00/ |
| H A D | lowlevel_init.S | 27 li t0, MEM_STCFG2
28 li t1, 0x00000040
31 li t0, MEM_STTIME2
32 li t1, 0x22080a20
35 li t0, MEM_STADDR2
36 li t1, 0x10c03f00
39 li t0, MEM_STCFG1
40 li t1, 0x00000080
43 li t0, MEM_STTIME1
44 li t1, 0x22080a20
[all …]
|
| /rk3399_rockchip-uboot/arch/mips/mach-ath79/ar933x/ |
| H A D | lowlevel_init.S | 80 li t3, 0x03
82 li t0, CKSEG1ADDR(AR71XX_RESET_BASE)
88 li t2, 0xfffff7ff
96 li t2, 0x20
106 li t1, 0x02110E
111 li t0, CKSEG1ADDR(AR933X_RTC_BASE)
112 li t1, 0x03
118 li t1, 0x00
123 li t1, 0x01
136 li t0, CKSEG1ADDR(AR933X_SRIF_BASE)
[all …]
|
| /rk3399_rockchip-uboot/board/imgtec/malta/ |
| H A D | lowlevel_init.S | 39 li t1, MALTA_REVISION_CORID_CORE_LV
43 li t1, MALTA_REVISION_CORID_CORE_FPGA6
67 li t0, CPU_TO_GT32(0xdf000000)
74 li t0, CPU_TO_GT32(0xc0000000)
76 li t0, CPU_TO_GT32(0x40000000)
80 li t0, CPU_TO_GT32(0x80000000)
82 li t0, CPU_TO_GT32(0x3f000000)
85 li t0, CPU_TO_GT32(0xc1000000)
87 li t0, CPU_TO_GT32(0x5e000000)
99 li t1, 0x1 << MSC01_PBC_CLKCFG_SHF
[all …]
|
| /rk3399_rockchip-uboot/arch/nds32/include/asm/ |
| H A D | macro.h | 26 li $r4, \addr
27 li $r5, \data
32 li $r4, \addr
33 li $r5, \data
38 li $r4, \addr
39 li $r5, \data
49 li $r4, \addr
51 li $r6, \data
57 li $r4, \addr
72 li $r4, \time
|
| /rk3399_rockchip-uboot/arch/nds32/cpu/n1213/ag101/ |
| H A D | lowlevel_init.S | 83 li $r0, CONFIG_FTSDMC021_BASE
105 li $r0, SMC_BANK0_CR_A
110 li $r3, CONFIG_FTPMU010_BASE + BOARD_ID_REG
112 li $r4, BOARD_ID_FAMILY_MASK
114 li $r4, BOARD_ID_FAMILY_K7
120 li $r2, 0x00151151
125 li $r2, 0x00153153
200 li $r4, CONFIG_FTSDMC021_BASE
201 li $r5, 0x0
236 li $r5, AHBC_BSR6_A
[all …]
|
| H A D | watchdog.S | 20 li $p0, (CONFIG_FTWDT010_BASE+WD_CR) ! Get the addr of WD CR
23 li $r0, ~WD_ENABLE
|
| /rk3399_rockchip-uboot/arch/mips/mach-ath79/qca953x/ |
| H A D | lowlevel_init.S | 102 li t0, CKSEG1ADDR(AR71XX_RESET_BASE)
104 li t2, 0x08000000
109 li t2, 0xf7ffffff
115 li t0, CKSEG1ADDR(QCA953X_RTC_BASE)
116 li t1, 0x01
128 li t0, CKSEG1ADDR(QCA953X_SRIF_BASE)
129 li t1, MK_DPLL2(2, 16)
135 li t0, CKSEG1ADDR(AR71XX_PLL_BASE)
141 li t1, PLL_CPU_CONF_VAL
145 li t1, PLL_DDR_CONF_VAL
[all …]
|
| /rk3399_rockchip-uboot/arch/mips/lib/ |
| H A D | cache_init.S | 62 li \sz, 2
83 li $1, 32
159 li t2, 2
168 li t2, 64
175 li R_L2_BYPASSED, 1
201 li t1, 2
212 li t1, 64
229 li R_IC_SIZE, CONFIG_SYS_ICACHE_SIZE
230 li R_IC_LINE, CONFIG_SYS_ICACHE_LINE_SIZE
236 li R_DC_SIZE, CONFIG_SYS_DCACHE_SIZE
[all …]
|
| /rk3399_rockchip-uboot/arch/nds32/cpu/n1213/ |
| H A D | start.S | 116 li $r0, 0x0
124 li $r0, ~0x3
129 li $r0, 0x4
136 li $r0, 0x1
143 li $r0, 0x2
190 li $sp, CONFIG_SYS_INIT_SP_ADDR
198 li $r0, 0x00000000
249 li $r3, #0x2a /* R_NDS32_RELATIVE */
265 li $r2, 0x00000000 /* clear */
320 li $p1, 0x2 ! TLB MMU
[all …]
|
| /rk3399_rockchip-uboot/board/qemu-mips/ |
| H A D | lowlevel_init.S | 18 li t1, 0x00400000
25 li t1, 0x00000003
32 li t1, 0x00800000
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xx/ |
| H A D | start.S | 78 li r3, MSR_KERNEL /* Set ME, RI flags */
145 li r2, 0x0007
267 li r22,0
280 li r4,0
333 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
415 li r0,__got2_entries@sectoff@l
432 li r0,__fixup_entries@sectoff@l
457 li r0, 0
482 li r9, 0x100 /* reset vector always at 0x100 */
497 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
[all …]
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc86xx/ |
| H A D | cache.S | 75 li r5,CACHE_LINE_SIZE-1
102 li r5,CACHE_LINE_SIZE-1
126 li r4,4096/CACHE_LINE_SIZE /* Number of lines in a page */
149 li r4,4096/CACHE_LINE_SIZE /* Number of lines in a page */
164 li r0,4096/CACHE_LINE_SIZE
176 li r5, HID0_ICFI|HID0_ILOCK
194 li r5, 0
212 li r5, HID0_DCFI|HID0_DLOCK
228 li r5, HID0_DCFI|HID0_DLOCK
255 li r5, HID0_DCFI|HID0_DLOCK
[all …]
|
| H A D | start.S | 145 li r0, 0
230 li r0, 0 /* Make room for stack frame header and */
276 li r3, 0 /* clear boot_flag for calling board_init_f */
285 li r0, 0
503 li r22,0
516 li r4,0
663 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
741 li r0,__got2_entries@sectoff@l
758 li r0,__fixup_entries@sectoff@l
783 li r0, 0
[all …]
|
| H A D | release.S | 37 li r0, 0
102 li r5, HID0_DCFI|HID0_DLOCK
121 li r5, HID0_ICFI|HID0_ILOCK
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | release.S | 41 li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
61 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
66 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2
78 li r4,0x48
91 li r3,0
210 li r5,0x30
295 li r11,0
373 li r3,0
374 li r8,1
414 li r8,3
[all …]
|
| H A D | start.S | 80 li r1,MSR_DE
93 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
98 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2
104 li r27,0
107 1: li r27,1 /* Remember for later that we have the erratum */
112 li r4,0x48
170 li r0,2
226 li \scratch, 0
238 li \scratch, 0
255 li r4,CriticalInput@l
[all …]
|
| /rk3399_rockchip-uboot/arch/nds32/cpu/n1213/ae3xx/ |
| H A D | lowlevel_init.S | 77 li $r0, CONFIG_FTSDMC021_BASE
86 li $r0, SMC_BANK0_CR_A
92 li $r2, 0x00153153
115 li $r4, 0x00000000
116 li $r5, 0x80000000
|
| /rk3399_rockchip-uboot/scripts/ |
| H A D | cleanpatch | 19 my($li) = @_;
25 for ($i = 0; $i < length($li); $i++) {
26 $c = substr($li, $i, 1);
57 my($li) = @_;
62 for ($i = 0; $i < length($li); $i++) {
63 $c = substr($li,$i,1);
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/ |
| H A D | start.S | 260 li r0, 0
279 li r0, 0 /* Make room for stack frame header and */
299 li r3, 0 /* clear boot_flag for calling board_init_f */
440 li r22,0
452 li r4,0
491 li r3, MSR_KERNEL /* Set ME and RI flags */
512 li r4, 0x556C
514 li r4, -0x55C7
741 li r4, HID0_ICFI|HID0_ILOCK
770 li r5, HID0_DCFI|HID0_DLOCK
[all …]
|
| /rk3399_rockchip-uboot/net/ |
| H A D | sntp.h | 38 uchar li:2; member
40 uchar li:2;
|
| /rk3399_rockchip-uboot/arch/mips/cpu/ |
| H A D | start.S | 50 li t9, 15 # UHI exception operation
51 li a0, 0 # Use hard register context
56 li t0, -16
64 li t2, CONFIG_VAL(SYS_MALLOC_F_LEN)
193 li t1, 0x7 # Clear I, R and W conditions
|
| /rk3399_rockchip-uboot/arch/powerpc/lib/ |
| H A D | ppccache.S | 69 li r5,L1_CACHE_BYTES-1
93 li r5,L1_CACHE_BYTES-1
|
| /rk3399_rockchip-uboot/post/lib_powerpc/ |
| H A D | asm.S | 114 li r0, 0
144 li r0, 0
313 li r9,0
333 li r3,1
334 li r4,1
|
| /rk3399_rockchip-uboot/arch/mips/mach-pic32/ |
| H A D | lowlevel_init.S | 18 li t1, 0x00800000
|