| /rk3399_rockchip-uboot/board/freescale/c29xpcie/ |
| H A D | cpld.c | 31 reg11 = in_8(&cpld_data->flhcsr); in cpld_set_altbank() 72 printf("chipid1 = 0x%02x\n", in_8(&cpld_data->chipid1)); in cpld_dump_regs() 73 printf("chipid2 = 0x%02x\n", in_8(&cpld_data->chipid2)); in cpld_dump_regs() 74 printf("hwver = 0x%02x\n", in_8(&cpld_data->hwver)); in cpld_dump_regs() 75 printf("cpldver = 0x%02x\n", in_8(&cpld_data->cpldver)); in cpld_dump_regs() 76 printf("rstcon = 0x%02x\n", in_8(&cpld_data->rstcon)); in cpld_dump_regs() 77 printf("flhcsr = 0x%02x\n", in_8(&cpld_data->flhcsr)); in cpld_dump_regs() 78 printf("wdcsr = 0x%02x\n", in_8(&cpld_data->wdcsr)); in cpld_dump_regs() 79 printf("wdkick = 0x%02x\n", in_8(&cpld_data->wdkick)); in cpld_dump_regs() 80 printf("fancsr = 0x%02x\n", in_8(&cpld_data->fancsr)); in cpld_dump_regs() [all …]
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| /rk3399_rockchip-uboot/board/freescale/corenet_ds/ |
| H A D | corenet_ds.c | 37 in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); in checkboard() 39 sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); in checkboard() 61 sw = in_8(&PIXIS_SW(5)); in checkboard() 69 sw = in_8(&PIXIS_SW(9)); in checkboard() 74 sw = in_8(&PIXIS_SW(3)); in checkboard() 141 sw = in_8(&PIXIS_SW(5)); in misc_init_r() 165 sw = in_8(&PIXIS_SW(3)); in misc_init_r()
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| /rk3399_rockchip-uboot/board/freescale/mpc8641hpcn/ |
| H A D | mpc8641hpcn.c | 30 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard() 31 in_8(pixis_base + PIXIS_PVER)); in checkboard() 33 vboot = in_8(pixis_base + PIXIS_VBOOT); in checkboard() 176 go_bit = in_8(pixis_base + PIXIS_VCTL); in get_board_sys_clk() 179 rd_clks = in_8(pixis_base + PIXIS_VCFGEN0); in get_board_sys_clk() 190 i = in_8(pixis_base + PIXIS_AUX); in get_board_sys_clk() 192 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk() 194 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
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| /rk3399_rockchip-uboot/board/freescale/mpc8568mds/ |
| H A D | bcsr.c | 50 out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN); in reset_8568mds_uccs() 51 out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN); in reset_8568mds_uccs() 54 out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK | in reset_8568mds_uccs() 58 out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN); in reset_8568mds_uccs() 59 out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN); in reset_8568mds_uccs()
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| /rk3399_rockchip-uboot/board/freescale/common/ |
| H A D | ics307_clk.c | 135 in_8(&fpga_reg->sclk[0]), in get_board_sys_clk() 136 in_8(&fpga_reg->sclk[1]), in get_board_sys_clk() 137 in_8(&fpga_reg->sclk[2])); in get_board_sys_clk() 143 in_8(&fpga_reg->dclk[0]), in get_board_ddr_clk() 144 in_8(&fpga_reg->dclk[1]), in get_board_ddr_clk() 145 in_8(&fpga_reg->dclk[2])); in get_board_ddr_clk()
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| /rk3399_rockchip-uboot/board/freescale/mpc8544ds/ |
| H A D | mpc8544ds.c | 39 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard() 40 in_8(pixis_base + PIXIS_PVER)); in checkboard() 42 vboot = in_8(pixis_base + PIXIS_VBOOT); in checkboard() 183 go_bit = in_8(pixis_base + PIXIS_VCTL); in get_board_sys_clk() 186 rd_clks = in_8(pixis_base + PIXIS_VCFGEN0); in get_board_sys_clk() 197 i = in_8(pixis_base + PIXIS_AUX); in get_board_sys_clk() 199 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk() 201 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
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| /rk3399_rockchip-uboot/board/freescale/mpc8610hpcd/ |
| H A D | mpc8610hpcd.c | 46 tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); in misc_init_r() 50 version = in_8(pixis_base + PIXIS_PVER); in misc_init_r() 52 tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); in misc_init_r() 85 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard() 86 in_8(pixis_base + PIXIS_PVER)); in checkboard() 94 switch (in_8(pixis_base + PIXIS_VBOOT) & 0xC0) { in checkboard() 286 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
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| H A D | mpc8610hpcd_diu.c | 48 temp = in_8(&pixis->brdcfg0); in platform_diu_init() 61 if (in_8(&pixis->ver) == 1) /* Board version */ in platform_diu_init()
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| /rk3399_rockchip-uboot/board/freescale/ls1021atwr/ |
| H A D | ls1021atwr.c | 102 in_8(&cpld_data->cpld_ver) & VERSION_MASK, in cpld_show() 103 in_8(&cpld_data->cpld_ver_sub) & VERSION_MASK, in cpld_show() 104 in_8(&cpld_data->pcba_ver) & VERSION_MASK, in cpld_show() 105 in_8(&cpld_data->vbank) & BANK_MASK); in cpld_show() 109 in_8(&cpld_data->soft_mux_on)); in cpld_show() 111 in_8(&cpld_data->cfg_rcw_src1)); in cpld_show() 113 in_8(&cpld_data->cfg_rcw_src2)); in cpld_show() 115 in_8(&cpld_data->vbank)); in cpld_show() 117 in_8(&cpld_data->gpio)); in cpld_show() 119 in_8(&cpld_data->i2c3_ifc_mux)); in cpld_show() [all …]
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| /rk3399_rockchip-uboot/board/freescale/p1022ds/ |
| H A D | diu.c | 154 temp = in_8(&pixis->brdcfg1); in platform_diu_init() 187 px_brdcfg0 = in_8(lbc_lcs1_ba); in platform_diu_init() 189 in_8(lbc_lcs1_ba); in platform_diu_init() 227 in_8(lbc_lcs1_ba); in set_mux_to_lbc() 271 in_8(lbc_lcs1_ba); in set_mux_to_diu() 292 return in_8(lbc_lcs1_ba); in pixis_read() 296 return in_8(p + reg); in pixis_read() 316 in_8(lbc_lcs1_ba); in pixis_write()
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| H A D | p1022ds.c | 62 in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); in checkboard() 64 sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); in checkboard() 157 temp = in_8(&pixis->brdcfg1) & ~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK | in misc_init_r()
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| H A D | spl_minimal.c | 35 px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); in board_init_f()
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| /rk3399_rockchip-uboot/board/keymile/km83xx/ |
| H A D | km83xx_i2c.c | 40 in_8(&base->dr); in i2c_make_abort() 42 last = in_8(&base->dr); in i2c_make_abort() 52 last = in_8(&base->dr); in i2c_make_abort()
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| H A D | km83xx.c | 125 return in_8(&base->bprth) & PIGGY_PRESENT; in piggy_present() 249 tmp_reg = in_8(&base->res1[0]) | 0x10; /* DIRECT3 register */ in last_stage_init() 251 tmp_reg = in_8(&base->gprt3) | 0x10; /* GP28 to high */ in last_stage_init() 278 u8 dip_switch = in_8((u8 *)&(base->mswitch)) & BFTICU_DIPSWITCH_MASK; in last_stage_init() 389 int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG); in post_hotkeys_pressed()
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| /rk3399_rockchip-uboot/board/freescale/mpc8572ds/ |
| H A D | mpc8572ds.c | 34 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard() 35 in_8(pixis_base + PIXIS_PVER)); in checkboard() 37 vboot = in_8(pixis_base + PIXIS_VBOOT); in checkboard()
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| /rk3399_rockchip-uboot/board/keymile/kmp204x/ |
| H A D | qrio.c | 158 ctrlh = in_8(qrio_base + CTRLH_OFF); in qrio_set_leds() 172 ctrll = in_8(qrio_base + CTRLL_OFF); in qrio_enable_app_buffer() 184 reason1 = in_8(qrio_base + REASON1_OFF); in qrio_cpuwd_flag() 199 rstcfg = in_8(qrio_base + RSTCFG_OFF); in qrio_uprstreq()
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/ls102xa/ |
| H A D | ls102xa_psci.c | 176 tmp = in_8(qixis_base + QIXIS_CTL_SYS); in ls1_deep_sleep() 182 tmp = in_8(qixis_base + QIXIS_PWR_CTL2); in ls1_deep_sleep() 187 tmp = in_8(qixis_base + QIXIS_RST_FORCE_3); in ls1_deep_sleep() 214 tmp = in_8(qixis_base + QIXIS_CTL_SYS); in ls1_sleep()
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| /rk3399_rockchip-uboot/board/freescale/mpc8536ds/ |
| H A D | mpc8536ds.c | 57 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard() 58 in_8(pixis_base + PIXIS_PVER)); in checkboard() 60 vboot = in_8(pixis_base + PIXIS_VBOOT); in checkboard()
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| /rk3399_rockchip-uboot/drivers/mtd/nand/raw/ |
| H A D | kmeter1_nand.c | 15 #define read_mode() in_8(CONFIG_NAND_MODE_REG) 17 #define read_data() in_8(CONFIG_NAND_DATA_REG)
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| /rk3399_rockchip-uboot/board/freescale/p2041rdb/ |
| H A D | cpld.c | 25 return in_8(p + reg); in __cpld_read() 86 printf("SW[2] = 0x%02x\n", in_8(&CPLD_SW(2))); in cpld_dump_regs()
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| H A D | p2041rdb.c | 48 sw = in_8(&CPLD_SW(2)) >> 2; in checkboard() 175 sw = in_8(&CPLD_SW(2)) >> 2; in misc_init_r()
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| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf532x/ |
| H A D | speed.c | 75 return (FREF * in_8(&pll->pfdr)) / (BUSDIV * 4); in get_sys_clock() 160 mfd = in_8(&pll->pfdr); in clock_pll()
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| /rk3399_rockchip-uboot/arch/xtensa/include/asm/ |
| H A D | io.h | 90 # define in_8(addr) (*(u8 *)(addr)) macro 97 # define in_8(addr) (*(u8 *)(addr)) macro
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| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | io.h | 23 #define readb(addr) in_8((volatile u8 *)(addr)) 50 #define inb(port) in_8((u8 *)((port)+_IO_BASE)) 64 #define inb_p(port) in_8((u8 *)((port)+_IO_BASE)) 166 static inline u8 in_8(const volatile unsigned char __iomem *addr) in in_8() function
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| /rk3399_rockchip-uboot/board/freescale/t208xrdb/ |
| H A D | cpld.c | 17 return in_8(p + reg); in cpld_read()
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