xref: /rk3399_rockchip-uboot/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c (revision 326ea986ac150acdc7656d57fca647db80b50158)
1a877880cSYork Sun /*
2ba8e76bdSTimur Tabi  * Copyright 2007-2011 Freescale Semiconductor, Inc.
3ba8e76bdSTimur Tabi  * Authors: York Sun <yorksun@freescale.com>
4ba8e76bdSTimur Tabi  *          Timur Tabi <timur@freescale.com>
5a877880cSYork Sun  *
6a877880cSYork Sun  * FSL DIU Framebuffer driver
7a877880cSYork Sun  *
8*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
9a877880cSYork Sun  */
10a877880cSYork Sun 
11a877880cSYork Sun #include <common.h>
12a877880cSYork Sun #include <command.h>
13a877880cSYork Sun #include <asm/io.h>
149e70d137SAnatolij Gustschin #include <fsl_diu_fb.h>
15ba8e76bdSTimur Tabi #include "../common/pixis.h"
16ba8e76bdSTimur Tabi 
17ba8e76bdSTimur Tabi #define PX_BRDCFG0_DLINK	0x10
18ba8e76bdSTimur Tabi #define PX_BRDCFG0_DVISEL	0x08
19070ba561SYork Sun 
diu_set_pixel_clock(unsigned int pixclock)203b80c5f5SYork Sun void diu_set_pixel_clock(unsigned int pixclock)
213b80c5f5SYork Sun {
226d0f6bcfSJean-Christophe PLAGNIOL-VILLARD 	volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
233b80c5f5SYork Sun 	volatile ccsr_gur_t *gur = &immap->im_gur;
243b80c5f5SYork Sun 	volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
253b80c5f5SYork Sun 	unsigned long speed_ccb, temp, pixval;
263b80c5f5SYork Sun 
273b80c5f5SYork Sun 	speed_ccb = get_bus_freq(0);
283b80c5f5SYork Sun 	temp = 1000000000/pixclock;
293b80c5f5SYork Sun 	temp *= 1000;
303b80c5f5SYork Sun 	pixval = speed_ccb / temp;
313b80c5f5SYork Sun 	debug("DIU pixval = %lu\n", pixval);
323b80c5f5SYork Sun 
333b80c5f5SYork Sun 	/* Modify PXCLK in GUTS CLKDVDR */
343b80c5f5SYork Sun 	debug("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
353b80c5f5SYork Sun 	temp = *guts_clkdvdr & 0x2000FFFF;
363b80c5f5SYork Sun 	*guts_clkdvdr = temp;				/* turn off clock */
373b80c5f5SYork Sun 	*guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16);
383b80c5f5SYork Sun 	debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
393b80c5f5SYork Sun }
40a877880cSYork Sun 
platform_diu_init(unsigned int xres,unsigned int yres,const char * port)41ba8e76bdSTimur Tabi int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
42a877880cSYork Sun {
43ba8e76bdSTimur Tabi 	const char *name;
44ba8e76bdSTimur Tabi 	int gamma_fix = 0;
45ba8e76bdSTimur Tabi 	u32 pixel_format = 0x88883316;
46ba8e76bdSTimur Tabi 	u8 temp;
47a877880cSYork Sun 
48ba8e76bdSTimur Tabi 	temp = in_8(&pixis->brdcfg0);
49a877880cSYork Sun 
50ba8e76bdSTimur Tabi 	if (strncmp(port, "dlvds", 5) == 0) {
51ba8e76bdSTimur Tabi 		/* Dual link LVDS */
52a877880cSYork Sun 		gamma_fix = 1;
53ba8e76bdSTimur Tabi 		temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL);
54ba8e76bdSTimur Tabi 		name = "Dual-Link LVDS";
55ba8e76bdSTimur Tabi 	} else if (strncmp(port, "lvds", 4) == 0) {
56ba8e76bdSTimur Tabi 		/* Single link LVDS */
57ba8e76bdSTimur Tabi 		temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK;
58ba8e76bdSTimur Tabi 		name = "Single-Link LVDS";
59ba8e76bdSTimur Tabi 	} else {
60ba8e76bdSTimur Tabi 		/* DVI */
61ba8e76bdSTimur Tabi 		if (in_8(&pixis->ver) == 1)	/* Board version */
62a877880cSYork Sun 			pixel_format = 0x88882317;
63ba8e76bdSTimur Tabi 		temp |= PX_BRDCFG0_DVISEL;
64ba8e76bdSTimur Tabi 		name = "DVI";
65a877880cSYork Sun 	}
66a877880cSYork Sun 
67ba8e76bdSTimur Tabi 	printf("DIU:   Switching to %s monitor @ %ux%u\n", name, xres, yres);
68ba8e76bdSTimur Tabi 	out_8(&pixis->brdcfg0, temp);
69ba8e76bdSTimur Tabi 
703b4a2263STimur Tabi 	return fsl_diu_init(xres, yres, pixel_format, gamma_fix);
71a877880cSYork Sun }
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