Home
last modified time | relevance | path

Searched refs:cfg1 (Results 1 – 25 of 25) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/mach-imx/
H A Dboot_mode.h9 #define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \ argument
10 ((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1)
/rk3399_rockchip-uboot/drivers/net/
H A Dpic32_eth.c76 writel(EMAC_SOFTRESET, &emac_p->cfg1.set); /* reset assert */ in pic32_mii_init()
78 writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */ in pic32_mii_init()
173 writel(v, &emac_p->cfg1.raw); in pic32_mac_init()
220 writel(EMAC_SOFTRESET, &emac_p->cfg1.raw); in pic32_mac_reset()
224 writel(0, &emac_p->cfg1.raw); in pic32_mac_reset()
367 writel(EMAC_SOFTRESET, &emac_p->cfg1.raw); in pic32_eth_stop()
370 writel(0, &emac_p->cfg1.raw); in pic32_eth_stop()
H A Dpic32_eth.h42 struct pic32_reg_atomic cfg1; /* 0x200*/ member
/rk3399_rockchip-uboot/board/freescale/m5208evbe/
H A Dm5208evbe.c42 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/rk3399_rockchip-uboot/board/freescale/m53017evb/
H A Dm53017evb.c42 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/rk3399_rockchip-uboot/board/freescale/m5373evb/
H A Dm5373evb.c39 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/rk3399_rockchip-uboot/board/freescale/m5329evb/
H A Dm5329evb.c39 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/rk3399_rockchip-uboot/board/freescale/m547xevb/
H A Dm547xevb.c56 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/rk3399_rockchip-uboot/board/freescale/m548xevb/
H A Dm548xevb.c56 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/rk3399_rockchip-uboot/drivers/pci/
H A Dpcie_layerscape.h144 void __iomem *cfg1; member
H A Dpcie_layerscape.c262 return pcie->cfg1 + offset; in ls_pcie_conf_address()
553 pcie->cfg1 = pcie->cfg0 + fdt_resource_size(&pcie->cfg_res) / 2; in ls_pcie_probe()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-sunxi/
H A Dtve.h63 u32 cfg1; /* 0x138 */ member
/rk3399_rockchip-uboot/board/astro/mcf5373l/
H A Dmcf5373l.c51 __raw_writel(0x33211530, &sdp->cfg1); in dram_init()
/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A Dcpu.c97 uint32_t cfg1; member
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Ddram_sunxi_dw.c99 const u32 cfg1 = ((u32)bwl2 << 16) | (bwl1 & 0xffff); in mbus_configure_port() local
101 debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); in mbus_configure_port()
103 writel(cfg1, &mctl_com->mcr[port][1]); in mbus_configure_port()
/rk3399_rockchip-uboot/arch/m68k/include/asm/
H A Dimmap_520x.h169 u32 cfg1; /* 0x08 Cfg 1 */ member
H A Dimmap_547x_8x.h71 u32 cfg1; /* 0x08 */ member
H A Dimmap_5301x.h289 u32 cfg1; /* 0x08 Cfg 1 */ member
H A Dimmap_5329.h367 u32 cfg1; /* 0x08 Configuration register 1 */ member
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Dfsl_liodn.h222 offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
H A Dimmap_85xx.h2801 u32 cfg1; /* cfg register 1 */ member
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx25/
H A Dimx-regs.h57 u32 cfg1; /* configuration 1 */ member
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h525 u32 cfg1; member
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx7ulp/
H A Dimx-regs.h993 u32 cfg1; member
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx7/
H A Dimx-regs.h953 u32 cfg1; member