1*552a848eSStefano Babic /* 2*552a848eSStefano Babic * Copyright (C) 2012 Boundary Devices Inc. 3*552a848eSStefano Babic * 4*552a848eSStefano Babic * SPDX-License-Identifier: GPL-2.0+ 5*552a848eSStefano Babic */ 6*552a848eSStefano Babic 7*552a848eSStefano Babic #ifndef _ASM_BOOT_MODE_H 8*552a848eSStefano Babic #define _ASM_BOOT_MODE_H 9*552a848eSStefano Babic #define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \ 10*552a848eSStefano Babic ((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1) 11*552a848eSStefano Babic 12*552a848eSStefano Babic enum boot_device { 13*552a848eSStefano Babic WEIM_NOR_BOOT, 14*552a848eSStefano Babic ONE_NAND_BOOT, 15*552a848eSStefano Babic PATA_BOOT, 16*552a848eSStefano Babic SATA_BOOT, 17*552a848eSStefano Babic I2C_BOOT, 18*552a848eSStefano Babic SPI_NOR_BOOT, 19*552a848eSStefano Babic SD1_BOOT, 20*552a848eSStefano Babic SD2_BOOT, 21*552a848eSStefano Babic SD3_BOOT, 22*552a848eSStefano Babic SD4_BOOT, 23*552a848eSStefano Babic MMC1_BOOT, 24*552a848eSStefano Babic MMC2_BOOT, 25*552a848eSStefano Babic MMC3_BOOT, 26*552a848eSStefano Babic MMC4_BOOT, 27*552a848eSStefano Babic NAND_BOOT, 28*552a848eSStefano Babic QSPI_BOOT, 29*552a848eSStefano Babic UNKNOWN_BOOT, 30*552a848eSStefano Babic BOOT_DEV_NUM = UNKNOWN_BOOT, 31*552a848eSStefano Babic }; 32*552a848eSStefano Babic 33*552a848eSStefano Babic struct boot_mode { 34*552a848eSStefano Babic const char *name; 35*552a848eSStefano Babic unsigned cfg_val; 36*552a848eSStefano Babic }; 37*552a848eSStefano Babic 38*552a848eSStefano Babic void add_board_boot_modes(const struct boot_mode *p); 39*552a848eSStefano Babic void boot_mode_apply(unsigned cfg_val); 40*552a848eSStefano Babic extern const struct boot_mode soc_boot_modes[]; 41*552a848eSStefano Babic #endif 42