xref: /rk3399_rockchip-uboot/board/freescale/m5329evb/m5329evb.c (revision f1683aa73c31db0a025e0254e6ce1ee7e56aad3e)
18e585f02STsiChung Liew /*
28e585f02STsiChung Liew  * (C) Copyright 2000-2003
38e585f02STsiChung Liew  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
48e585f02STsiChung Liew  *
5aa0d99fcSAlison Wang  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
68e585f02STsiChung Liew  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
78e585f02STsiChung Liew  *
81a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
98e585f02STsiChung Liew  */
108e585f02STsiChung Liew 
118e585f02STsiChung Liew #include <config.h>
12427c8141STsiChungLiew #include <common.h>
13427c8141STsiChungLiew #include <asm/immap.h>
14aa0d99fcSAlison Wang #include <asm/io.h>
158e585f02STsiChung Liew 
168e585f02STsiChung Liew DECLARE_GLOBAL_DATA_PTR;
178e585f02STsiChung Liew 
checkboard(void)188e585f02STsiChung Liew int checkboard(void)
198e585f02STsiChung Liew {
208e585f02STsiChung Liew 	puts("Board: ");
218e585f02STsiChung Liew 	puts("Freescale FireEngine 5329 EVB\n");
228e585f02STsiChung Liew 	return 0;
238e585f02STsiChung Liew };
248e585f02STsiChung Liew 
dram_init(void)25*f1683aa7SSimon Glass int dram_init(void)
268e585f02STsiChung Liew {
27aa0d99fcSAlison Wang 	sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
288e585f02STsiChung Liew 	u32 dramsize, i;
298e585f02STsiChung Liew 
306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD 	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
318e585f02STsiChung Liew 
328e585f02STsiChung Liew 	for (i = 0x13; i < 0x20; i++) {
338e585f02STsiChung Liew 		if (dramsize == (1 << i))
348e585f02STsiChung Liew 			break;
358e585f02STsiChung Liew 	}
368e585f02STsiChung Liew 	i--;
378e585f02STsiChung Liew 
38aa0d99fcSAlison Wang 	out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
39aa0d99fcSAlison Wang 	out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
40aa0d99fcSAlison Wang 	out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
418e585f02STsiChung Liew 
428e585f02STsiChung Liew 	/* Issue PALL */
43aa0d99fcSAlison Wang 	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
448e585f02STsiChung Liew 
458e585f02STsiChung Liew 	/* Issue LEMR */
46aa0d99fcSAlison Wang 	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
47aa0d99fcSAlison Wang 	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
488e585f02STsiChung Liew 
498e585f02STsiChung Liew 	udelay(500);
508e585f02STsiChung Liew 
518e585f02STsiChung Liew 	/* Issue PALL */
52aa0d99fcSAlison Wang 	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
538e585f02STsiChung Liew 
548e585f02STsiChung Liew 	/* Perform two refresh cycles */
55aa0d99fcSAlison Wang 	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
56aa0d99fcSAlison Wang 	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
578e585f02STsiChung Liew 
58aa0d99fcSAlison Wang 	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
598e585f02STsiChung Liew 
60aa0d99fcSAlison Wang 	out_be32(&sdram->ctrl,
61aa0d99fcSAlison Wang 		(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
628e585f02STsiChung Liew 
638e585f02STsiChung Liew 	udelay(100);
648e585f02STsiChung Liew 
65088454cdSSimon Glass 	gd->ram_size = dramsize;
66088454cdSSimon Glass 
67088454cdSSimon Glass 	return 0;
688e585f02STsiChung Liew };
698e585f02STsiChung Liew 
testdram(void)708e585f02STsiChung Liew int testdram(void)
718e585f02STsiChung Liew {
728e585f02STsiChung Liew 	/* TODO: XXX XXX XXX */
738e585f02STsiChung Liew 	printf("DRAM test not implemented!\n");
748e585f02STsiChung Liew 
758e585f02STsiChung Liew 	return (0);
768e585f02STsiChung Liew }
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