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/rk3399_rockchip-uboot/board/freescale/m54418twr/
H A Dsbf_dram_init.S13 move.l #0xFC04002D, %a1
14 move.b #46, (%a1) /* DDR */
17 move.l #0xEC094060, %a1
18 move.b #0, (%a1)
21 move.l #0xEC09001A, %a1
22 move.w #0xE01D, (%a1)
25 move.l #0xFC0B8180, %a1
26 move.l #0x00000000, (%a1)
27 move.l #0x40000000, (%a1)
29 move.l #0xFC0B81AC, %a1
[all …]
/rk3399_rockchip-uboot/board/sysam/stmark2/
H A Dsbf_dram_init.S26 move.l #PPMCR0, %a1
27 move.b #46, (%a1)
30 move.l #MSCR_SDRAMC, %a1
31 move.b #1, (%a1)
49 move.l #MISCCR2, %a1
50 move.w #0xa01d, (%a1)
53 move.l #DDR_RCR, %a1
54 move.l #0x00000000, (%a1)
55 move.l #0x40000000, (%a1)
61 move.l #DDR_PADCR, %a1
[all …]
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf5445x/
H A Dstart.S145 move.l #(ICACHE_STATUS), %a1 /* icache */
147 move.l %d0, (%a1)
164 move.l #0xFC008000, %a1
165 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
166 move.l #0xFC008008, %a1
167 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
168 move.l #0xFC008004, %a1
169 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
176 move.l #0xFC04002D, %a1
179 move.b #23, (%a1) /* dspi */
[all …]
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf523x/
H A Dstart.S112 move.l #(ICACHE_STATUS), %a1 /* icache */
114 move.l %d0, (%a1)
128 move.l #board_init_f_alloc_reserve, %a1
129 jsr (%a1)
137 move.l #board_init_f_init_reserve, %a1
138 jsr (%a1)
141 move.l #cpu_init_f, %a1
142 jsr (%a1)
146 move.l #board_init_f, %a1
147 jsr (%a1)
[all …]
/rk3399_rockchip-uboot/arch/xtensa/cpu/
H A Dstart.S293 mov a1, a2
383 addi a1, a1, -16 - 4 # create a small stack frame
384 s32i a3, a1, 0 # and save a3 (a2 still in excsave1)
392 1: addi a2, a1, - PT_SIZE - 16
394 s32i a1, a2, PT_AREG + 1 * 4
398 mov a1, a2
402 s32i a4, a1, PT_AREG + 4 * 4
403 s32i a5, a1, PT_AREG + 5 * 4
404 s32i a6, a1, PT_AREG + 6 * 4
405 s32i a7, a1, PT_AREG + 7 * 4
[all …]
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf5227x/
H A Dstart.S116 move.l #0xFC008000, %a1
117 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
118 move.l #0xFC008008, %a1
119 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
120 move.l #0xFC008004, %a1
121 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
127 move.l #0xFC0A4074, %a1
128 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
132 move.l #0xFC0B8110, %a1
149 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
[all …]
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf532x/
H A Dstart.S127 move.l #(ICACHE_STATUS), %a1 /* icache */
129 move.l %d0, (%a1)
143 move.l #board_init_f_alloc_reserve, %a1
144 jsr (%a1)
152 move.l #board_init_f_init_reserve, %a1
153 jsr (%a1)
156 move.l #cpu_init_f, %a1
157 jsr (%a1)
161 move.l #board_init_f, %a1
162 jsr (%a1)
[all …]
/rk3399_rockchip-uboot/board/freescale/m54455evb/
H A Dsbf_dram_init.S17 move.l #0xFC0A4074, %a1
18 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
22 move.l #0xFC0B8110, %a1
41 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
42 or.l %d1, (%a1)
50 move.l #0xFC0B8008, %a1
51 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
57 move.l #0xFC0B8000, %a1 /* Mode */
65 move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
67 move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
[all …]
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf52x2/
H A Dstart.S141 move.l #(_flashbar_setup_end-CONFIG_SYS_INT_FLASH_BASE), %a1
145 cmp.l %a0, %a1
191 move.l #(ICACHE_STATUS), %a1 /* icache */
193 move.l %d0, (%a1)
207 move.l #board_init_f_alloc_reserve, %a1
208 jsr (%a1)
216 move.l #board_init_f_init_reserve, %a1
217 jsr (%a1)
220 move.l #cpu_init_f, %a1
221 jsr (%a1)
[all …]
/rk3399_rockchip-uboot/board/freescale/m54451evb/
H A Dsbf_dram_init.S17 move.l #0xFC0A4074, %a1
18 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
22 move.l #0xFC0B8110, %a1
41 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
42 or.l %d1, (%a1)
50 move.l #0xFC0B8008, %a1
51 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
57 move.l #0xFC0B8000, %a1 /* Mode */
79 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
81 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
/rk3399_rockchip-uboot/arch/arm/lib/
H A Dsetjmp.S19 stm a1, {v1-v8, ip, lr}
20 mov a1, #0
27 ldm a1, {v1-v8, ip, lr}
29 mov a1, a2
31 cmp a1, #0
33 mov a1, #1
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf547x_8x/
H A Dstart.S119 move.l #(ICACHE_STATUS), %a1 /* icache */
121 move.l %d0, (%a1)
175 move.l #CONFIG_SYS_MONITOR_BASE, %a1
181 move.l (%a1)+, (%a3)+
182 cmp.l %a1,%a2
189 move.l %a0, %a1
190 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
191 jmp (%a1)
199 move.l %a0, %a1
200 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
[all …]
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf530x/
H A Dstart.S121 move.l #(ICACHE_STATUS), %a1 /* icache */
123 move.l %d0, (%a1)
172 move.l #CONFIG_SYS_MONITOR_BASE, %a1
177 move.l (%a1)+, (%a3)+
178 cmp.l %a1,%a2
185 move.l %a0, %a1
186 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
187 jmp (%a1)
195 move.l %a0, %a1
196 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE), %a1
[all …]
/rk3399_rockchip-uboot/fs/zfs/
H A Dzfs_fletcher.c41 uint64_t a0, b0, a1, b1; in fletcher_2_endian() local
43 for (a0 = b0 = a1 = b1 = 0; ip < ipend; ip += 2) { in fletcher_2_endian()
45 a1 += zfs_to_cpu64(ip[1], endian); in fletcher_2_endian()
47 b1 += a1; in fletcher_2_endian()
51 zcp->zc_word[1] = cpu_to_zfs64(a1, endian); in fletcher_2_endian()
/rk3399_rockchip-uboot/post/lib_powerpc/
H A Dcomplex.c23 extern int cpu_post_complex_1_asm (int a1, int a2, int a3, int a4, int n);
33 int a1 = 666; in cpu_post_test_complex_1() local
40 if (cpu_post_complex_1_asm(a1, a2, a3, a4, n) != n * result) in cpu_post_test_complex_1()
/rk3399_rockchip-uboot/include/linux/
H A Darm-smccc.h65 unsigned long a1; member
95 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
112 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
/rk3399_rockchip-uboot/drivers/ram/rockchip/
H A Drockchip_dmc.c740 printf("current ATF version 0x%lx!\n", res.a1); in rk3328_devfreq_init()
741 if (res.a0 || res.a1 < 0x101) { in rk3328_devfreq_init()
746 printf("read tf version 0x%lx!\n", res.a1); in rk3328_devfreq_init()
759 ddr_psci_param = (struct share_params *)res.a1; in rk3328_devfreq_init()
783 printf("current ATF version 0x%lx!\n", res.a1); in px30_devfreq_init()
784 if (res.a0 || res.a1 < 0x103) { in px30_devfreq_init()
789 printf("read tf version 0x%lx!\n", res.a1); in px30_devfreq_init()
803 ddr_psci_param = (struct share_params *)res.a1; in px30_devfreq_init()
846 return res.a1; in rockchip_ddrclk_sip_recalc_rate_v2()
865 return res.a1; in rockchip_ddrclk_sip_round_rate_v2()
H A Ddmc_fsp.c355 return res.a1; in get_atf_version()
454 p = (int *)(res.a1); in dmc_fsp_probe()
460 p = (int *)(res.a1 + DTS_PAR_OFFSET / 4); in dmc_fsp_probe()
504 flush_cache((unsigned long)(res.a1), (DIV_ROUND_UP(size, 4096) + 1) * 0x1000); in dmc_fsp_probe()
/rk3399_rockchip-uboot/cmd/ddr_tool/stressapptest/
H A Dstressapptest.c466 u64 a1 = 1; in pattern_adler_sum_calc() local
472 a1 += (u64)pattern_get(pattern, i++); in pattern_adler_sum_calc()
473 b1 += a1; in pattern_adler_sum_calc()
474 a1 += pattern_get(pattern, i++); in pattern_adler_sum_calc()
475 b1 += a1; in pattern_adler_sum_calc()
483 pattern->adler_sum.a1 = a1; in pattern_adler_sum_calc()
750 adler_sum.a1 += dst_mem[i++]; in block_inv_check()
751 adler_sum.b1 += adler_sum.a1; in block_inv_check()
752 adler_sum.a1 += dst_mem[i++]; in block_inv_check()
753 adler_sum.b1 += adler_sum.a1; in block_inv_check()
[all …]
H A Dstressapptest.h46 u64 a1; member
/rk3399_rockchip-uboot/drivers/misc/
H A Drockchip-efuse.c196 sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 & in rockchip_rk3368_efuse_read()
200 sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 | in rockchip_rk3368_efuse_read()
207 res.a1 | RK3288_STROBE); in rockchip_rk3368_efuse_read()
211 *buffer++ = res.a1; in rockchip_rk3368_efuse_read()
215 res.a1 & (~RK3288_STROBE)); in rockchip_rk3368_efuse_read()
334 sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 & in rockchip_rk3288_efuse_secure_read()
338 sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 | in rockchip_rk3288_efuse_secure_read()
345 res.a1 | RK3288_STROBE); in rockchip_rk3288_efuse_secure_read()
349 *buffer++ = res.a1; in rockchip_rk3288_efuse_secure_read()
353 res.a1 & (~RK3288_STROBE)); in rockchip_rk3288_efuse_secure_read()
H A Drockchip_pm_config.c100 memset((void *)res.a1, 0, sizeof(struct rk_mcu_sleep_tags)); in parse_mcu_sleep_config()
101 config = (struct rk_mcu_sleep_tags *)res.a1; in parse_mcu_sleep_config()
/rk3399_rockchip-uboot/arch/mips/include/asm/
H A Dregdef.h25 #define a1 $5 macro
68 #define a1 $5 macro
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Drockchip_smccc.c95 *val = res.a1; in sip_smc_access_mem_os_reg()
126 share_mem_phy = res.a1; in sip_smc_request_share_mem()
127 res.a1 = (unsigned long)ioremap(share_mem_phy, SIZE_PAGE(page_num)); in sip_smc_request_share_mem()
/rk3399_rockchip-uboot/arch/m68k/include/asm/
H A Dptrace.h24 ulong a1; member

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