Searched refs:DPLL_MODE_MASK (Results 1 – 12 of 12) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rk3188.h | 183 DPLL_MODE_MASK = 3, enumerator
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| H A D | cru_rk3066.h | 173 DPLL_MODE_MASK = 3 << DPLL_MODE_SHIFT, enumerator
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| H A D | cru_rk3036.h | 107 DPLL_MODE_MASK = 1 << DPLL_MODE_SHIFT, enumerator
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| H A D | cru_rk3288.h | 247 DPLL_MODE_MASK = CRU_MODE_MASK << DPLL_MODE_SHIFT, enumerator
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| H A D | cru_px30.h | 169 DPLL_MODE_MASK = 3 << DPLL_MODE_SHIFT, enumerator
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| H A D | cru_rk3308.h | 142 DPLL_MODE_MASK = 3 << DPLL_MODE_SHIFT, enumerator
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| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 332 rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK, in rkdclk_init()
351 rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK, in rkdclk_init()
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3066.c | 171 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rkclk_configure_ddr()
181 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rkclk_configure_ddr()
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| H A D | clk_rk3188.c | 169 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK << DPLL_MODE_SHIFT, in rkclk_configure_ddr()
179 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK << DPLL_MODE_SHIFT, in rkclk_configure_ddr()
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| H A D | clk_rk3036.c | 213 0xffffffff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xffffffff, in rkclk_pll_get_rate()
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| H A D | clk_rk3288.c | 332 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rkclk_configure_ddr()
342 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rkclk_configure_ddr()
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| H A D | clk_px30.c | 98 APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
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