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Searched refs:vco (Results 1 – 15 of 15) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/apusys/
H A Dapupll.c240 uint32_t vco, postdiv_val = 1, postdiv_reg = 0; in _cal_pll_data() local
243 vco = freq; in _cal_pll_data()
246 while (vco <= FREQ_VCO_MIN) { in _cal_pll_data()
249 vco = vco << 1; in _cal_pll_data()
252 pcw_val = vco * (1 << PCW_FRACTIONAL_SHIFT); in _cal_pll_data()
/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp13.c74 struct stm32_pll_vco vco; member
1195 struct stm32_pll_vco *vco, in clk_stm32_pll_compute_cfgr1() argument
1198 uint32_t divm = vco->div_mn[PLL_CFG_M]; in clk_stm32_pll_compute_cfgr1()
1199 uint32_t divn = vco->div_mn[PLL_CFG_N]; in clk_stm32_pll_compute_cfgr1()
1236 struct stm32_pll_vco *vco) in clk_stm32_pll_config_vco() argument
1241 if (clk_stm32_pll_compute_cfgr1(priv, pll, vco, &value) != 0) { in clk_stm32_pll_config_vco()
1253 mmio_write_32(pll_base + RCC_OFFSET_PLLXFRACR, vco->frac << RCC_PLLNFRACR_FRACV_SHIFT); in clk_stm32_pll_config_vco()
1259 struct stm32_pll_vco *vco) in clk_stm32_pll_config_csg() argument
1267 if (!vco->csg_enabled) { in clk_stm32_pll_config_csg()
1271 mod_per = vco->csg[PLL_CSG_MOD_PER]; in clk_stm32_pll_config_csg()
[all …]
H A Dstm32mp1_clk.c1977 unsigned long long vco; in clk_compute_pll1_settings() local
1983 vco = (post_divm * (divn + 1U)) + ((post_divm * frac) / FRAC_MAX); in clk_compute_pll1_settings()
1985 if ((vco < (VCO_MIN / 2U)) || (vco > (VCO_MAX / 2U))) { in clk_compute_pll1_settings()
1990 freq = vco / (divp + 1U); in clk_compute_pll1_settings()
/rk3399_ARM-atf/fdts/
H A Dstm32mp151a-prtt1a.dts129 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
135 pll3_vco_417Mhz: pll3-vco-417Mhz {
141 pll4_vco_480Mhz: pll4-vco-480Mhz {
H A Dstm32mp153c-lxa-fairytux2.dts130 pll3_vco_624Mhz: pll3-vco-624Mhz {
135 pll4_vco_750Mhz: pll4-vco-750Mhz {
H A Dstm32mp157c-lxa-tac.dts130 pll3_vco_624Mhz: pll3-vco-624Mhz {
135 pll4_vco_750Mhz: pll4-vco-750Mhz {
H A Dstm32mp15xx-osd32.dtsi243 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
249 pll3_vco_417Mhz: pll3-vco-417Mhz {
255 pll4_vco_594Mhz: pll4-vco-594Mhz {
H A Dstm32mp157a-avenger96.dts233 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
239 pll3_vco_417Mhz: pll3-vco-417Mhz {
245 pll4_vco_480Mhz: pll4-vco-480Mhz {
H A Dstm32mp15xx-dkx.dtsi222 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
228 pll3_vco_417Mhz: pll3-vco-417Mhz {
234 pll4_vco_594Mhz: pll4-vco-594Mhz {
H A Dstm32mp135f-dk.dts217 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
223 pll3_vco_417Mhz: pll3-vco-417Mhz {
229 pll4_vco_600Mhz: pll4-vco-600Mhz {
H A Dstm32mp157c-ed1.dts220 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
226 pll3_vco_417Mhz: pll3-vco-417Mhz {
232 pll4_vco_594Mhz: pll4-vco-594Mhz {
H A Dstm32mp15xx-dhcor-som.dtsi246 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
252 pll3_vco_417Mhz: pll3-vco-417Mhz {
258 pll4_vco_594Mhz: pll4-vco-594Mhz {
H A Dstm32mp15xx-dhcom-som.dtsi251 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
257 pll3_vco_417Mhz: pll3-vco-417Mhz {
263 pll4_vco_600Mhz: pll4-vco-600hz {
H A Dstm32mp157c-odyssey-som.dtsi265 pll2_vco_1066Mhz: pll2-vco-1066Mhz {
271 pll3_vco_417Mhz: pll3-vco-417Mhz {
277 pll4_vco_594Mhz: pll4-vco-594Mhz {
/rk3399_ARM-atf/drivers/nxp/clk/s32cc/
H A Ds32cc_clk_drv.c213 unsigned long vco; in get_pll_mfi_mfn() local
232 vco = ((unsigned long)*mfn * FP_PRECISION) / 18432UL; in get_pll_mfi_mfn()
233 vco += (unsigned long)*mfi * FP_PRECISION; in get_pll_mfi_mfn()
234 vco *= ref_freq; in get_pll_mfi_mfn()
235 vco /= FP_PRECISION; in get_pll_mfi_mfn()
237 if (vco != pll_vco) { in get_pll_mfi_mfn()
239 pll_vco, vco); in get_pll_mfi_mfn()