Merge changes from topic "st_clk_update" into integration

* changes:
feat(st-clock): use early traces
fix(st-clock): adapt order of CSS on LSE and HSE
refactor(st-clock): remove unused struct

Merge changes from topic "st_clk_update" into integration

* changes:
feat(st-clock): use early traces
fix(st-clock): adapt order of CSS on LSE and HSE
refactor(st-clock): remove unused struct
feat(stm32mp1-fdts): remove RTC clock configuration
refactor(st-clock): move stm32mp1_clk_rcc_regs_*lock
refactor(st-clock): driver size optimization
refactor(st-clock): remove BL32 support on STM32MP13
feat(st-clock): don't gate/ungate an oscillator if it is not wired
feat(dt-bindings): add missing SPIx bus clocks
feat(stm32mp1-fdts): remove PLL1 settings
feat(st-clock): update with new bindings
feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
feat(dt-bindings): new RCC DT bindings
feat(stm32mp1): always boot at 650MHz
refactor(st-clock): remove LSEDRV_MEDIUM_HIGH for STM32MP13
fix(st-clock): display proper PLL number for STM32MP13
fix(st-clock): do not reconfigure LSE
feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
refactor(st-clock): remove unused clk function in API
refactor(st-clock): support deactivated STGEN in stm32mp_stgen_config
feat(st-clock): add function to restore generic timer rate

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feat(st-clock): use early traces

Replace trace macros with their corresponding EARLY_* macros.

Change-Id: I39b163964fa3129be38e58352b5dee9b4081675b
Signed-off-by: Yann Gautier <yann.gautier@foss.st

feat(st-clock): use early traces

Replace trace macros with their corresponding EARLY_* macros.

Change-Id: I39b163964fa3129be38e58352b5dee9b4081675b
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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fix(st-clock): adapt order of CSS on LSE and HSE

Fix the activation order of the CSS to prevent a faulty halt, according
to the reference manual (RM0442 Rev 6, Chapter: 10.4.3 Clock security
system

fix(st-clock): adapt order of CSS on LSE and HSE

Fix the activation order of the CSS to prevent a faulty halt, according
to the reference manual (RM0442 Rev 6, Chapter: 10.4.3 Clock security
system CSS) it must be done after selecting the LSE clock via the RTCSRC
field.
For the HSE clock, this can be activated even when HSEON is '0'.

Signed-off-by: Christoph Fritz <chf@fritzc.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Ied01baac1ccc63dcef78bf5f9180bb8628cce2d0

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feat(st-clock): update with new bindings

Code alignment with MP13 driver.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Ifb0597721a865f463cf41c5cd7be3ca75a1da80c

feat(stm32mp1): always boot at 650MHz

Switching to higher CPU frequencies requires a dedicated chip version
(STM32MP1xxD or STM32MP1xxF), and increase CPU voltage. To avoid
re-configuring I2C and PM

feat(stm32mp1): always boot at 650MHz

Switching to higher CPU frequencies requires a dedicated chip version
(STM32MP1xxD or STM32MP1xxF), and increase CPU voltage. To avoid
re-configuring I2C and PMIC before and after applying clock tree,
always boot at 650MHz, which is the frequency for nominal voltage.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id05a3ee17e7dd57e2d64dc06f8f1e7f9cb21e110

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fix(st-clock): do not reconfigure LSE

If LSE oscillator is already ON, which is the case when returning from
low-power state or if we are on VBAT, it mustn't be reconfigured.

Signed-off-by: Yann Ga

fix(st-clock): do not reconfigure LSE

If LSE oscillator is already ON, which is the case when returning from
low-power state or if we are on VBAT, it mustn't be reconfigured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ie75f2b0b42aeb3d95e2266e1fca811a2f2b3e29f

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Merge changes from topic "st_mckprot_bl32" into integration

* changes:
refactor(stm32mp1): move the MCU security to BL32
feat(st-clock): add function to control MCU subsystem

feat(st-clock): add function to control MCU subsystem

Add a new function to control the MCU subsystem
security state.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I070eec06fc93a

feat(st-clock): add function to control MCU subsystem

Add a new function to control the MCU subsystem
security state.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I070eec06fc93a1214227f25a6a4f1c40c66c86b0

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Merge changes I1bfa797e,I0ec7a70e into integration

* changes:
fix(tree): correct some typos
fix(rockchip): use semicolon instead of comma

fix(tree): correct some typos

found using codespell (https://github.com/codespell-project/codespell).

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6

fix(tree): correct some typos

found using codespell (https://github.com/codespell-project/codespell).

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373

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Merge changes from topic "st-clk-cleanup" into integration

* changes:
refactor(st-clock): code size optimization
refactor(st-clock): remove unused PLL field

refactor(st-clock): remove unused PLL field

The divn_max field is unused, remove it.

Change-Id: I971912bcc035f16963d98dfa88782c8aed4415f2
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st

refactor(st-clock): remove unused PLL field

The divn_max field is unused, remove it.

Change-Id: I971912bcc035f16963d98dfa88782c8aed4415f2
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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Merge "fix(st-clock): initialize pllcfg table" into integration

fix(st-clock): initialize pllcfg table

The issue was found by Coverity:
CID 376582: (UNINIT)
Using uninitialized value "*pllcfg[_PLL4]" when calling
"stm32mp1_check_pll_conf".
CID 376582:

fix(st-clock): initialize pllcfg table

The issue was found by Coverity:
CID 376582: (UNINIT)
Using uninitialized value "*pllcfg[_PLL4]" when calling
"stm32mp1_check_pll_conf".
CID 376582: (UNINIT)
Using uninitialized value "*pllcfg[_PLL3]" when calling
"stm32mp1_check_pll_conf".

Check PLL configs are valid before using pllcfg.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I49de849eaf451d0c165a8eb8555112a0a4140bbc

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Merge changes from topic "st-fix-enum" into integration

* changes:
fix(stm32mp1): fix enum prints
fix(st-clock): print enums as unsigned

fix(st-clock): print enums as unsigned

With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. Change %d to %u for several
lines in the cl

fix(st-clock): print enums as unsigned

With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. Change %d to %u for several
lines in the clock driver.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ia2d24e6feef5e852e0a6bfaa1286fe605f9a16b7

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Merge "feat(st): update the security based on new compatible" into integration

feat(st): update the security based on new compatible

From the new binding, the RCC become secured based on the new
compatible. This must be done only from the secure OS initialisation.

Signed-off-

feat(st): update the security based on new compatible

From the new binding, the RCC become secured based on the new
compatible. This must be done only from the secure OS initialisation.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I7f0a62f22bfcca638ddaefc9563df00f89f01653

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Merge changes from topic "st-clk-updates" into integration

* changes:
refactor(st-clock): update STGEN management
feat(st-clock): assign clocks to the correct BL
feat(st-clock): do not refcoun

Merge changes from topic "st-clk-updates" into integration

* changes:
refactor(st-clock): update STGEN management
feat(st-clock): assign clocks to the correct BL
feat(st-clock): do not refcount on non-secure clocks in bl32
feat(st-clock): define secure and non-secure gate clocks
refactor(stm32mp1): remove unused refcount helper functions
fix(stm32mp1): add missing debug.h
refactor(st-clock): use refcnt instead of secure status

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refactor(st-clock): update STGEN management

Rework STGEN config function, and move it to stm32mp_clkfunc.c file.

Change-Id: I7784a79c486d1b8811f6f8d123e49ea34899e9b6
Signed-off-by: Lionel Debieve <

refactor(st-clock): update STGEN management

Rework STGEN config function, and move it to stm32mp_clkfunc.c file.

Change-Id: I7784a79c486d1b8811f6f8d123e49ea34899e9b6
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st-clock): assign clocks to the correct BL

Some clocks are only required in BL2, like boot devices clocks:
FMC, QSPI.
Some clocks are only used in BL32: Timers, devices that need special
care f

feat(st-clock): assign clocks to the correct BL

Some clocks are only required in BL2, like boot devices clocks:
FMC, QSPI.
Some clocks are only used in BL32: Timers, devices that need special
care for independent reset.

Change-Id: Id4ba99afeea5095f419a86f7dc6423192c628d82
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st-clock): do not refcount on non-secure clocks in bl32

This change removes reference counting support in clock gating
implementation for clocks that rely on non-secure only RCC resources.
As R

feat(st-clock): do not refcount on non-secure clocks in bl32

This change removes reference counting support in clock gating
implementation for clocks that rely on non-secure only RCC resources.
As RCC registers are accessed straight by non-secure world for these
clocks, secure world cannot safely store the clock state and even
disabling such clock from secure world can jeopardize the non-secure
world clock management framework and drivers.

As a consequence, for such clocks, stm32_clock_enable() forces the clock
ON without any increment of a refcount and stm32_clock_disable() does
not disable the clock.

Change-Id: I0cc159b36a25dbc8676f05edf2668ae63c640537
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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feat(st-clock): define secure and non-secure gate clocks

Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure u

feat(st-clock): define secure and non-secure gate clocks

Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure upon RCC[TZEN] and RCC[MCKPROT] (MKP) or always accessible
from non-secure (N_S).

At init, lookup clock tree to check if any of the secure clocks
is derived from PLL3 in which case PLL3 shall be secure.

Note that this change does not grow byte size of stm32mp1_clk_gate[].

Change-Id: I933d8a30007f3c72f755aa1ef6d7e6bcfabbfa9e
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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refactor(st-clock): use refcnt instead of secure status

Rework the internal functions __stm32mp1_clk_enable/disable to check for
reference count instead of secure status for a clock.
Some functions

refactor(st-clock): use refcnt instead of secure status

Rework the internal functions __stm32mp1_clk_enable/disable to check for
reference count instead of secure status for a clock.
Some functions now unused can be removed.

Change-Id: Ie4359110d7144229f85c961dcd5a019222c3fd25
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "st_clock_updates" into integration

* changes:
fix(st-clock): correct types in error messages
refactor(st-clock): directly use oscillator name
feat(st-clock): check HS

Merge changes from topic "st_clock_updates" into integration

* changes:
fix(st-clock): correct types in error messages
refactor(st-clock): directly use oscillator name
feat(st-clock): check HSE configuration in serial boot
feat(st-clock): manage disabled oscillator
refactor(st-clock): improve DT parsing for PLL nodes

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