| #
78ff3619 |
| 14-Jun-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_clk_update" into integration
* changes:
feat(st-clock): use early traces
fix(st-clock): adapt order of CSS on LSE and HSE
refactor(st-clock): remove unused struct
Merge changes from topic "st_clk_update" into integration
* changes:
feat(st-clock): use early traces
fix(st-clock): adapt order of CSS on LSE and HSE
refactor(st-clock): remove unused struct
feat(stm32mp1-fdts): remove RTC clock configuration
refactor(st-clock): move stm32mp1_clk_rcc_regs_*lock
refactor(st-clock): driver size optimization
refactor(st-clock): remove BL32 support on STM32MP13
feat(st-clock): don't gate/ungate an oscillator if it is not wired
feat(dt-bindings): add missing SPIx bus clocks
feat(stm32mp1-fdts): remove PLL1 settings
feat(st-clock): update with new bindings
feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
feat(dt-bindings): new RCC DT bindings
feat(stm32mp1): always boot at 650MHz
refactor(st-clock): remove LSEDRV_MEDIUM_HIGH for STM32MP13
fix(st-clock): display proper PLL number for STM32MP13
fix(st-clock): do not reconfigure LSE
feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
refactor(st-clock): remove unused clk function in API
refactor(st-clock): support deactivated STGEN in stm32mp_stgen_config
feat(st-clock): add function to restore generic timer rate
show more ...
|
| #
66d7c8bf |
| 01-Feb-2023 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
feat(stm32mp1-fdts): remove PLL1 settings
TF-A BL2 always boot at 650MHz using an algorithm to calculate PLL1
settings, without reading DT. Remove the corresponding nodes.
Change-Id: I0003337d8d37d
feat(stm32mp1-fdts): remove PLL1 settings
TF-A BL2 always boot at 650MHz using an algorithm to calculate PLL1
settings, without reading DT. Remove the corresponding nodes.
Change-Id: I0003337d8d37df7b2a70a84b5475f4278c4c4669
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
show more ...
|
| #
4391e5ed |
| 16-Aug-2022 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
RCC bindings alignment with MP13 RCC bindings
Change-Id: I02c89accd51e4214cd009d4a9433d8d9b6aeba25
Signed-off-by: Gabriel Fernandez <gabriel.fe
feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
RCC bindings alignment with MP13 RCC bindings
Change-Id: I02c89accd51e4214cd009d4a9433d8d9b6aeba25
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
show more ...
|
| #
d594239d |
| 22-Feb-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
LSI was too slow to provide enough random numbers (limited
to 6ms for 16 bytes production). Switch to CSI that allow
to get the RNG
feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
LSI was too slow to provide enough random numbers (limited
to 6ms for 16 bytes production). Switch to CSI that allow
to get the RNG fifo ready in less than 50µs.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I76d1fe58e2f4d5416a96f48123ae36bd82d8a8ee
show more ...
|
| #
c20b0c58 |
| 25-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(st): update STM32MP DT files" into integration
|
| #
4c8e8ea7 |
| 18-Oct-2023 |
Yann Gautier <yann.gautier@st.com> |
feat(st): update STM32MP DT files
This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a
feat(st): update STM32MP DT files
This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415
show more ...
|
| #
8a858913 |
| 07-Sep-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "stm32mp15-dt-updates" into integration
* changes:
refactor(stm32mp15-fdts): remove timers15 node
refactor(stm32mp15-fdts): remove unused secure-status properties
refa
Merge changes from topic "stm32mp15-dt-updates" into integration
* changes:
refactor(stm32mp15-fdts): remove timers15 node
refactor(stm32mp15-fdts): remove unused secure-status properties
refactor(stm32mp15-fdts): remove RCC secure-status
show more ...
|
| #
f0c19f25 |
| 30-Mar-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(stm32mp15-fdts): remove unused secure-status properties
For peripheral where both status and secure-status are set to okay,
the function fdt_get_status() returns the same status (DT_SHARED)
refactor(stm32mp15-fdts): remove unused secure-status properties
For peripheral where both status and secure-status are set to okay,
the function fdt_get_status() returns the same status (DT_SHARED) if
secure-status property is omitted. This secure-status property can then
be removed in boards DT files for iwdg nodes.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I9f9360842d4d41288db0cf1b92063f347c72d137
show more ...
|
| #
0791aaf4 |
| 29-Mar-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(stm32mp15-fdts): remove RCC secure-status
The RCC security is managed with a dedicated compatible:
"st,stm32mp1-rcc-secure" [1].
Remove useless secure-status property in boards rcc nodes.
refactor(stm32mp15-fdts): remove RCC secure-status
The RCC security is managed with a dedicated compatible:
"st,stm32mp1-rcc-secure" [1].
Remove useless secure-status property in boards rcc nodes.
[1] 812daf916c ("feat(st): update the security based on new compatible")
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iff31044ade78dd9c432120dce65375fe2b0d36d6
show more ...
|
| #
46577fb5 |
| 25-Aug-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(stm32mp15-fdts): add Avenger96 board with STM32MP157A DHCOR SoM" into integration
|
| #
51e22305 |
| 13-Jul-2022 |
Johann Neuhauser <jneuhauser@dh-electronics.com> |
feat(stm32mp15-fdts): add Avenger96 board with STM32MP157A DHCOR SoM
This should replace the stm32mp157a-avenger96.dts with the new device
tree files split into the STM32MP15 DHCOR SoM definition an
feat(stm32mp15-fdts): add Avenger96 board with STM32MP157A DHCOR SoM
This should replace the stm32mp157a-avenger96.dts with the new device
tree files split into the STM32MP15 DHCOR SoM definition and the
Avenger96 baseboard like it's done in Linux and U-Boot.
Differences to stm32mp157a-avenger96.dts:
- Enable sdmmc2 for booting from eMMC
- improved clock settings like in U-Boot commit b6055945
"ARM: dts: stm32: Adjust PLL4 settings on AV96 again"
- improved DDR settings for DHSOMs like in U-Boot commit 92ca0f74
"ARM: dts: stm32: Synchronize DDR setttings on DH SoMs"
TF-A with this new dts(i) files on this board was fully tested with
the latest OP-TEE developer setup.
Change-Id: I85ce8eca7747965af3555fc19fd7b192dc3e5740
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
show more ...
|