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Searched refs:add_define (Results 1 – 25 of 146) sorted by relevance

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/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dplat_conf.mk51 $(eval $(call add_define,MTK_SPM_PMIC_GS_DUMP))
52 $(eval $(call add_define,MTK_SPM_PMIC_GS_DUMP_SUSPEND))
53 $(eval $(call add_define,MTK_SPM_PMIC_GS_DUMP_SODI3))
54 $(eval $(call add_define,MTK_SPM_PMIC_GS_DUMP_DPIDLE))
58 $(eval $(call add_define,MTK_PLAT_SPM_UNSUPPORT))
60 $(eval $(call add_define,MT_SPM_FEATURE_SUPPORT))
64 $(eval $(call add_define,MTK_PLAT_DRAMC_UNSUPPORT))
68 $(eval $(call add_define,MTK_PLAT_CIRQ_UNSUPPORT))
72 $(eval $(call add_define,MTK_PLAT_SPM_SRAM_SLP_UNSUPPORT))
76 $(eval $(call add_define,MTK_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT))
[all …]
/rk3399_ARM-atf/plat/nxp/common/plat_make_helper/
H A Dsoc_common_def.mk15 $(eval $(call add_define,NXP_HAS_${INTERCONNECT}))
18 $(eval $(call add_define,ICNNCT_ID))
23 $(eval $(call add_define,CONFIG_CHASSIS_${CHASSIS}))
27 $(eval $(call add_define,NXP_DDR_${PLAT_DDR_PHY}))
31 $(eval $(call add_define,CONFIG_PHYS_64BIT))
55 $(eval $(call add_define,SEC_MEM_NON_COHERENT))
59 $(eval $(call add_define,NXP_ESDHC_${NXP_ESDHC_ENDIANNESS}))
63 $(eval $(call add_define,NXP_SFP_VER_${NXP_SFP_VER}))
67 $(eval $(call add_define,NXP_SFP_${NXP_SFP_ENDIANNESS}))
71 $(eval $(call add_define,NXP_GPIO_${NXP_GPIO_ENDIANNESS}))
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H A Dplat_common_def.mk14 $(eval $(call add_define,CONFIG_POVDD_ENABLE))
18 $(eval $(call add_define,CONFIG_${FLASH_TYPE}))
43 $(eval $(call add_define,CONFIG_DDR_NODIMM))
56 $(eval $(call add_define,CONFIG_DDR_ADDR_DEC))
60 $(eval $(call add_define,CONFIG_DDR_ECC_EN))
64 $(eval $(call add_define,CONFIG_STATIC_DDR))
78 $$(eval $$(call add_define,QSPI_BOOT))
81 $$(eval $$(call add_define,SD_BOOT))
84 $$(eval $$(call add_define,EMMC_BOOT))
87 $$(eval $$(call add_define,NOR_BOOT))
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/rk3399_ARM-atf/drivers/nxp/ddr/nxp-ddr/
H A Dddr.mk8 $(eval $(call add_define, PHY_GEN2))
11 $(eval $(call add_define,NXP_APPLY_MAX_CDD))
15 $(eval $(call add_define,ERRATA_DDR_A011396))
19 $(eval $(call add_define,ERRATA_DDR_A050450))
23 $(eval $(call add_define,ERRATA_DDR_A050958))
32 $(eval $(call add_define,ERRATA_DDR_A008511))
36 $(eval $(call add_define,ERRATA_DDR_A009803))
40 $(eval $(call add_define,ERRATA_DDR_A009942))
44 $(eval $(call add_define,ERRATA_DDR_A010165))
48 $(eval $(call add_define,ERRATA_DDR_A009663))
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/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dplat_conf.mk47 $(eval $(call add_define,MTK_PLAT_SPM_UNSUPPORT))
49 $(eval $(call add_define,MT_SPM_FEATURE_SUPPORT))
53 $(eval $(call add_define,MTK_PLAT_DRAMC_UNSUPPORT))
57 $(eval $(call add_define,MTK_PLAT_CIRQ_UNSUPPORT))
61 $(eval $(call add_define,MTK_PLAT_SPM_SRAM_SLP_UNSUPPORT))
65 $(eval $(call add_define,MTK_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT))
69 $(eval $(call add_define,MTK_PLAT_SPM_UART_UNSUPPORT))
73 $(eval $(call add_define,MTK_PLAT_SPM_PMIC_WRAP_DUMP_UNSUPPORT))
77 $(eval $(call add_define,MTK_PLAT_SPM_TRACE_UNSUPPORT))
81 $(eval $(call add_define,MT_SPM_TIMESTAMP_SUPPORT))
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/rk3399_ARM-atf/plat/renesas/rcar/
H A Dplatform.mk21 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
35 $(eval $(call add_define,RCAR_LSI_CUT))
42 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
50 $(eval $(call add_define,RCAR_LSI_CUT))
57 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
71 $(eval $(call add_define,RCAR_LSI_CUT))
78 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
88 $(eval $(call add_define,RCAR_LSI_CUT))
95 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
105 $(eval $(call add_define,RCAR_LSI_CUT))
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/rk3399_ARM-atf/plat/arm/board/fvp/
H A Dfvp_cpu_errata.mk22 $(eval $(call add_define, CORTEX_A710_H_INC))
23 $(eval $(call add_define, CORTEX_A78_H_INC))
24 $(eval $(call add_define, CORTEX_A78_AE_H_INC))
25 $(eval $(call add_define, CORTEX_A78C_H_INC))
26 $(eval $(call add_define, CORTEX_X3_H_INC))
27 $(eval $(call add_define, CORTEX_X4_H_INC))
28 $(eval $(call add_define, NEOVERSE_N2_H_INC))
29 $(eval $(call add_define, NEOVERSE_V1_H_INC))
/rk3399_ARM-atf/plat/renesas/rzg/
H A Dplatform.mk19 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
33 $(eval $(call add_define,RCAR_LSI_CUT))
40 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
48 $(eval $(call add_define,RCAR_LSI_CUT))
55 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
65 $(eval $(call add_define,RCAR_LSI_CUT))
72 $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
82 $(eval $(call add_define,RCAR_LSI_CUT))
87 $(eval $(call add_define,RCAR_LSI))
95 $(eval $(call add_define,RZG_LCS_STATE_DETECTION_ENABLE))
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/rk3399_ARM-atf/plat/brcm/board/stingray/
H A Dplatform.mk25 $(eval $(call add_define,DRIVER_CC_ENABLE))
31 $(eval $(call add_define,INCLUDE_EMMC_DRIVER_ERASE_CODE))
63 $(eval $(call add_define,USE_SINGLE_CLUSTER))
69 $(eval $(call add_define,USE_DDR))
79 $(eval $(call add_define,USE_USB))
85 $(eval $(call add_define,USE_PAXB))
91 $(eval $(call add_define,USE_FS4))
97 $(eval $(call add_define,USE_FS6))
103 $(eval $(call add_define,FS4_DISABLE_CLOCK))
108 $(eval $(call add_define,NCSI_IO_DRIVE_STRENGTH_MA))
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H A Dbcm958742t.mk11 $(eval $(call add_define,BOARD_FAMILY))
15 $(eval $(call add_define,IHOST_REG_TYPE))
19 $(eval $(call add_define,VDDC_REG_TYPE))
/rk3399_ARM-atf/plat/renesas/common/
H A Dcommon.mk28 $(eval $(call add_define,SPD_NONE))
44 $(eval $(call add_define,RCAR_H3))
45 $(eval $(call add_define,RCAR_M3))
46 $(eval $(call add_define,RCAR_M3N))
47 $(eval $(call add_define,RCAR_E3))
48 $(eval $(call add_define,RCAR_H3N))
49 $(eval $(call add_define,RCAR_D3))
50 $(eval $(call add_define,RCAR_V3M))
51 $(eval $(call add_define,RCAR_AUTO))
52 $(eval $(call add_define,RZ_G2M))
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/rk3399_ARM-atf/plat/brcm/board/common/
H A Dboard_common.mk12 $(eval $(call add_define,BOARD_CFG))
28 $(eval $(call add_define,SYSCNT_FREQ))
52 $(eval $(call add_define,BRCM_DISABLE_TRUSTED_WDOG))
59 $(eval $(call add_define,ARM_BL31_IN_DRAM))
63 $(eval $(call add_define,MMU_DISABLED))
69 $(eval $(call add_define,RUN_BL2_FROM_QSPI))
75 $(eval $(call add_define,RUN_BL2_FROM_NAND))
79 $(eval $(call add_define,ELOG_AP_UART_LOG_BASE))
84 $(eval $(call add_define,ELOG_STORE_MEDIA_DDR))
86 $(eval $(call add_define,ELOG_STORE_OFFSET))
[all …]
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/
H A Dplatform_t210.mk9 $(eval $(call add_define,TZDRAM_BASE))
12 $(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT))
15 $(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
18 $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
21 $(eval $(call add_define,MAX_XLAT_TABLES))
24 $(eval $(call add_define,MAX_MMAP_REGIONS))
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/
H A Dplatform_t186.mk10 $(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS))
13 $(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS))
25 $(eval $(call add_define,TZDRAM_BASE))
28 $(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
31 $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
34 $(eval $(call add_define,MAX_XLAT_TABLES))
37 $(eval $(call add_define,MAX_MMAP_REGIONS))
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Drules.mk37 $(eval $(call add_define,MTK_PLAT_SPM_UNSUPPORT))
41 $(eval $(call add_define,MTK_PLAT_CIRQ_UNSUPPORT))
45 $(eval $(call add_define,MTK_PLAT_SPM_SRAM_SLP_UNSUPPORT))
49 $(eval $(call add_define,MTK_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT))
53 $(eval $(call add_define,MTK_PLAT_SPM_UART_UNSUPPORT))
57 $(eval $(call add_define,MTK_VOLTAGE_BIN_VCORE_SUPPORT))
61 $(eval $(call add_define,MTK_PLAT_SPM_RGU_UNSUPPORT))
/rk3399_ARM-atf/drivers/arm/gic/v3/
H A Dgicv3.mk38 $(eval $(call add_define,GICV3_SUPPORT_GIC600))
42 $(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU))
46 $(eval $(call add_define,GICV3_IMPL_GIC600_MULTICHIP))
50 $(eval $(call add_define,GIC_ENABLE_V4_EXTN))
54 $(eval $(call add_define,GIC_EXT_INTID))
58 $(eval $(call add_define,GIC600_ERRATA_WA_2384374))
/rk3399_ARM-atf/plat/ti/k3low/board/am62lx/
H A Dboard.mk11 $(eval $(call add_define,BL32_BASE))
14 $(eval $(call add_define,PRELOADED_BL33_BASE))
17 $(eval $(call add_define,K3_HW_CONFIG_BASE))
/rk3399_ARM-atf/plat/ti/k3/board/j784s4/
H A Dboard.mk9 $(eval $(call add_define,K3_SEC_PROXY_LITE))
13 $(eval $(call add_define,K3_DATA_RAM_4_LATENCY))
17 $(eval $(call add_define,K3_EXCLUSIVE_SNOOP_DELAY))
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/
H A Dplatform_t194.mk14 $(eval $(call add_define,ENABLE_CONSOLE_SPE))
17 $(eval $(call add_define,ENABLE_STRICT_CHECKING_MODE))
20 $(eval $(call add_define,USE_GPC_DMA))
30 $(eval $(call add_define,TZDRAM_BASE))
33 $(eval $(call add_define,MAX_XLAT_TABLES))
36 $(eval $(call add_define,MAX_MMAP_REGIONS))
/rk3399_ARM-atf/plat/marvell/
H A Dmarvell.mk13 $(eval $(call add_define,MARVELL_SECURE_BOOT))
17 $(eval $(call add_define,PALLADIUM))
21 $(eval $(call add_define,DDR32))
/rk3399_ARM-atf/plat/nvidia/tegra/
H A Dplatform.mk12 $(eval $(call add_define,CRASH_REPORTING))
17 $(eval $(call add_define,PLAT_LOG_LEVEL_ASSERT))
21 $(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
61 $(eval $(call add_define,ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING))
62 $(eval $(call add_define,RELOCATE_BL32_IMAGE))
/rk3399_ARM-atf/plat/xilinx/versal/
H A Dplatform.mk22 $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
27 $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
30 $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
35 $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
40 $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
44 $(eval $(call add_define,IPI_CRC_CHECK))
53 $(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
57 $(eval $(call add_define,XLNX_DT_CFG))
61 $(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
145 $(eval $(call add_define, CORTEX_A72_H_INC))
/rk3399_ARM-atf/drivers/arm/ethosn/
H A Dethosn_npu.mk11 $(eval $(call add_define,ETHOSN_NPU_DRIVER))
16 $(eval $(call add_define,ETHOSN_NPU_TZMP1))
41 $(eval $(call add_define, PLAT_DEF_OID))
44 $(eval $(call add_define,PLAT_DEF_FIP_UUID))
/rk3399_ARM-atf/drivers/measured_boot/rse/
H A Dqcbor.mk21 $(eval $(call add_define,QCBOR_DISABLE_FLOAT_HW_USE))
22 $(eval $(call add_define,USEFULBUF_DISABLE_ALL_FLOAT))
23 $(eval $(call add_define,QCBOR_DISABLE_PREFERRED_FLOAT))
/rk3399_ARM-atf/plat/amd/versal2/
H A Dplatform.mk39 $(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
42 $(eval $(call add_define,TFA_NO_PM))
46 $(eval $(call add_define,MEM_BASE))
51 $(eval $(call add_define,MEM_SIZE))
54 $(eval $(call add_define,MEM_PROGBITS_SIZE))
59 $(eval $(call add_define,BL32_MEM_BASE))
64 $(eval $(call add_define,BL32_MEM_SIZE))
68 $(eval $(call add_define,IPI_CRC_CHECK))
98 $(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
103 $(eval $(call add_define,SPMC_MANIFEST_DTB_ADDR))
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