| #
ef685219 |
| 20-Feb-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "build: use toolchain identifiers in conditions" into integration
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| #
60dd8069 |
| 20-Feb-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "build: use new toolchain variables for tools" into integration
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| #
8620bd0b |
| 04-Dec-2023 |
Chris Kay <chris.kay@arm.com> |
build: use toolchain identifiers in conditions
The toolchain refactor change introduces the `${toolchain}-${tool}-id` variables, which provide identifiers for all of the toolchain tools used by the
build: use toolchain identifiers in conditions
The toolchain refactor change introduces the `${toolchain}-${tool}-id` variables, which provide identifiers for all of the toolchain tools used by the build system. This change replaces the various conditions that are in use to identify these tools based on the path with a standard set of comparisons against these new identifier variables.
Change-Id: Ib60e592359fa6e415c19a012e68d660f87436ca7 Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
ffb77421 |
| 04-Dec-2023 |
Chris Kay <chris.kay@arm.com> |
build: use new toolchain variables for tools
This change migrates the values of `CC`, `CPP`, `AS` and other toolchain variables to the new `$(toolchain)-$(tool)` variables, which were introduced by
build: use new toolchain variables for tools
This change migrates the values of `CC`, `CPP`, `AS` and other toolchain variables to the new `$(toolchain)-$(tool)` variables, which were introduced by the toolchain refactor patch. These variables should be equivalent to the values that they're replacing.
Change-Id: I644fe4ce82ef1894bed129ddb4b6ab94fb04985d Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
338dbe2f |
| 22-Feb-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I51c13c52,I3358c51e into integration
* changes: build: always prefix section names with `.` build: communicate correct page size to linker
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| #
da04341e |
| 14-Feb-2023 |
Chris Kay <chris.kay@arm.com> |
build: always prefix section names with `.`
Some of our specialized sections are not prefixed with the conventional period. The compiler uses input section names to derive certain other section name
build: always prefix section names with `.`
Some of our specialized sections are not prefixed with the conventional period. The compiler uses input section names to derive certain other section names (e.g. `.rela.text`, `.relacpu_ops`), and these can be difficult to select in linker scripts when there is a lack of a delimiter.
This change introduces the period prefix to all specialized section names.
BREAKING-CHANGE: All input and output linker section names have been prefixed with the period character, e.g. `cpu_ops` -> `.cpu_ops`.
Change-Id: I51c13c5266d5975fbd944ef4961328e72f82fc1c Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
d35403fe |
| 31-Aug-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Merge changes from topic "tegra-downstream-08282020" into integration
* changes: Tegra: platform specific BL31_SIZE Tegra186: sanity check power state type Tegra: fixup CNTPS_TVAL_EL1 delay ti
Merge changes from topic "tegra-downstream-08282020" into integration
* changes: Tegra: platform specific BL31_SIZE Tegra186: sanity check power state type Tegra: fixup CNTPS_TVAL_EL1 delay timer reads Tegra: add platform specific 'runtime_setup' handler Tegra: remove ENABLE_SVE_FOR_NS = 0 lib: cpus: denver: add MIDR PN9 variant cpus: denver: introduce macro to declare cpu_ops
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| #
0da7e2dd |
| 07-Apr-2020 |
Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com> |
Tegra: remove ENABLE_SVE_FOR_NS = 0
The SVE CPU extension library reads the id_aa64pfr0_el1 register to check if SVE is enabled. Tegra platforms disabled ENABLE_SVE_FOR_NS for pre-8.2 platforms, but
Tegra: remove ENABLE_SVE_FOR_NS = 0
The SVE CPU extension library reads the id_aa64pfr0_el1 register to check if SVE is enabled. Tegra platforms disabled ENABLE_SVE_FOR_NS for pre-8.2 platforms, but this flag can safely be enabled now that the library can enable the feature at runtime.
This patch updates the makefile to remove "ENABLE_SVE_FOR_NS = 0" as a result.
Change-Id: Ia2a89ac90644f8c0d39b41d321e04458ff6be6e1 Signed-off-by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com>
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| #
3e1e08b7 |
| 25-Aug-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "tegra194-spmd" into integration
* changes: Tegra194: introduce support for `SPD=spmd` Tegra: introduce backend support to compile libfdt Tegra: disable signed compari
Merge changes from topic "tegra194-spmd" into integration
* changes: Tegra194: introduce support for `SPD=spmd` Tegra: introduce backend support to compile libfdt Tegra: disable signed comparison plat: common: include "bl_common.h" from plat_spmd_manifest.c
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| #
eb7e5087 |
| 20-Jul-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: introduce backend support to compile libfdt
This patch includes the following files from libc to compile libfdt:
* memchr.c * memcmp.c * strrchr.c
The BUILD_PLAT macro is evaluated earlier
Tegra: introduce backend support to compile libfdt
This patch includes the following files from libc to compile libfdt:
* memchr.c * memcmp.c * strrchr.c
The BUILD_PLAT macro is evaluated earlier to allow libfdt installation to the right directory.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ie43fcf701dc051670e6372e21b3a84a6416c1735
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| #
8d51439e |
| 24-Aug-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: disable signed comparison
libfdt does not support the -Wsign-compare compiler option and the right patch will eventually be pushed upstream.
This patch disables the -Wsign-compare compiler o
Tegra: disable signed comparison
libfdt does not support the -Wsign-compare compiler option and the right patch will eventually be pushed upstream.
This patch disables the -Wsign-compare compiler option to allow libfdt compilation for Tegra platforms until the actual issue is fixed.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ib7a93946cad1ea9ec1b46751edb79a74c08ed0ac
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| #
8d0a3bb3 |
| 21-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Revert "libc/memset: Implement function in assembler"" into integration
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| #
f5402ef7 |
| 19-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Revert "libc/memset: Implement function in assembler"
This reverts commit e7d344de01ad11b856233634717aafe9312697e4. This reverts the patch https://review.trustedfirmware.org/c/TF-A/trusted-firmware
Revert "libc/memset: Implement function in assembler"
This reverts commit e7d344de01ad11b856233634717aafe9312697e4. This reverts the patch https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/5313 due to a timing issue with the merge. The merge occurred at the same time as the additional comments and thusly were were not seen until the merge was done. This reverts the change and additional patches from Alexei will follow to address the concerns expressed in the orignal patch.
Change-Id: Iae5f6403c93ac13ceeda29463883fcd4c437f2b7
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| #
e5c84ca6 |
| 19-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "libc/memset: Implement function in assembler" into integration
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| #
e7d344de |
| 16-Aug-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
libc/memset: Implement function in assembler
Trace analysis of FVP_Base_AEMv8A model running in Aarch32 mode with the build options listed below: TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ARM_ROTPK_LOCATI
libc/memset: Implement function in assembler
Trace analysis of FVP_Base_AEMv8A model running in Aarch32 mode with the build options listed below: TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_ecdsa KEY_ALG=ecdsa ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem shows that when auth_signature() gets called 71.84% of CPU execution time is spent in memset() function written in C using single byte write operations, see lib\libc\memset.c. This patch replaces C memset() implementation with assembler version giving the following results: - for Aarch32 in auth_signature() call memset() CPU time reduced to 24.84%. - Number of CPU instructions executed during TF-A boot stage before start of BL33 in RELEASE builds: ---------------------------------------------- | Arch | C | assembler | % | ---------------------------------------------- | Aarch32 | 2073275460 | 1487400003 | -28.25 | | Aarch64 | 2056807158 | 1244898303 | -39.47 | ---------------------------------------------- The patch also replaces memset.c with aarch64/memset.S in plat\nvidia\tegra\platform.mk.
Change-Id: Ifbf085a2f577a25491e2d28446ee95a4ac891597 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| #
47ee4087 |
| 05-Aug-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "Use abspath to dereference $BUILD_BASE" into integration
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| #
29214e95 |
| 30-Jul-2020 |
Grant Likely <grant.likely@arm.com> |
Use abspath to dereference $BUILD_BASE
If the user tries to change BUILD_BASE to put the build products outside the build tree the compile will fail due to hard coded assumptions that $BUILD_BASE is
Use abspath to dereference $BUILD_BASE
If the user tries to change BUILD_BASE to put the build products outside the build tree the compile will fail due to hard coded assumptions that $BUILD_BASE is a relative path. Fix by using $(abspath $(BUILD_BASE)) to rationalize to an absolute path every time and remove the relative path assumptions.
This patch also adds documentation that BUILD_BASE can be specified by the user.
Signed-off-by: Grant Likely <grant.likely@arm.com> Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ib1af874de658484aaffc672f30029b852d2489c8
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de9d0d7c |
| 21-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Tegra: enable SDEI handling" into integration
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d886628d |
| 18-Apr-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: enable SDEI handling
This patch enables SDEI support for all Tegra platforms, with the following configuration settings.
* SGI 8 as the source IRQ * Special Private Event 0 * Three private,
Tegra: enable SDEI handling
This patch enables SDEI support for all Tegra platforms, with the following configuration settings.
* SGI 8 as the source IRQ * Special Private Event 0 * Three private, dynamic events * Three shared, dynamic events * Twelve general purpose explicit events
Verified using TFTF SDEI test suite.
******************************* Summary ******************************* Test suite 'SDEI' Passed ================================= Tests Skipped : 0 Tests Passed : 5 Tests Failed : 0 Tests Crashed : 0 Total tests : 5 =================================
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I1922069931a7876a4594e53260ee09f2e4f09390
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| #
c6ef55c5 |
| 20-May-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Tegra: enable stack protection" into integration
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| #
359acf77 |
| 17-May-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: enable stack protection
This patch sets ENABLE_STACK_PROTECTOR=strong and implements the platform support to generate a stack protection canary value.
Signed-off-by: Varun Wadekar <vwadekar@
Tegra: enable stack protection
This patch sets ENABLE_STACK_PROTECTOR=strong and implements the platform support to generate a stack protection canary value.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ia8afe464b5645917b1c77d49305d19c7cd01866a
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| #
62250d39 |
| 02-Apr-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "Tegra: enable EHF for watchdog timer interrupts" into integration
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adb20a17 |
| 01-Apr-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: enable EHF for watchdog timer interrupts
This patch enables the Exception Handling Framework to service the WDT interrupts on all Tegra platforms.
Verified that the watchdog timer interrupt
Tegra: enable EHF for watchdog timer interrupts
This patch enables the Exception Handling Framework to service the WDT interrupts on all Tegra platforms.
Verified that the watchdog timer interrupt fires after migrating to the EHF.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I6b2e33da7841aa064e3a8f825c26fadf168cd0d5
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| #
907c58b2 |
| 23-Mar-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "tegra-downstream-03192020" into integration
* changes: Tegra194: move cluster and CPU counter to header file. Tegra: gicv2: initialize target masks spd: tlkd: support
Merge changes from topic "tegra-downstream-03192020" into integration
* changes: Tegra194: move cluster and CPU counter to header file. Tegra: gicv2: initialize target masks spd: tlkd: support new TLK SMCs for RPMB service Tegra210: trigger CPU0 hotplug power on using FC Tegra: memctrl: cleanup streamid override registers Tegra: memctrl_v2: remove support to secure TZSRAM Tegra: include platform headers from individual makefiles Tegra210: rename ENABLE_WDT_LEGACY_FIQ_HANDLING macro Tegra194: SiP function ID to read SMMU_PER registers Tegra: memctrl: map video memory as uncached Tegra: remove support for USE_COHERENT_MEM Tegra: remove circular dependency with common_def.h Tegra: include missing stdbool.h Tegra: remove support for SEPARATE_CODE_AND_RODATA=0
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| #
ebe076da |
| 29-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra210: rename ENABLE_WDT_LEGACY_FIQ_HANDLING macro
This patch renames 'ENABLE_WDT_LEGACY_FIQ_HANDLING' macro to 'ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING', to indicate that this is a Tegra feature.
Tegra210: rename ENABLE_WDT_LEGACY_FIQ_HANDLING macro
This patch renames 'ENABLE_WDT_LEGACY_FIQ_HANDLING' macro to 'ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING', to indicate that this is a Tegra feature.
Change-Id: I5c4431e662223ee80efbfd5ec2513f8b1cadfc50 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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