1# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. 2# Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5 6override PROGRAMMABLE_RESET_ADDRESS := 1 7PSCI_EXTENDED_STATE_ID := 1 8A53_DISABLE_NON_TEMPORAL_HINT := 0 9SEPARATE_CODE_AND_RODATA := 1 10override RESET_TO_BL31 := 1 11PL011_GENERIC_UART := 1 12IPI_CRC_CHECK := 0 13HARDEN_SLS_ALL := 0 14CPU_PWRDWN_SGI ?= 6 15$(eval $(call add_define_val,CPU_PWR_DOWN_REQ_INTR,ARM_IRQ_SEC_SGI_${CPU_PWRDWN_SGI})) 16 17# A72 Erratum for SoC 18ERRATA_A72_859971 := 1 19ERRATA_A72_1319367 := 1 20 21ifdef VERSAL_ATF_MEM_BASE 22 $(eval $(call add_define,VERSAL_ATF_MEM_BASE)) 23 24 ifndef VERSAL_ATF_MEM_SIZE 25 $(error "VERSAL_ATF_MEM_BASE defined without VERSAL_ATF_MEM_SIZE") 26 endif 27 $(eval $(call add_define,VERSAL_ATF_MEM_SIZE)) 28 29 ifdef VERSAL_ATF_MEM_PROGBITS_SIZE 30 $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE)) 31 endif 32endif 33 34ifdef VERSAL_BL32_MEM_BASE 35 $(eval $(call add_define,VERSAL_BL32_MEM_BASE)) 36 37 ifndef VERSAL_BL32_MEM_SIZE 38 $(error "VERSAL_BL32_MEM_BASE defined without VERSAL_BL32_MEM_SIZE") 39 endif 40 $(eval $(call add_define,VERSAL_BL32_MEM_SIZE)) 41endif 42 43ifdef IPI_CRC_CHECK 44 $(eval $(call add_define,IPI_CRC_CHECK)) 45endif 46 47ifdef VERSAL_PLATFORM 48 $(warning "VERSAL_PLATFORM has been deprecated") 49endif 50 51ifdef XILINX_OF_BOARD_DTB_ADDR 52XLNX_DT_CFG := 1 53$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR)) 54else 55XLNX_DT_CFG := 0 56endif 57$(eval $(call add_define,XLNX_DT_CFG)) 58 59PLAT_XLAT_TABLES_DYNAMIC := 0 60ifeq (${PLAT_XLAT_TABLES_DYNAMIC},1) 61$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC)) 62endif 63 64# enable assert() for release/debug builds 65ENABLE_ASSERTIONS := 1 66 67PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 68 -Iplat/xilinx/common/include/ \ 69 -Iplat/xilinx/common/ipi_mailbox_service/ \ 70 -Iplat/xilinx/versal/include/ \ 71 -Iplat/xilinx/versal/pm_service/ 72 73include lib/libfdt/libfdt.mk 74# Include GICv3 driver files 75include drivers/arm/gic/v3/gicv3.mk 76include lib/xlat_tables_v2/xlat_tables.mk 77 78PLAT_BL_COMMON_SOURCES := drivers/arm/dcc/dcc_console.c \ 79 drivers/delay_timer/delay_timer.c \ 80 drivers/delay_timer/generic_delay_timer.c \ 81 ${GICV3_SOURCES} \ 82 drivers/arm/pl011/aarch64/pl011_console.S \ 83 plat/common/aarch64/crash_console_helpers.S \ 84 plat/arm/common/arm_cci.c \ 85 plat/arm/common/arm_common.c \ 86 plat/common/plat_gicv3.c \ 87 plat/xilinx/versal/aarch64/versal_helpers.S \ 88 plat/xilinx/versal/aarch64/versal_common.c \ 89 ${XLAT_TABLES_LIB_SRCS} 90 91VERSAL_CONSOLE ?= pl011 92ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb none)) 93else 94 $(error "Please define VERSAL_CONSOLE") 95endif 96 97$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE})) 98 99# Runtime console in default console in DEBUG build 100ifeq ($(DEBUG), 1) 101CONSOLE_RUNTIME ?= $(VERSAL_CONSOLE) 102endif 103 104# Runtime console 105ifdef CONSOLE_RUNTIME 106ifeq (${CONSOLE_RUNTIME}, $(filter ${CONSOLE_RUNTIME},pl011 pl011_0 pl011_1 dcc dtb)) 107$(eval $(call add_define_val,CONSOLE_RUNTIME,RT_CONSOLE_ID_${CONSOLE_RUNTIME})) 108else 109$(error "Please define CONSOLE_RUNTIME") 110endif 111endif 112 113BL31_SOURCES += drivers/arm/cci/cci.c \ 114 lib/cpus/aarch64/cortex_a72.S \ 115 common/fdt_wrappers.c \ 116 plat/common/plat_psci_common.c \ 117 plat/xilinx/common/ipi.c \ 118 plat/xilinx/common/plat_fdt.c \ 119 plat/xilinx/common/plat_console.c \ 120 plat/xilinx/common/plat_clkfunc.c \ 121 plat/xilinx/common/plat_startup.c \ 122 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 123 plat/xilinx/common/pm_service/pm_ipi.c \ 124 plat/xilinx/common/pm_service/pm_api_sys.c \ 125 plat/xilinx/common/pm_service/pm_svc_main.c \ 126 plat/xilinx/common/versal.c \ 127 plat/xilinx/versal/bl31_versal_setup.c \ 128 plat/xilinx/versal/plat_psci.c \ 129 plat/xilinx/versal/plat_versal.c \ 130 plat/xilinx/versal/plat_topology.c \ 131 plat/xilinx/versal/sip_svc_setup.c \ 132 plat/xilinx/versal/versal_gicv3.c \ 133 plat/xilinx/versal/versal_ipi.c \ 134 plat/xilinx/versal/pm_service/pm_client.c \ 135 common/fdt_fixup.c \ 136 ${LIBFDT_SRCS} 137 138ifeq ($(HARDEN_SLS_ALL), 1) 139TF_CFLAGS_aarch64 += -mharden-sls=all 140endif 141 142ifeq (${ERRATA_ABI_SUPPORT}, 1) 143# enable the cpu macros for errata abi interface 144CORTEX_A72_H_INC := 1 145$(eval $(call add_define, CORTEX_A72_H_INC)) 146endif 147 148ifdef CUSTOM_PKG_PATH 149include $(CUSTOM_PKG_PATH)/custom_pkg.mk 150else 151BL31_SOURCES += plat/xilinx/common/custom_sip_svc.c 152endif 153