1a6ea06f5SAlexei Fedorov# 2e1b15b09SManish V Badarkhe# Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. 32c248adeSVarun Wadekar# Copyright (c) 2021, NVIDIA Corporation. All rights reserved. 4a6ea06f5SAlexei Fedorov# 5a6ea06f5SAlexei Fedorov# SPDX-License-Identifier: BSD-3-Clause 6a6ea06f5SAlexei Fedorov# 7a6ea06f5SAlexei Fedorov 8a6ea06f5SAlexei Fedorov# Default configuration values 9b4ad365aSAndre PrzywaraGICV3_SUPPORT_GIC600 ?= 0 102c248adeSVarun WadekarGICV3_SUPPORT_GIC600AE_FMU ?= 0 11a6ea06f5SAlexei FedorovGICV3_IMPL_GIC600_MULTICHIP ?= 0 12a6ea06f5SAlexei FedorovGICV3_OVERRIDE_DISTIF_PWR_OPS ?= 0 135875f266SAlexei FedorovGIC_ENABLE_V4_EXTN ?= 0 148f3ad766SAlexei FedorovGIC_EXT_INTID ?= 0 15e1b15b09SManish V BadarkheGIC600_ERRATA_WA_2384374 ?= ${GICV3_SUPPORT_GIC600} 16a6ea06f5SAlexei Fedorov 178f3ad766SAlexei FedorovGICV3_SOURCES += drivers/arm/gic/v3/gicv3_main.c \ 18a6ea06f5SAlexei Fedorov drivers/arm/gic/v3/gicv3_helpers.c \ 19a6ea06f5SAlexei Fedorov drivers/arm/gic/v3/gicdv3_helpers.c \ 20a6ea06f5SAlexei Fedorov drivers/arm/gic/v3/gicrv3_helpers.c 21a6ea06f5SAlexei Fedorov 222c248adeSVarun Wadekarifeq (${GICV3_SUPPORT_GIC600AE_FMU}, 1) 232c248adeSVarun WadekarGICV3_SOURCES += drivers/arm/gic/v3/gic600ae_fmu.c \ 242c248adeSVarun Wadekar drivers/arm/gic/v3/gic600ae_fmu_helpers.c 252c248adeSVarun Wadekarendif 262c248adeSVarun Wadekar 27a6ea06f5SAlexei Fedorovifeq (${GICV3_OVERRIDE_DISTIF_PWR_OPS}, 0) 28a6ea06f5SAlexei FedorovGICV3_SOURCES += drivers/arm/gic/v3/arm_gicv3_common.c 29a6ea06f5SAlexei Fedorovendif 30a6ea06f5SAlexei Fedorov 31b4ad365aSAndre PrzywaraGICV3_SOURCES += drivers/arm/gic/v3/gic-x00.c 32a6ea06f5SAlexei Fedorovifeq (${GICV3_IMPL_GIC600_MULTICHIP}, 1) 33a6ea06f5SAlexei FedorovGICV3_SOURCES += drivers/arm/gic/v3/gic600_multichip.c 34a6ea06f5SAlexei Fedorovendif 35b4ad365aSAndre Przywara 36b4ad365aSAndre Przywara# Set GIC-600 support 37b4ad365aSAndre Przywara$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600)) 38b4ad365aSAndre Przywara$(eval $(call add_define,GICV3_SUPPORT_GIC600)) 398f3ad766SAlexei Fedorov 402c248adeSVarun Wadekar# Set GIC-600AE FMU support 412c248adeSVarun Wadekar$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600AE_FMU)) 422c248adeSVarun Wadekar$(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU)) 432c248adeSVarun Wadekar 44*a02a45dfSVarun Wadekar# Set GIC-600 multichip support 45*a02a45dfSVarun Wadekar$(eval $(call assert_boolean,GICV3_IMPL_GIC600_MULTICHIP)) 46*a02a45dfSVarun Wadekar$(eval $(call add_define,GICV3_IMPL_GIC600_MULTICHIP)) 47*a02a45dfSVarun Wadekar 485875f266SAlexei Fedorov# Set GICv4 extension 495875f266SAlexei Fedorov$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN)) 505875f266SAlexei Fedorov$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 515875f266SAlexei Fedorov 528f3ad766SAlexei Fedorov# Set support for extended PPI and SPI range 538f3ad766SAlexei Fedorov$(eval $(call assert_boolean,GIC_EXT_INTID)) 548f3ad766SAlexei Fedorov$(eval $(call add_define,GIC_EXT_INTID)) 55e1b15b09SManish V Badarkhe 56e1b15b09SManish V Badarkhe# Set errata workaround for GIC600/GIC600AE 57e1b15b09SManish V Badarkhe$(eval $(call assert_boolean,GIC600_ERRATA_WA_2384374)) 58e1b15b09SManish V Badarkhe$(eval $(call add_define,GIC600_ERRATA_WA_2384374)) 59