Merge "feat(versal2): add SPMD support for SPMC at S-EL1" into integration

feat(versal2): add SPMD support for SPMC at S-EL1

Added support for SPMD when SPMC is running at S-EL1 on Versal Gen 2
platform. Added DTB with manifest addresses to BL32 for proper
initialization.

feat(versal2): add SPMD support for SPMC at S-EL1

Added support for SPMD when SPMC is running at S-EL1 on Versal Gen 2
platform. Added DTB with manifest addresses to BL32 for proper
initialization. Added `plat_spmd_handle_group0_interrupt` to handle
Group0 interrupts in SPMD. Added a new manifest source file compliant
with FFA 1.0 specification in which load_address and entrypoint
points to BL32 base address.

Change-Id: I518e2e799d3b86fcd67f9fee0af42503ca705488
Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>

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Merge changes from topic "xlnx_runtime_console" into integration

* changes:
fix(versal2): runtime console in debug mode
fix(versal-net): runtime console in debug mode
fix(versal): runtime cons

Merge changes from topic "xlnx_runtime_console" into integration

* changes:
fix(versal2): runtime console in debug mode
fix(versal-net): runtime console in debug mode
fix(versal): runtime console in debug mode
fix(zynqmp): runtime console in debug mode

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fix(versal2): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to
pl011, regardless of the user-specified CONSOLE value. This causes a
build requested wi

fix(versal2): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to
pl011, regardless of the user-specified CONSOLE value. This causes a
build requested with CONSOLE=pl011_1 to register both pl011_1 and
pl011 as boot and runtime consoles. If the hardware is connected only
to UART1, this causes TF-A to hang when UART0 is selected as the
runtime console, since it waits indefinitely on the transmit FIFO.
The fix ensures that, in a DEBUG build, CONSOLE_RUNTIME defaults to
the same value as CONSOLE.

Change-Id: I2e29d5b77c43aa65f58224d226683f4a8d94271a
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge changes from topics "amd_scmi_in_nopm", "amd_versal2_custom_sip" into integration

* changes:
feat(versal2): add hooks for mmap and early setup
refactor(versal2): add tfa_no_pm flag for scmi

feat(versal2): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory m

feat(versal2): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory map via custom_mmap_add(). This change may also
require alignment of the MAX_XLAT_TABLE and MAX_XLAT_TABLES macros.
These can be defined within the custom_pkg.mk makefile as follows:

MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))

If PLATFORM_STACK_SIZE is not already defined, a default value
should be used. This allows for configurability of the stack size
across different interfaces, such as custom packages. The
custom_early_setup() function enables early low-level operations
to bring the system into a correct state. Support for a custom
SiP service is also added. A basic implementation of
custom_smc_handler() is provided by the platform, while the actual
definition is expected to be supplied by the custom package. This
feature is designed for use by external libraries, such as those
that require status checking. This code introduces a generic
framework for integrating custom logic via the
$(CUSTOM_PKG_PATH)/custom_pkg.mk makefile, including
optional support for custom SMC functionality, which is determined
by the custom package.

Change-Id: I40281acf2dc48be43471b8642e2ab1a93b1cf8f6
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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refactor(versal2): add tfa_no_pm flag for scmi

Added the TFA_NO_PM flag in the SCMI file and guarded SCMI
functionality with if conditions. When TFA_NO_PM is set to 0
(default), Platform Management

refactor(versal2): add tfa_no_pm flag for scmi

Added the TFA_NO_PM flag in the SCMI file and guarded SCMI
functionality with if conditions. When TFA_NO_PM is set to 0
(default), Platform Management is enabled. When set to 1, Platform
Management is disabled. This allows the generic SCMI driver to be
used in non-PM scenarios while maintaining compatibility with
conforming power management interfaces.

Change-Id: I4f6483e2c8a322ecb41e523bc03a351af4a2cb6b
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge changes from topic "xlnx_versal2_cpuidle_fix" into integration

* changes:
fix(versal2): fix offsets for apu pcil
fix(versal2): initialize counter-timer frequency register
fix(versal2): u

Merge changes from topic "xlnx_versal2_cpuidle_fix" into integration

* changes:
fix(versal2): fix offsets for apu pcil
fix(versal2): initialize counter-timer frequency register
fix(versal2): use common function to get system counter frequency
fix(versal2): align IOU_SCNTR base address macro name with other platforms

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fix(versal2): use common function to get system counter frequency

Currently, the IOU_SCNTR system counter frequency value is not read from
plat_get_syscnt_freq2(), and it returns the local cpu_freq,

fix(versal2): use common function to get system counter frequency

Currently, the IOU_SCNTR system counter frequency value is not read from
plat_get_syscnt_freq2(), and it returns the local cpu_freq, which is
incorrect. Use the common plat_get_syscnt_freq2() to read the IOU_SCNTR
frequency register and return the correct value.

Change-Id: I277dc6a2e4acd1acd3f048aaf242a3580d06e1c8
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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Merge "feat(versal2): is OCM configured as coherent" into integration

feat(versal2): is OCM configured as coherent

Warn users about disabled OCM coherency which is not enabled by
default in designs. If it is not enabled and TF-A is running out
of OCM,TF-A won't work p

feat(versal2): is OCM configured as coherent

Warn users about disabled OCM coherency which is not enabled by
default in designs. If it is not enabled and TF-A is running out
of OCM,TF-A won't work properly.
This check is done only in Debug mode and isolation disabled.

Change-Id: I7661e0183503b71085c57fa35014341d14522203
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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Merge "fix(versal2): rename console build arg to generic" into integration

fix(versal2): rename console build arg to generic

Rename VERSAL2_CONSOLE build argument to CONSOLE to
keep it aligned with generic build arguments.

Change-Id: I0f4967aa262f0300d8f76f6638030a1839901

fix(versal2): rename console build arg to generic

Rename VERSAL2_CONSOLE build argument to CONSOLE to
keep it aligned with generic build arguments.

Change-Id: I0f4967aa262f0300d8f76f6638030a1839901234
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "versal2-pm-support" into integration

* changes:
feat(versal2): extended SMCCC payload for EEMI
feat(versal2): add support for platform management
feat(versal2): add d

Merge changes from topic "versal2-pm-support" into integration

* changes:
feat(versal2): extended SMCCC payload for EEMI
feat(versal2): add support for platform management
feat(versal2): add dependency macro for PM

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feat(versal2): extended SMCCC payload for EEMI

Until Versal, the extended SMCCC payload was supported only for
QUERY_DATA, while other APIs used the legacy SMCCC format.

In Versal Gen 2, all EEMI A

feat(versal2): extended SMCCC payload for EEMI

Until Versal, the extended SMCCC payload was supported only for
QUERY_DATA, while other APIs used the legacy SMCCC format.

In Versal Gen 2, all EEMI APIs are supported with extended SMCCC
payload only, enabling a simplified and efficient pass-through
implementation.

Also, set TFA_NO_PM to 0 to enable power management by default.

Change-Id: I937be3c78ebe87c62f8697a0a82cdcd21c185f56
Signed-off-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com>

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feat(versal2): add support for platform management

Add support for PM functionality through EEMI interface for
Versal Gen 2. Add support of PM APIs in PSCI ops. Add
TFA_NO_PM flag to disable PM func

feat(versal2): add support for platform management

Add support for PM functionality through EEMI interface for
Versal Gen 2. Add support of PM APIs in PSCI ops. Add
TFA_NO_PM flag to disable PM functionality. Enable wakeup for
new peripherals

Change-Id: I1bf67dc46af91ee113c627d32ae6ecc1dad386c2
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>
Signed-off-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com>

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Merge changes from topic "xlnx_fix_plat_ret_dt_tl" into integration

* changes:
fix(versal2): pass tl address to bl32
fix(xilinx): runtime console to handle dt failure
refactor(xilinx): refacto

Merge changes from topic "xlnx_fix_plat_ret_dt_tl" into integration

* changes:
fix(versal2): pass tl address to bl32
fix(xilinx): runtime console to handle dt failure
refactor(xilinx): refactor console to support transfer list
chore(xilinx): propagate error code
feat(versal2): retrieve DT address from transfer list
chore(versal2): move xfer-list file paths
fix(versal2): update transfer list as optional

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refactor(xilinx): refactor console to support transfer list

Refactor console to support DTB console in case of transfer list.
Simplify logic where SOC specific macros are moved to platform headers
o

refactor(xilinx): refactor console to support transfer list

Refactor console to support DTB console in case of transfer list.
Simplify logic where SOC specific macros are moved to platform headers
or makefile where XLNX_DT_CFG macro describe if system is DT driven or not.

Change-Id: Id45c03a950b62e83e91a50e0485eacdb233ba745
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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feat(versal2): retrieve DT address from transfer list

On versal2 platform, unlike current static DT address passing
mechanism, DT address is retrieved from transfer list dynamically.

Change-Id: I44

feat(versal2): retrieve DT address from transfer list

On versal2 platform, unlike current static DT address passing
mechanism, DT address is retrieved from transfer list dynamically.

Change-Id: I44b9a0753809652f26bc1b7e061f5364229ba352
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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chore(versal2): move xfer-list file paths

Only Versal Gen 2 platform supports transfer list.
Move transfer list files to versal2 common path.

Change-Id: I2795270a77e2af5e012c82c7b5916fa1f90f0497
Si

chore(versal2): move xfer-list file paths

Only Versal Gen 2 platform supports transfer list.
Move transfer list files to versal2 common path.

Change-Id: I2795270a77e2af5e012c82c7b5916fa1f90f0497
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal2): update transfer list as optional

Updated transfer list feature as optional and user should explicitly
provide build time argument to enable transfer list.
In TL optional case TL addres

fix(versal2): update transfer list as optional

Updated transfer list feature as optional and user should explicitly
provide build time argument to enable transfer list.
In TL optional case TL address range is utilized as default dtb
address range. Updated default DT address to transfer list address.

Change-Id: Ieeaacb3e6fda4ad1da9330708e19d776bffb06c1
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge "feat(amd): populate handoff from TL" into integration

feat(amd): populate handoff from TL

Handoff structures are populated by executable entry point
information tag based bl32/bl33 entries present in transfer list.

The upstream code is having problem

feat(amd): populate handoff from TL

Handoff structures are populated by executable entry point
information tag based bl32/bl33 entries present in transfer list.

The upstream code is having problem with the last TL entry
particularly when the tags for two entries are same.
While tlc tool dumps all entries correctly, transfer_list_dump() in
upstream code does not provide information about the last entry in TL.

Enabling TRANSFER_LIST also enables BL1_SOURCES and BL2_SOURCES in
transfer_list.mk thereby enabling bl1/bl2 builds.
bl1/bl2 builds are disabled by turning off NEED_BL1/NEED_BL2
build flags.

Change-Id: I55ddccc1ab266cc5a609423d304a5e5c282e17f6
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

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Merge changes from topic "xlnx_versal2_changes" into integration

* changes:
feat(versal2): support dynamic XLAT tables
fix(versal2): update check for TRANSFER_LIST macro

feat(versal2): support dynamic XLAT tables

Enable support for Dynamic XLAT Tables by default for
AMD Versal Gen 2 Platform.

Change-Id: I532d9b208b0e7d8a7b1ffad741cc6c1cec0bd2ab
Signed-off-by: Aksha

feat(versal2): support dynamic XLAT tables

Enable support for Dynamic XLAT Tables by default for
AMD Versal Gen 2 Platform.

Change-Id: I532d9b208b0e7d8a7b1ffad741cc6c1cec0bd2ab
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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