141612559SVarun Wadekar# 21ca902a5SGovindraj Raja# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. 341612559SVarun Wadekar# 441612559SVarun Wadekar# SPDX-License-Identifier: BSD-3-Clause 541612559SVarun Wadekar# 641612559SVarun Wadekar 71fa05dabSChris Kayinclude common/fdt_wrappers.mk 81fa05dabSChris Kay 91ca902a5SGovindraj RajaARM_ARCH_MAJOR := 8 101ca902a5SGovindraj RajaARM_ARCH_MINOR := 2 111ca902a5SGovindraj Raja 1241612559SVarun Wadekar# platform configs 13ffd58ccaSVarun WadekarENABLE_CONSOLE_SPE := 1 14117dbe6cSVarun Wadekar$(eval $(call add_define,ENABLE_CONSOLE_SPE)) 15117dbe6cSVarun Wadekar 16a3c2c0e9SSteven KaoENABLE_STRICT_CHECKING_MODE := 1 17a3c2c0e9SSteven Kao$(eval $(call add_define,ENABLE_STRICT_CHECKING_MODE)) 18a3c2c0e9SSteven Kao 194a9026d4SVarun WadekarUSE_GPC_DMA := 1 204a9026d4SVarun Wadekar$(eval $(call add_define,USE_GPC_DMA)) 214a9026d4SVarun Wadekar 2241612559SVarun WadekarRESET_TO_BL31 := 1 2341612559SVarun Wadekar 2441612559SVarun WadekarPROGRAMMABLE_RESET_ADDRESS := 1 2541612559SVarun Wadekar 2641612559SVarun WadekarCOLD_BOOT_SINGLE_CPU := 1 2741612559SVarun Wadekar 2841612559SVarun Wadekar# platform settings 2941612559SVarun WadekarTZDRAM_BASE := 0x40000000 3041612559SVarun Wadekar$(eval $(call add_define,TZDRAM_BASE)) 3141612559SVarun Wadekar 32bc019041SAjay GuptaMAX_XLAT_TABLES := 25 3341612559SVarun Wadekar$(eval $(call add_define,MAX_XLAT_TABLES)) 3441612559SVarun Wadekar 35929a764dSSteven KaoMAX_MMAP_REGIONS := 30 3641612559SVarun Wadekar$(eval $(call add_define,MAX_MMAP_REGIONS)) 3741612559SVarun Wadekar 388ca61538SDavid Pu# enable RAS handling 3946cc41d5SManish PandeyHANDLE_EA_EL3_FIRST_NS := 1 408ca61538SDavid Pu 4141612559SVarun Wadekar# platform files 42eeb1b5e3SVarun WadekarPLAT_INCLUDES += -Iplat/nvidia/tegra/include/t194 \ 43eeb1b5e3SVarun Wadekar -I${SOC_DIR}/drivers/include 4441612559SVarun Wadekar 457581dc89SVarun WadekarBL31_SOURCES += ${TEGRA_GICv2_SOURCES} \ 467581dc89SVarun Wadekar drivers/ti/uart/aarch64/16550_console.S \ 4714f52852SVarun Wadekar lib/cpus/aarch64/denver.S \ 48e2469d82SVarun Wadekar ${TEGRA_DRIVERS}/bpmp_ipc/intf.c \ 49e2469d82SVarun Wadekar ${TEGRA_DRIVERS}/bpmp_ipc/ivc.c \ 50e2469d82SVarun Wadekar ${TEGRA_DRIVERS}/memctrl/memctrl_v2.c \ 51e2469d82SVarun Wadekar ${TEGRA_DRIVERS}/smmu/smmu.c \ 5241612559SVarun Wadekar ${SOC_DIR}/drivers/mce/mce.c \ 539808032cSSteven Kao ${SOC_DIR}/drivers/mce/nvg.c \ 549808032cSSteven Kao ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \ 556eb3c188SSteven Kao ${SOC_DIR}/drivers/se/se.c \ 56719fdb6eSVarun Wadekar ${SOC_DIR}/plat_memctrl.c \ 5741612559SVarun Wadekar ${SOC_DIR}/plat_psci_handlers.c \ 5841612559SVarun Wadekar ${SOC_DIR}/plat_setup.c \ 5941612559SVarun Wadekar ${SOC_DIR}/plat_secondary.c \ 60719fdb6eSVarun Wadekar ${SOC_DIR}/plat_sip_calls.c \ 611c62509eSVarun Wadekar ${SOC_DIR}/plat_smmu.c \ 621c62509eSVarun Wadekar ${SOC_DIR}/plat_trampoline.S 63117dbe6cSVarun Wadekar 64e2469d82SVarun Wadekarifeq (${USE_GPC_DMA}, 1) 65e2469d82SVarun WadekarBL31_SOURCES += ${TEGRA_DRIVERS}/gpcdma/gpcdma.c 66e2469d82SVarun Wadekarendif 67e2469d82SVarun Wadekar 68117dbe6cSVarun Wadekarifeq (${ENABLE_CONSOLE_SPE},1) 69e2469d82SVarun WadekarBL31_SOURCES += ${TEGRA_DRIVERS}/spe/shared_console.S 70117dbe6cSVarun Wadekarendif 718ca61538SDavid Pu 728ca61538SDavid Pu# RAS sources 73*813bfe57SBoyan Karatotevifeq (${HANDLE_EA_EL3_FIRST_NS},1) 7425fe31b2SBoyan KaratotevBL31_SOURCES += ${SOC_DIR}/plat_ras.c 758ca61538SDavid Puendif 76670306d3SVarun Wadekar 77670306d3SVarun Wadekar# SPM dispatcher 78670306d3SVarun Wadekarifeq (${SPD},spmd) 79670306d3SVarun Wadekarinclude lib/libfdt/libfdt.mk 80670306d3SVarun Wadekar# sources to support spmd 81670306d3SVarun WadekarBL31_SOURCES += plat/common/plat_spmd_manifest.c \ 82670306d3SVarun Wadekar ${LIBFDT_SRCS} 831fa05dabSChris Kay 841fa05dabSChris KayBL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 85670306d3SVarun Wadekarendif 86