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Searched refs:dbi_base (Results 1 – 25 of 28) sorted by relevance

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/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/
H A Dspl_pcie_ep_boot.c169 static int rockchip_pcie_ep_set_bar_flag(void *dbi_base, u32 barno, int flags) in rockchip_pcie_ep_set_bar_flag() argument
177 writel(0, dbi_base + reg + 0x100000 + 4); in rockchip_pcie_ep_set_bar_flag()
179 writel(flags, dbi_base + reg); in rockchip_pcie_ep_set_bar_flag()
181 writel(0, dbi_base + reg + 4); in rockchip_pcie_ep_set_bar_flag()
186 static void pcie_bar_init(void *dbi_base) in pcie_bar_init() argument
190 writel(0, dbi_base + 0x10); in pcie_bar_init()
191 writel(0, dbi_base + 0x14); in pcie_bar_init()
192 writel(0, dbi_base + 0x18); in pcie_bar_init()
193 writel(0, dbi_base + 0x1c); in pcie_bar_init()
194 writel(0, dbi_base + 0x20); in pcie_bar_init()
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/OK3568_Linux_fs/kernel/drivers/pci/controller/dwc/
H A Dpcie-dw-rockchip-acpi.c25 void __iomem *dbi_base; member
30 static void rk_pcie_writel_ob_unroll(void __iomem *dbi_base, u32 index, u32 reg, u32 val) in rk_pcie_writel_ob_unroll() argument
34 writel(val, dbi_base + offset + reg + DEFAULT_DBI_ATU_OFFSET); in rk_pcie_writel_ob_unroll()
37 static u32 rk_pcie_readl_ob_unroll(void __iomem *dbi_base, u32 index, u32 reg) in rk_pcie_readl_ob_unroll() argument
41 return readl(dbi_base + offset + reg + DEFAULT_DBI_ATU_OFFSET); in rk_pcie_readl_ob_unroll()
44 static void rk_pcie_prog_outbound_atu_unroll(struct device *dev, void __iomem *dbi_base, u32 index, in rk_pcie_prog_outbound_atu_unroll() argument
52 rk_pcie_writel_ob_unroll(dbi_base, index, PCIE_ATU_UNR_LOWER_BASE, lower_32_bits(cpu_addr)); in rk_pcie_prog_outbound_atu_unroll()
53 rk_pcie_writel_ob_unroll(dbi_base, index, PCIE_ATU_UNR_UPPER_BASE, upper_32_bits(cpu_addr)); in rk_pcie_prog_outbound_atu_unroll()
54 …rk_pcie_writel_ob_unroll(dbi_base, index, PCIE_ATU_UNR_LOWER_LIMIT, lower_32_bits(cpu_addr + size … in rk_pcie_prog_outbound_atu_unroll()
55 …rk_pcie_writel_ob_unroll(dbi_base, index, PCIE_ATU_UNR_UPPER_LIMIT, upper_32_bits(cpu_addr + size … in rk_pcie_prog_outbound_atu_unroll()
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H A Dpci-layerscape.c61 header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_is_bridge()
72 iowrite8(PCI_HEADER_TYPE_BRIDGE, pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_clear_multifunction()
81 val = ioread32(pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
83 iowrite32(val, pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
131 iowrite32(PCIE_ABSERR_SETTING, pci->dbi_base + PCIE_ABSERR); in ls_pcie_fix_error_response()
299 struct resource *dbi_base; in ls_pcie_probe() local
317 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); in ls_pcie_probe()
318 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); in ls_pcie_probe()
319 if (IS_ERR(pci->dbi_base)) in ls_pcie_probe()
320 return PTR_ERR(pci->dbi_base); in ls_pcie_probe()
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H A Dpci-layerscape-ep.c161 struct resource *dbi_base; in ls_pcie_ep_probe() local
186 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); in ls_pcie_ep_probe()
187 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); in ls_pcie_ep_probe()
188 if (IS_ERR(pci->dbi_base)) in ls_pcie_ep_probe()
189 return PTR_ERR(pci->dbi_base); in ls_pcie_ep_probe()
191 pci->dbi_base2 = pci->dbi_base + PCIE_DBI2_OFFSET; in ls_pcie_ep_probe()
H A Dpcie-al.c19 void __iomem *dbi_base; member
27 void __iomem *dbi_base = pcie->dbi_base; in al_pcie_map_bus() local
37 return dbi_base + where; in al_pcie_map_bus()
69 al_pcie->dbi_base = devm_pci_remap_cfg_resource(dev, res); in al_pcie_init()
70 if (IS_ERR(al_pcie->dbi_base)) in al_pcie_init()
71 return PTR_ERR(al_pcie->dbi_base); in al_pcie_init()
369 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_res); in al_pcie_probe()
370 if (IS_ERR(pci->dbi_base)) in al_pcie_probe()
371 return PTR_ERR(pci->dbi_base); in al_pcie_probe()
H A Dpcie-spear13xx.c206 struct resource *dbi_base; in spear13xx_pcie_probe() local
245 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi"); in spear13xx_pcie_probe()
246 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); in spear13xx_pcie_probe()
247 if (IS_ERR(pci->dbi_base)) { in spear13xx_pcie_probe()
248 ret = PTR_ERR(pci->dbi_base); in spear13xx_pcie_probe()
251 spear13xx_pcie->app_base = pci->dbi_base + 0x2000; in spear13xx_pcie_probe()
H A Dpcie-intel-gw.c117 pcie_update_bits(lpp->pci.dbi_base, ofs, mask, val); in pcie_rc_cfg_wr_mask()
239 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "dbi"); in intel_pcie_get_resources()
240 if (IS_ERR(pci->dbi_base)) in intel_pcie_get_resources()
241 return PTR_ERR(pci->dbi_base); in intel_pcie_get_resources()
466 pci->atu_base = pci->dbi_base + data->pcie_atu_offset; in intel_pcie_probe()
H A Dpcie-designware-plat.c209 pci->dbi_base = devm_ioremap_resource(dev, res); in dw_plat_pcie_probe()
210 if (IS_ERR(pci->dbi_base)) in dw_plat_pcie_probe()
211 return PTR_ERR(pci->dbi_base); in dw_plat_pcie_probe()
H A Dpcie-designware.c145 return pci->ops->read_dbi(pci, pci->dbi_base, reg, size); in dw_pcie_read_dbi()
147 ret = dw_pcie_read(pci->dbi_base + reg, size, &val); in dw_pcie_read_dbi()
160 pci->ops->write_dbi(pci, pci->dbi_base, reg, size, val); in dw_pcie_write_dbi()
164 ret = dw_pcie_write(pci->dbi_base + reg, size, val); in dw_pcie_write_dbi()
495 val = readl(pci->dbi_base + PCIE_PORT_DEBUG1); in dw_pcie_link_up()
572 pci->atu_base = pci->dbi_base + DEFAULT_DBI_ATU_OFFSET; in dw_pcie_setup()
H A Dpcie-qcom.c407 pci->dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL0); in qcom_pcie_init_2_1_0()
409 pci->dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL1); in qcom_pcie_init_2_1_0()
1096 writel(PCI_COMMAND_MASTER, pci->dbi_base + PCI_COMMAND); in qcom_pcie_init_2_3_3()
1097 writel(DBI_RO_WR_EN, pci->dbi_base + PCIE20_MISC_CONTROL_1_REG); in qcom_pcie_init_2_3_3()
1098 writel(PCIE_CAP_LINK1_VAL, pci->dbi_base + offset + PCI_EXP_SLTCAP); in qcom_pcie_init_2_3_3()
1100 val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP); in qcom_pcie_init_2_3_3()
1102 writel(val, pci->dbi_base + offset + PCI_EXP_LNKCAP); in qcom_pcie_init_2_3_3()
1104 writel(PCI_EXP_DEVCTL2_COMP_TMOUT_DIS, pci->dbi_base + offset + in qcom_pcie_init_2_3_3()
1253 u16 val = readw(pci->dbi_base + offset + PCI_EXP_LNKSTA); in qcom_pcie_link_up()
1405 pci->dbi_base = devm_pci_remap_cfg_resource(dev, res); in qcom_pcie_probe()
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H A Dpcie-dw-ep-rockchip.c208 struct resource *dbi_base; in rockchip_pcie_resource_get() local
214 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, in rockchip_pcie_resource_get()
216 if (!dbi_base) { in rockchip_pcie_resource_get()
221 rockchip->pci.dbi_base = devm_ioremap_resource(dev, dbi_base); in rockchip_pcie_resource_get()
222 if (IS_ERR(rockchip->pci.dbi_base)) in rockchip_pcie_resource_get()
223 return PTR_ERR(rockchip->pci.dbi_base); in rockchip_pcie_resource_get()
224 rockchip->pci.atu_base = rockchip->pci.dbi_base + DEFAULT_DBI_ATU_OFFSET; in rockchip_pcie_resource_get()
225 rockchip->dbi_base_physical = dbi_base->start; in rockchip_pcie_resource_get()
H A Dpcie-armada8k.c316 pci->dbi_base = devm_pci_remap_cfg_resource(dev, base); in armada8k_pcie_probe()
317 if (IS_ERR(pci->dbi_base)) { in armada8k_pcie_probe()
318 ret = PTR_ERR(pci->dbi_base); in armada8k_pcie_probe()
H A Dpcie-uniphier-ep.c318 priv->pci.dbi_base = devm_pci_remap_cfg_resource(dev, res); in uniphier_pcie_ep_probe()
319 if (IS_ERR(priv->pci.dbi_base)) in uniphier_pcie_ep_probe()
320 return PTR_ERR(priv->pci.dbi_base); in uniphier_pcie_ep_probe()
H A Dpci-imx6.c1007 struct resource *dbi_base; in imx6_pcie_probe() local
1043 dbi_base = platform_get_resource(pdev, IORESOURCE_MEM, 0); in imx6_pcie_probe()
1044 pci->dbi_base = devm_ioremap_resource(dev, dbi_base); in imx6_pcie_probe()
1045 if (IS_ERR(pci->dbi_base)) in imx6_pcie_probe()
1046 return PTR_ERR(pci->dbi_base); in imx6_pcie_probe()
1097 if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) in imx6_pcie_probe()
H A Dpci-dra7xx.c588 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "ep_dbics"); in dra7xx_add_pcie_ep()
589 if (IS_ERR(pci->dbi_base)) in dra7xx_add_pcie_ep()
590 return PTR_ERR(pci->dbi_base); in dra7xx_add_pcie_ep()
629 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "rc_dbics"); in dra7xx_add_pcie_port()
630 if (IS_ERR(pci->dbi_base)) in dra7xx_add_pcie_port()
631 return PTR_ERR(pci->dbi_base); in dra7xx_add_pcie_port()
H A Dpcie-uniphier.c408 priv->pci.dbi_base = devm_pci_remap_cfg_resource(dev, res); in uniphier_pcie_probe()
409 if (IS_ERR(priv->pci.dbi_base)) in uniphier_pcie_probe()
410 return PTR_ERR(priv->pci.dbi_base); in uniphier_pcie_probe()
H A Dpcie-designware-host.c332 if (!pci->dbi_base) { in dw_pcie_host_init()
333 pci->dbi_base = devm_pci_remap_cfgspace(dev, in dw_pcie_host_init()
336 if (!pci->dbi_base) { in dw_pcie_host_init()
520 return pci->dbi_base + where; in dw_pcie_own_conf_map_bus()
H A Dpcie-kirin.c160 kirin_pcie->pci->dbi_base = in kirin_pcie_get_resource()
162 if (IS_ERR(kirin_pcie->pci->dbi_base)) in kirin_pcie_get_resource()
163 return PTR_ERR(kirin_pcie->pci->dbi_base); in kirin_pcie_get_resource()
H A Dpcie-histb.c335 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "rc-dbi"); in histb_pcie_probe()
336 if (IS_ERR(pci->dbi_base)) { in histb_pcie_probe()
338 return PTR_ERR(pci->dbi_base); in histb_pcie_probe()
H A Dpcie-dw-rockchip.c165 void __iomem *dbi_base; member
1204 rk_pcie->pci->dbi_base2 = rk_pcie->pci->dbi_base + PCIE_TYPE0_HDR_DBI2_OFFSET; in rk_pcie_add_ep()
1205 rk_pcie->pci->atu_base = rk_pcie->pci->dbi_base + DEFAULT_DBI_ATU_OFFSET; in rk_pcie_add_ep()
1249 struct resource *dbi_base; in rk_pcie_resource_get() local
1252 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, in rk_pcie_resource_get()
1254 if (!dbi_base) { in rk_pcie_resource_get()
1259 rk_pcie->dbi_base = devm_ioremap_resource(&pdev->dev, dbi_base); in rk_pcie_resource_get()
1260 if (IS_ERR(rk_pcie->dbi_base)) in rk_pcie_resource_get()
1261 return PTR_ERR(rk_pcie->dbi_base); in rk_pcie_resource_get()
1263 rk_pcie->pci->dbi_base = rk_pcie->dbi_base; in rk_pcie_resource_get()
H A Dpcie-artpec6.c472 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "dbi"); in artpec6_pcie_probe()
473 if (IS_ERR(pci->dbi_base)) in artpec6_pcie_probe()
474 return PTR_ERR(pci->dbi_base); in artpec6_pcie_probe()
H A Dpci-meson.c113 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "elbi"); in meson_pcie_get_mems()
114 if (IS_ERR(pci->dbi_base)) in meson_pcie_get_mems()
115 return PTR_ERR(pci->dbi_base); in meson_pcie_get_mems()
H A Dpcie-tegra194.c2100 pci->dbi_base = devm_ioremap_resource(dev, dbi_res); in tegra_pcie_dw_probe()
2101 if (IS_ERR(pci->dbi_base)) in tegra_pcie_dw_probe()
2102 return PTR_ERR(pci->dbi_base); in tegra_pcie_dw_probe()
2105 pci->dbi_base2 = pci->dbi_base + 0x1000; in tegra_pcie_dw_probe()
/OK3568_Linux_fs/u-boot/drivers/pci/
H A Dpcie_imx.c99 static int pcie_phy_poll_ack(void __iomem *dbi_base, int exp_val) in pcie_phy_poll_ack() argument
106 val = readl(dbi_base + PCIE_PHY_STAT); in pcie_phy_poll_ack()
119 static int pcie_phy_wait_ack(void __iomem *dbi_base, int addr) in pcie_phy_wait_ack() argument
125 writel(val, dbi_base + PCIE_PHY_CTRL); in pcie_phy_wait_ack()
128 writel(val, dbi_base + PCIE_PHY_CTRL); in pcie_phy_wait_ack()
130 ret = pcie_phy_poll_ack(dbi_base, 1); in pcie_phy_wait_ack()
135 writel(val, dbi_base + PCIE_PHY_CTRL); in pcie_phy_wait_ack()
137 ret = pcie_phy_poll_ack(dbi_base, 0); in pcie_phy_wait_ack()
145 static int pcie_phy_read(void __iomem *dbi_base, int addr , int *data) in pcie_phy_read() argument
150 ret = pcie_phy_wait_ack(dbi_base, addr); in pcie_phy_read()
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H A Dpcie_dw_rockchip.c60 void *dbi_base; member
230 return (readl(rk_pcie->dbi_base + PCIE_LINK_STATUS_REG) & in rk_pcie_get_link_speed()
236 return (readl(rk_pcie->dbi_base + PCIE_LINK_STATUS_REG) & in rk_pcie_get_link_width()
244 void __iomem *base = rk_pcie->dbi_base; in rk_pcie_writel_ob_unroll()
252 void __iomem *base = rk_pcie->dbi_base; in rk_pcie_readl_ob_unroll()
261 val = readl(rk_pcie->dbi_base + PCIE_MISC_CONTROL_1_OFF); in rk_pcie_dbi_write_enable()
267 writel(val, rk_pcie->dbi_base + PCIE_MISC_CONTROL_1_OFF); in rk_pcie_dbi_write_enable()
278 rk_pcie->dbi_base + PCI_BASE_ADDRESS_0); in rk_pcie_setup_host()
279 writel(0x0, rk_pcie->dbi_base + PCI_BASE_ADDRESS_1); in rk_pcie_setup_host()
282 val = readl(rk_pcie->dbi_base + PCI_INTERRUPT_LINE); in rk_pcie_setup_host()
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