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Searched refs:cfg_reg (Results 1 – 25 of 38) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/clk/spear/
H A Dclk-vco-pll.c134 p = readl_relaxed(pll->vco->cfg_reg); in clk_pll_recalc_rate()
157 val = readl_relaxed(pll->vco->cfg_reg); in clk_pll_set_rate()
160 writel_relaxed(val, pll->vco->cfg_reg); in clk_pll_set_rate()
204 val = readl_relaxed(vco->cfg_reg); in clk_vco_recalc_rate()
249 val = readl_relaxed(vco->cfg_reg); in clk_vco_set_rate()
261 writel_relaxed(val, vco->cfg_reg); in clk_vco_set_rate()
278 *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, in clk_register_vco_pll()
288 if (!vco_name || !pll_name || !parent_name || !mode_reg || !cfg_reg || in clk_register_vco_pll()
304 vco->cfg_reg = cfg_reg; in clk_register_vco_pll()
H A Dclk.h96 void __iomem *cfg_reg; member
126 *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
/OK3568_Linux_fs/kernel/arch/sparc/kernel/
H A Dsbus.c65 unsigned long cfg_reg; in sbus_set_sbus64() local
77 cfg_reg = iommu->write_complete_reg; in sbus_set_sbus64()
80 cfg_reg += 0x20UL; in sbus_set_sbus64()
83 cfg_reg += 0x28UL; in sbus_set_sbus64()
86 cfg_reg += 0x30UL; in sbus_set_sbus64()
89 cfg_reg += 0x38UL; in sbus_set_sbus64()
92 cfg_reg += 0x40UL; in sbus_set_sbus64()
95 cfg_reg += 0x48UL; in sbus_set_sbus64()
98 cfg_reg += 0x50UL; in sbus_set_sbus64()
105 val = upa_readq(cfg_reg); in sbus_set_sbus64()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/arm1136/mx35/
H A Dmx35_sdram.c44 u32 *cfg_reg, *ctl_reg; in mx3_setup_sdram_bank() local
50 cfg_reg = &esdc->esdcfg0; in mx3_setup_sdram_bank()
54 cfg_reg = &esdc->esdcfg1; in mx3_setup_sdram_bank()
80 writel(ddr2_config, cfg_reg); in mx3_setup_sdram_bank()
/OK3568_Linux_fs/kernel/drivers/video/rockchip/rve/
H A Drve_reg.c83 uint32_t cfg_reg[40] = {0}; in rve_dump_read_back_reg() local
95 cfg_reg[i] = rve_read(RVE_CFG_REG + i * 4, scheduler); in rve_dump_read_back_reg()
117 cfg_reg[0 + i * 4], cfg_reg[1 + i * 4], in rve_dump_read_back_reg()
118 cfg_reg[2 + i * 4], cfg_reg[3 + i * 4]); in rve_dump_read_back_reg()
/OK3568_Linux_fs/kernel/drivers/pinctrl/renesas/
H A Dcore.c846 const struct pinmux_cfg_reg *cfg_reg) in sh_pfc_check_cfg_reg() argument
850 sh_pfc_check_reg(drvname, cfg_reg->reg); in sh_pfc_check_cfg_reg()
852 if (cfg_reg->field_width) { in sh_pfc_check_cfg_reg()
853 fw = cfg_reg->field_width; in sh_pfc_check_cfg_reg()
854 n = (cfg_reg->reg_width / fw) << fw; in sh_pfc_check_cfg_reg()
859 for (i = 0, n = 0, rw = 0; (fw = cfg_reg->var_field_width[i]); i++) { in sh_pfc_check_cfg_reg()
860 if (fw > 3 && is0s(&cfg_reg->enum_ids[n], 1 << fw)) in sh_pfc_check_cfg_reg()
862 cfg_reg->reg, rw, rw + fw - 1); in sh_pfc_check_cfg_reg()
867 if (rw != cfg_reg->reg_width) in sh_pfc_check_cfg_reg()
869 cfg_reg->reg, rw, cfg_reg->reg_width); in sh_pfc_check_cfg_reg()
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/
H A Dclk-lochnagar.c32 u16 cfg_reg; member
87 .cfg_reg = LOCHNAGAR1_##REG, \
96 .cfg_reg = LOCHNAGAR2_##ID##_CTRL, \
152 ret = regmap_update_bits(regmap, lclk->cfg_reg, in lochnagar_clk_prepare()
168 ret = regmap_update_bits(regmap, lclk->cfg_reg, lclk->ena_mask, 0); in lochnagar_clk_unprepare()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_indep_power/
H A Daiutils.c1189 uint32 cfg_reg = 0; in ai_dumpregs() local
1198 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_dumpregs()
1201 cfg_reg = PCI_BAR0_WIN2; in ai_dumpregs()
1205 prev_value = OSL_PCI_READ_CONFIG(osh, cfg_reg, 4); in ai_dumpregs()
1221 cfg_reg, 4, axi_wrapper[i].wrapper_addr); in ai_dumpregs()
1280 if (prev_value && cfg_reg) { in ai_dumpregs()
1281 OSL_PCI_WRITE_CONFIG(osh, cfg_reg, 4, prev_value); in ai_dumpregs()
1300 uint32 cfg_reg = 0; in ai_enable_backplane_timeouts() local
1319 cfg_reg = PCI_BAR0_WIN2; in ai_enable_backplane_timeouts()
1322 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_enable_backplane_timeouts()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-omap1/
H A Dmux.c445 || !arch_mux_cfg->cfg_reg) { in omap_mux_register()
483 if (!mux_cfg->cfg_reg) in omap_cfg_reg()
486 return mux_cfg->cfg_reg(reg); in omap_cfg_reg()
495 arch_mux_cfg.cfg_reg = omap1_cfg_reg; in omap1_mux_init()
501 arch_mux_cfg.cfg_reg = omap1_cfg_reg; in omap1_mux_init()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/
H A Daiutils.c1353 uint32 cfg_reg = 0; in ai_dumpregs() local
1361 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_dumpregs()
1364 cfg_reg = PCI_BAR0_WIN2; in ai_dumpregs()
1368 prev_value = OSL_PCI_READ_CONFIG(osh, cfg_reg, 4); in ai_dumpregs()
1384 cfg_reg, 4, axi_wrapper[i].wrapper_addr); in ai_dumpregs()
1435 if (prev_value && cfg_reg) { in ai_dumpregs()
1436 OSL_PCI_WRITE_CONFIG(osh, cfg_reg, 4, prev_value); in ai_dumpregs()
1456 uint32 cfg_reg = 0; in ai_update_backplane_timeouts() local
1475 cfg_reg = PCI_BAR0_WIN2; in ai_update_backplane_timeouts()
1478 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_update_backplane_timeouts()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/
H A Daiutils.c1353 uint32 cfg_reg = 0; in ai_dumpregs() local
1361 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_dumpregs()
1364 cfg_reg = PCI_BAR0_WIN2; in ai_dumpregs()
1368 prev_value = OSL_PCI_READ_CONFIG(osh, cfg_reg, 4); in ai_dumpregs()
1384 cfg_reg, 4, axi_wrapper[i].wrapper_addr); in ai_dumpregs()
1435 if (prev_value && cfg_reg) { in ai_dumpregs()
1436 OSL_PCI_WRITE_CONFIG(osh, cfg_reg, 4, prev_value); in ai_dumpregs()
1456 uint32 cfg_reg = 0; in ai_update_backplane_timeouts() local
1475 cfg_reg = PCI_BAR0_WIN2; in ai_update_backplane_timeouts()
1478 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_update_backplane_timeouts()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/infineon/
H A Daiutils.c1353 uint32 cfg_reg = 0; in ai_dumpregs() local
1361 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_dumpregs()
1364 cfg_reg = PCI_BAR0_WIN2; in ai_dumpregs()
1368 prev_value = OSL_PCI_READ_CONFIG(osh, cfg_reg, 4); in ai_dumpregs()
1384 cfg_reg, 4, axi_wrapper[i].wrapper_addr); in ai_dumpregs()
1435 if (prev_value && cfg_reg) { in ai_dumpregs()
1436 OSL_PCI_WRITE_CONFIG(osh, cfg_reg, 4, prev_value); in ai_dumpregs()
1456 uint32 cfg_reg = 0; in ai_update_backplane_timeouts() local
1475 cfg_reg = PCI_BAR0_WIN2; in ai_update_backplane_timeouts()
1478 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_update_backplane_timeouts()
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/wfx/
H A Dbh.c226 u32 cfg_reg; in ack_sdio_data() local
228 config_reg_read(wdev, &cfg_reg); in ack_sdio_data()
229 if (cfg_reg & 0xFF) { in ack_sdio_data()
231 cfg_reg & 0xFF); in ack_sdio_data()
/OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/
H A Daiutils.c1436 uint32 cfg_reg = 0; in ai_dumpregs() local
1444 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_dumpregs()
1447 cfg_reg = PCI_BAR0_WIN2; in ai_dumpregs()
1451 prev_value = OSL_PCI_READ_CONFIG(osh, cfg_reg, 4); in ai_dumpregs()
1467 cfg_reg, 4, axi_wrapper[i].wrapper_addr); in ai_dumpregs()
1511 if (prev_value && cfg_reg) { in ai_dumpregs()
1512 OSL_PCI_WRITE_CONFIG(osh, cfg_reg, 4, prev_value); in ai_dumpregs()
1652 uint32 cfg_reg = 0; in ai_update_backplane_timeouts() local
1672 cfg_reg = PCI_BAR0_WIN2; in ai_update_backplane_timeouts()
1675 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_update_backplane_timeouts()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/
H A Daiutils.c1436 uint32 cfg_reg = 0; in ai_dumpregs() local
1444 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_dumpregs()
1447 cfg_reg = PCI_BAR0_WIN2; in ai_dumpregs()
1451 prev_value = OSL_PCI_READ_CONFIG(osh, cfg_reg, 4); in ai_dumpregs()
1467 cfg_reg, 4, axi_wrapper[i].wrapper_addr); in ai_dumpregs()
1511 if (prev_value && cfg_reg) { in ai_dumpregs()
1512 OSL_PCI_WRITE_CONFIG(osh, cfg_reg, 4, prev_value); in ai_dumpregs()
1652 uint32 cfg_reg = 0; in ai_update_backplane_timeouts() local
1672 cfg_reg = PCI_BAR0_WIN2; in ai_update_backplane_timeouts()
1675 cfg_reg = PCIE2_BAR0_CORE2_WIN2; in ai_update_backplane_timeouts()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Dmediatek-vpu.txt11 "cfg_reg": Main configuration registers base
27 reg-names = "tcm", "cfg_reg";
/OK3568_Linux_fs/kernel/drivers/irqchip/
H A Dqcom-pdc.c99 void __iomem *cfg_reg = spi_cfg->base + pin * 4; in __spi_pin_read() local
108 return readl(cfg_reg); in __spi_pin_read()
114 void __iomem *cfg_reg = spi_cfg->base + pin * 4; in __spi_pin_write() local
120 writel(val, cfg_reg); in __spi_pin_write()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/altera/
H A Daltera_tse_main.c638 u32 cfg_reg = ioread32(&priv->mac_dev->command_config); in altera_tse_adjust_link() local
644 cfg_reg |= MAC_CMDCFG_HD_ENA; in altera_tse_adjust_link()
646 cfg_reg &= ~MAC_CMDCFG_HD_ENA; in altera_tse_adjust_link()
659 cfg_reg |= MAC_CMDCFG_ETH_SPEED; in altera_tse_adjust_link()
660 cfg_reg &= ~MAC_CMDCFG_ENA_10; in altera_tse_adjust_link()
663 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED; in altera_tse_adjust_link()
664 cfg_reg &= ~MAC_CMDCFG_ENA_10; in altera_tse_adjust_link()
667 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED; in altera_tse_adjust_link()
668 cfg_reg |= MAC_CMDCFG_ENA_10; in altera_tse_adjust_link()
678 iowrite32(cfg_reg, &priv->mac_dev->command_config); in altera_tse_adjust_link()
/OK3568_Linux_fs/u-boot/drivers/spi/
H A Dmxc_spi.c47 u32 cfg_reg; member
209 mxcs->cfg_reg = reg_config; in spi_cfg_mxc()
237 reg_write(&regs->cfg, mxcs->cfg_reg); in spi_xchg_single()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_component.c577 u32 __iomem *cfg_reg, in compiz_enable_input() argument
593 malidp_write32(cfg_reg, CU_INPUT0_SIZE, in compiz_enable_input()
595 malidp_write32(cfg_reg, CU_INPUT0_OFFSET, in compiz_enable_input()
597 malidp_write32(cfg_reg, CU_INPUT0_CONTROL, ctrl); in compiz_enable_input()
605 u32 __iomem *id_reg, *cfg_reg; in d71_compiz_update() local
610 cfg_reg = reg + index * CU_PER_INPUT_REGS; in d71_compiz_update()
612 compiz_enable_input(id_reg, cfg_reg, in d71_compiz_update()
617 malidp_write32(cfg_reg, CU_INPUT0_CONTROL, 0); in d71_compiz_update()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/hisilicon/
H A Dhns_mdio.c146 u32 cfg_reg, u32 set_val, in mdio_sc_cfg_reg_write() argument
153 regmap_write(mdio_dev->subctrl_vbase, cfg_reg, set_val); in mdio_sc_cfg_reg_write()
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Datmel-mci.c341 u32 cfg_reg; member
1260 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_start_request()
1406 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_set_ios()
1458 host->cfg_reg |= ATMCI_CFG_HSMODE; in atmci_set_ios()
1460 host->cfg_reg &= ~ATMCI_CFG_HSMODE; in atmci_set_ios()
1466 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_set_ios()
1576 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_request_end()
1675 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_detect_change()
/OK3568_Linux_fs/kernel/drivers/pinctrl/samsung/
H A Dpinctrl-samsung.c440 u32 cfg_value, cfg_reg; in samsung_pinconf_rw() local
452 cfg_reg = type->reg_offset[cfg_type]; in samsung_pinconf_rw()
458 data = readl(reg_base + cfg_reg); in samsung_pinconf_rw()
464 writel(data, reg_base + cfg_reg); in samsung_pinconf_rw()
/OK3568_Linux_fs/kernel/arch/arm/mach-omap1/include/mach/
H A Dmux.h425 int (*cfg_reg)(const struct pin_config *cfg); member
/OK3568_Linux_fs/kernel/drivers/net/wireless/intel/iwlwifi/pcie/
H A Dtrans.c3210 u32 base, end, cfg_reg, monitor_len; in iwl_trans_get_fw_monitor_len() local
3213 cfg_reg = le32_to_cpu(trans->dbg.dest_tlv->base_reg); in iwl_trans_get_fw_monitor_len()
3214 cfg_reg = iwl_read_prph(trans, cfg_reg); in iwl_trans_get_fw_monitor_len()
3215 base = (cfg_reg & IWL_LDBG_M2S_BUF_BA_MSK) << in iwl_trans_get_fw_monitor_len()
3221 (cfg_reg & IWL_LDBG_M2S_BUF_SIZE_MSK) >> in iwl_trans_get_fw_monitor_len()

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