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Searched refs:CLK_TOP_MSDC30_3_SEL (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt8135-clk.h83 #define CLK_TOP_MSDC30_3_SEL 72 macro
H A Dmt8173-clk.h109 #define CLK_TOP_MSDC30_3_SEL 99 macro
H A Dmt2712-clk.h146 #define CLK_TOP_MSDC30_3_SEL 115 macro
H A Dmt2701-clk.h126 #define CLK_TOP_MSDC30_3_SEL 115 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt8135.c366 MUX_GATE(CLK_TOP_MSDC30_3_SEL, "msdc30_3_sel", msdc30_parents, 0x0148, 16, 3, 23),
H A Dclk-mt2701.c574 MUX_GATE(CLK_TOP_MSDC30_3_SEL, "msdc30_3_sel", msdc30_parents,
H A Dclk-mt8173.c563 MUX_GATE(CLK_TOP_MSDC30_3_SEL, "msdc30_3_sel", msdc30_3_parents, 0x0080, 8, 4, 15),
H A Dclk-mt2712.c774 MUX_GATE(CLK_TOP_MSDC30_3_SEL, "msdc30_3_sel",