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Searched refs:BIT_6 (Results 1 – 23 of 23) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/net/ethernet/realtek/r8168/
H A Dr8168_dash.h188 #define TXS_OWC BIT_6
227 #define ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE BIT_6
H A Dr8168_n.c4278 if (tp->org_pci_offset_99 & (BIT_5 | BIT_6)) in rtl8168_enable_pci_offset_99()
4321 csi_tmp |= BIT_6 | BIT_7; in rtl8168_init_pci_offset_99()
4987 RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6); in rtl8168_powerdown_pll()
4990 RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6); in rtl8168_powerdown_pll()
4991 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6); in rtl8168_powerdown_pll()
5023 RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6); in rtl8168_powerup_pll()
6114 data |= (BIT_4 | BIT_5 | BIT_6); in rtl8168_enable_EEE()
6139 data |= (BIT_4 | BIT_5 | BIT_6); in rtl8168_enable_EEE()
8888 RTL_W8(tp, 0x6E, RTL_R8(tp, 0x6E) | BIT_6); in rtl8168_hw_init()
8898 RTL_W8(tp, 0x6E, RTL_R8(tp, 0x6E) | BIT_6); in rtl8168_hw_init()
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H A Dr8168.h1396 BIT_6 = (1 << 6), enumerator
/OK3568_Linux_fs/kernel/drivers/scsi/
H A Dqla1280.h23 #define BIT_6 0x40 macro
127 #define ISP_CFG1_F128 BIT_6 /* 128-byte FIFO threshold */
967 #define OF_DATA_IN BIT_6 /* Data in to initiator */
971 #define OF_NO_DATA (BIT_7 | BIT_6)
H A Dqla1280.c447 return BIT_6; in qla1280_data_direction()
449 return BIT_5 | BIT_6; in qla1280_data_direction()
1143 mr |= BIT_6; in qla1280_set_target_parameters()
1704 #define CMD_ARGS (BIT_7 | BIT_6 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0)
1908 if (!(status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_4 | in qla1280_init_rings()
1922 status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_5 | in qla1280_init_rings()
2191 cfg1 = RD_REG_WORD(&reg->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); in qla1280_nvram_config()
2250 status |= qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_2 | in qla1280_nvram_config()
3903 qla1280_mailbox_command(ha, BIT_6 | BIT_3 | BIT_2 | BIT_1 | BIT_0, in qla1280_get_target_parameters()
/OK3568_Linux_fs/kernel/drivers/scsi/qla2xxx/
H A Dqla_target.h86 #define OF_DATA_IN BIT_6 /* Data in to initiator */
90 #define OF_NO_DATA (BIT_7 | BIT_6)
464 #define CTIO7_FLAGS_STATUS_MODE_1 BIT_6
835 TRC_SRR_RSP = BIT_6,
H A Dqla_fw.h21 #define FO1_DISABLE_LED_CTRL BIT_6
42 #define PDF_ACK0_CAPABLE BIT_6
618 #define SF_NVME_ERSP BIT_6
899 #define LCF_EXPL_LOGO BIT_6 /* Perform an explicit LOGO. */
900 #define LCF_NVME_PRLI BIT_6 /* Perform NVME FC4 PRLI */
1200 #define HCCRX_HOST_INT BIT_6 /* Host to RISC interrupt bit. */
H A Dqla_def.h87 #define BIT_6 0x40 macro
371 #define SRB_WAKEUP_ON_COMP BIT_6
1128 #define FO1_DISABLE_GPIO6_7 BIT_6 /* LED bits */
1145 #define ADD_FO1_DISABLE_GPIO_LED_CTRL BIT_6 /* LED bits */
1301 #define MBX_6 BIT_6
1895 #define CF_WRITE BIT_6
2055 #define RF_RQ_DMA_ERROR BIT_6 /* Request Queue DMA error. */
2212 #define SCM_EDC_ACC_RECEIVED BIT_6
4044 #define DT_ISP6322 BIT_6
5063 #define FC_LL_S BIT_6 /* Short */
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H A Dqla_init.c4001 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()
4014 (BIT_7 | BIT_6 | BIT_5)) >> 5; in qla2x00_update_fw_options()
4019 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()
4205 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && in qla24xx_config_rings()
4332 BIT_6) != 0; in qla2x00_init_rings()
4793 nv->firmware_options[0] |= (BIT_6 | BIT_1); in qla2x00_nvram_config()
4801 nv->special_options[0] &= ~BIT_6; in qla2x00_nvram_config()
4820 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == in qla2x00_nvram_config()
4823 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); in qla2x00_nvram_config()
4853 if ((icb->firmware_options[1] & BIT_6) == 0) { in qla2x00_nvram_config()
[all …]
H A Dqla_mid.c874 options |= BIT_6; in qla25xx_create_rsp_que()
H A Dqla_mbx.c2300 mcp->mb[1] |= BIT_6; in qla24xx_link_initialize()
4063 BIT_6)) { in qla24xx_report_id_acquisition()
5246 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing in qla2x00_loopback_test()
5310 mcp->mb[1] = mreq->options | BIT_15 | BIT_6; in qla2x00_echo_test()
6287 else if (subcode & (BIT_6 | BIT_7)) { in qla83xx_access_control()
H A Dqla_os.c1999 if (!(ha->fw_attributes & BIT_6)) in qla2x00_iospace_config()
5938 if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5)) in qla24xx_process_purex_rdp()
5952 sfp_flags |= BIT_6; /* sfp+ */ in qla24xx_process_purex_rdp()
5999 rsp_payload->ls_err_desc.pn_port_phy_type |= BIT_6; in qla24xx_process_purex_rdp()
H A Dqla_target.c6896 tmp = ~(BIT_4|BIT_5|BIT_6); in qlt_24xx_config_nvram_stage1()
7000 tmp = ~(BIT_4|BIT_5|BIT_6); in qlt_81xx_config_nvram_stage1()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_ctx.c1345 arg1 |= (BIT_4 | BIT_6 | BIT_7); in qlcnic_config_switch_port()
1352 arg1 &= ~BIT_6; in qlcnic_config_switch_port()
1422 esw_cfg->promisc_mode = !!(arg1 & BIT_6); in qlcnic_get_eswitch_port_config()
H A Dqlcnic_83xx_hw.h58 #define QLC_83XX_FW_CAPABILITY_TSO BIT_6
H A Dqlcnic_hdr.h201 #define BIT_6 0x40 macro
H A Dqlcnic_sriov_pf.c390 cmd.req.arg[1] = ((func & 0xf) << 2) | BIT_6 | BIT_1; in qlcnic_sriov_pf_cfg_eswitch()
710 cmd.req.arg[2] |= BIT_6; in qlcnic_sriov_set_vf_acl()
H A Dqlcnic_minidump.c29 #define QLCNIC_DUMP_WRT_SAVED BIT_6
H A Dqlcnic_sriov_common.c390 if (status & BIT_6) in qlcnic_sriov_get_vf_vport_info()
H A Dqlcnic_main.c1316 if (adapter->ahw->capabilities & BIT_6) { in qlcnic_initialize_nic()
/OK3568_Linux_fs/kernel/drivers/scsi/qla4xxx/
H A Dql4_def.h87 #define BIT_6 0x40 macro
H A Dql4_mbx.c1652 chap_table->flags |= BIT_6; /* peer */ in qla4xxx_set_chap()
1796 if (chap_table->flags & BIT_6) in qla4xxx_get_chap_index()
H A Dql4_os.c813 if (chap_table->flags & BIT_6) /* peer */ in qla4xxx_get_chap_list()
3656 SET_BITVAL(sess->auto_snd_tgt_disable, options, BIT_6); in qla4xxx_copy_to_fwddb_param()
3669 SET_BITVAL(conn->snack_req_en, options, BIT_6); in qla4xxx_copy_to_fwddb_param()
3678 SET_BITVAL(conn->tcp_timestamp_stat, options, BIT_6); in qla4xxx_copy_to_fwddb_param()
6061 if (!(chap_table->flags & BIT_6)) /* Not BIDI */ in qla4xxx_get_bidi_chap()