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Searched refs:rev (Results 1 – 25 of 1077) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/include/
H A Dd11.h583 #define D11_PHY_RXPLCP_LEN(rev) (D11_PHY_HDR_LEN) argument
584 #define D11_PHY_RXPLCP_OFF(rev) (0) argument
2663 #define RXS_SHORT_ENAB(rev) (D11REV_GE(rev, 64) || \ argument
2664 D11REV_IS(rev, 60) || \
2665 D11REV_IS(rev, 62))
2667 #define RXS_MID_ENAB(rev) (D11REV_GE(rev, 80)) argument
2668 #define RXS_LONG_ENAB(rev) (D11REV_GE(rev, 80)) argument
2670 #define IS_D11RXHDRSHORT(rxh, rev, rev_min) ((RXS_SHORT_ENAB(rev) && \ argument
2671 ((D11RXHDR_ACCESS_VAL((rxh), (rev), (rev_min), dma_flags)) & RXS_SHORT_MASK)) != 0)
2673 #define IS_D11RXHDRMID(rxh, rev, rev_min) ((RXS_MID_ENAB(rev) && \ argument
[all …]
H A Dpcie_core.h29 #define REV_GE_73(rev) (PCIECOREREV((rev)) >= 73) argument
30 #define REV_GE_69(rev) (PCIECOREREV((rev)) >= 69) argument
31 #define REV_GE_68(rev) (PCIECOREREV((rev)) >= 68) argument
32 #define REV_GE_64(rev) (PCIECOREREV((rev)) >= 64) argument
33 #define REV_GE_15(rev) (PCIECOREREV((rev)) >= 15) argument
447 #define PCIE_IDMA_MODE_EN(rev) (REV_GE_64(rev) ? 0x1 : 0x800000) /* implicit M2M DMA mode */ argument
505 #define PCIE_MB_TOPCIE_DB0_D2H0(rev) (REV_GE_64(rev) ? 0x0001 : 0x010000) argument
506 #define PCIE_MB_TOPCIE_DB0_D2H1(rev) (REV_GE_64(rev) ? 0x0002 : 0x020000) argument
507 #define PCIE_MB_TOPCIE_DB1_D2H0(rev) (REV_GE_64(rev) ? 0x0004 : 0x040000) argument
508 #define PCIE_MB_TOPCIE_DB1_D2H1(rev) (REV_GE_64(rev) ? 0x0008 : 0x080000) argument
[all …]
H A Dbcmdefs.h360 #define CHIPREV(rev) (BCMCHIPREV) argument
362 #define CHIPREV(rev) (rev) argument
366 #define PCIECOREREV(rev) (BCMPCIEREV) argument
368 #define PCIECOREREV(rev) (rev) argument
372 #define PMUREV(rev) (BCMPMUREV) argument
374 #define PMUREV(rev) (rev) argument
378 #define CCREV(rev) (BCMCCREV) argument
380 #define CCREV(rev) (rev) argument
384 #define GCIREV(rev) (BCMGCIREV) argument
386 #define GCIREV(rev) (rev) argument
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/
H A Dpcie_core.h37 #define REV_GE_64(rev) (rev >= 64) argument
409 #define PCIE_IDMA_MODE_EN(rev) (REV_GE_64(rev) ? 0x1 : 0x800000) /* implicit M2M DMA mode */ argument
465 #define PCIE_MB_TOPCIE_DB0_D2H0(rev) (REV_GE_64(rev) ? 0x0001 : 0x010000) argument
466 #define PCIE_MB_TOPCIE_DB0_D2H1(rev) (REV_GE_64(rev) ? 0x0002 : 0x020000) argument
467 #define PCIE_MB_TOPCIE_DB1_D2H0(rev) (REV_GE_64(rev) ? 0x0004 : 0x040000) argument
468 #define PCIE_MB_TOPCIE_DB1_D2H1(rev) (REV_GE_64(rev) ? 0x0008 : 0x080000) argument
469 #define PCIE_MB_TOPCIE_DB2_D2H0(rev) (REV_GE_64(rev) ? 0x0010 : 0x100000) argument
470 #define PCIE_MB_TOPCIE_DB2_D2H1(rev) (REV_GE_64(rev) ? 0x0020 : 0x200000) argument
471 #define PCIE_MB_TOPCIE_DB3_D2H0(rev) (REV_GE_64(rev) ? 0x0040 : 0x400000) argument
472 #define PCIE_MB_TOPCIE_DB3_D2H1(rev) (REV_GE_64(rev) ? 0x0080 : 0x800000) argument
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/
H A Dpcie_core.h37 #define REV_GE_64(rev) (rev >= 64) argument
409 #define PCIE_IDMA_MODE_EN(rev) (REV_GE_64(rev) ? 0x1 : 0x800000) /* implicit M2M DMA mode */ argument
465 #define PCIE_MB_TOPCIE_DB0_D2H0(rev) (REV_GE_64(rev) ? 0x0001 : 0x010000) argument
466 #define PCIE_MB_TOPCIE_DB0_D2H1(rev) (REV_GE_64(rev) ? 0x0002 : 0x020000) argument
467 #define PCIE_MB_TOPCIE_DB1_D2H0(rev) (REV_GE_64(rev) ? 0x0004 : 0x040000) argument
468 #define PCIE_MB_TOPCIE_DB1_D2H1(rev) (REV_GE_64(rev) ? 0x0008 : 0x080000) argument
469 #define PCIE_MB_TOPCIE_DB2_D2H0(rev) (REV_GE_64(rev) ? 0x0010 : 0x100000) argument
470 #define PCIE_MB_TOPCIE_DB2_D2H1(rev) (REV_GE_64(rev) ? 0x0020 : 0x200000) argument
471 #define PCIE_MB_TOPCIE_DB3_D2H0(rev) (REV_GE_64(rev) ? 0x0040 : 0x400000) argument
472 #define PCIE_MB_TOPCIE_DB3_D2H1(rev) (REV_GE_64(rev) ? 0x0080 : 0x800000) argument
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/
H A Dpcie_core.h37 #define REV_GE_64(rev) (rev >= 64) argument
409 #define PCIE_IDMA_MODE_EN(rev) (REV_GE_64(rev) ? 0x1 : 0x800000) /* implicit M2M DMA mode */ argument
465 #define PCIE_MB_TOPCIE_DB0_D2H0(rev) (REV_GE_64(rev) ? 0x0001 : 0x010000) argument
466 #define PCIE_MB_TOPCIE_DB0_D2H1(rev) (REV_GE_64(rev) ? 0x0002 : 0x020000) argument
467 #define PCIE_MB_TOPCIE_DB1_D2H0(rev) (REV_GE_64(rev) ? 0x0004 : 0x040000) argument
468 #define PCIE_MB_TOPCIE_DB1_D2H1(rev) (REV_GE_64(rev) ? 0x0008 : 0x080000) argument
469 #define PCIE_MB_TOPCIE_DB2_D2H0(rev) (REV_GE_64(rev) ? 0x0010 : 0x100000) argument
470 #define PCIE_MB_TOPCIE_DB2_D2H1(rev) (REV_GE_64(rev) ? 0x0020 : 0x200000) argument
471 #define PCIE_MB_TOPCIE_DB3_D2H0(rev) (REV_GE_64(rev) ? 0x0040 : 0x400000) argument
472 #define PCIE_MB_TOPCIE_DB3_D2H1(rev) (REV_GE_64(rev) ? 0x0080 : 0x800000) argument
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/include/
H A Dpcie_core.h29 #define REV_GE_73(rev) (PCIECOREREV((rev)) >= 73) argument
30 #define REV_GE_69(rev) (PCIECOREREV((rev)) >= 69) argument
31 #define REV_GE_68(rev) (PCIECOREREV((rev)) >= 68) argument
32 #define REV_GE_64(rev) (PCIECOREREV((rev)) >= 64) argument
33 #define REV_GE_15(rev) (PCIECOREREV((rev)) >= 15) argument
447 #define PCIE_IDMA_MODE_EN(rev) (REV_GE_64(rev) ? 0x1 : 0x800000) /* implicit M2M DMA mode */ argument
505 #define PCIE_MB_TOPCIE_DB0_D2H0(rev) (REV_GE_64(rev) ? 0x0001 : 0x010000) argument
506 #define PCIE_MB_TOPCIE_DB0_D2H1(rev) (REV_GE_64(rev) ? 0x0002 : 0x020000) argument
507 #define PCIE_MB_TOPCIE_DB1_D2H0(rev) (REV_GE_64(rev) ? 0x0004 : 0x040000) argument
508 #define PCIE_MB_TOPCIE_DB1_D2H1(rev) (REV_GE_64(rev) ? 0x0008 : 0x080000) argument
[all …]
H A Dbcmdefs.h364 #define CHIPREV(rev) (BCMCHIPREV) argument
366 #define CHIPREV(rev) (rev) argument
370 #define PCIECOREREV(rev) (BCMPCIEREV) argument
372 #define PCIECOREREV(rev) (rev) argument
376 #define PMUREV(rev) (BCMPMUREV) argument
378 #define PMUREV(rev) (rev) argument
382 #define CCREV(rev) (BCMCCREV) argument
384 #define CCREV(rev) (rev) argument
388 #define GCIREV(rev) (BCMGCIREV) argument
390 #define GCIREV(rev) (rev) argument
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/include/
H A Ddal_asic_id.h46 #define ASIC_REV_IS_TAHITI_P(rev) \ argument
47 ((rev >= SI_TAHITI_P_A0) && (rev < SI_PITCAIRN_PM_A0))
49 #define ASIC_REV_IS_PITCAIRN_PM(rev) \ argument
50 ((rev >= SI_PITCAIRN_PM_A0) && (rev < SI_CAPEVERDE_M_A0))
52 #define ASIC_REV_IS_CAPEVERDE_M(rev) \ argument
53 ((rev >= SI_CAPEVERDE_M_A0) && (rev < SI_OLAND_M_A0))
55 #define ASIC_REV_IS_OLAND_M(rev) \ argument
56 ((rev >= SI_OLAND_M_A0) && (rev < SI_HAINAN_V_A0))
58 #define ASIC_REV_IS_HAINAN_V(rev) \ argument
59 ((rev >= SI_HAINAN_V_A0) && (rev < SI_UNKNOWN))
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/adreno/
H A Dadreno_device.c23 .rev = ADRENO_REV(2, 0, 0, 0),
34 .rev = ADRENO_REV(2, 0, 0, 1),
45 .rev = ADRENO_REV(2, 2, 0, ANY_ID),
56 .rev = ADRENO_REV(3, 0, 5, ANY_ID),
67 .rev = ADRENO_REV(3, 0, 6, 0),
78 .rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID),
89 .rev = ADRENO_REV(3, 3, 0, ANY_ID),
100 .rev = ADRENO_REV(4, 0, 5, ANY_ID),
111 .rev = ADRENO_REV(4, 2, 0, ANY_ID),
122 .rev = ADRENO_REV(4, 3, 0, ANY_ID),
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/
H A Dmach-crag6410-module.c325 u8 rev; member
334 { .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
335 { .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
336 { .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
337 { .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
338 { .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
341 { .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
342 { .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
343 { .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
344 { .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
[all …]
/OK3568_Linux_fs/kernel/arch/mips/ath79/
H A Dsetup.c58 u32 rev = 0; in ath79_detect_sys_type() local
67 rev = id >> AR71XX_REV_ID_REVISION_SHIFT; in ath79_detect_sys_type()
68 rev &= AR71XX_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
90 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
96 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
102 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
107 rev = id >> AR913X_REV_ID_REVISION_SHIFT; in ath79_detect_sys_type()
108 rev &= AR913X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
125 rev = id & AR933X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
131 rev = id & AR933X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
[all …]
/OK3568_Linux_fs/kernel/arch/x86/kernel/cpu/microcode/
H A Dintel.c97 if (mc_hdr->rev <= new_rev) in has_newer_microcode()
137 if (mc_hdr->rev <= mc_saved_hdr->rev) in save_microcode_patch()
319 uci->cpu_sig.rev)) in scan_microcode()
328 phdr->rev)) in scan_microcode()
368 csig.rev = intel_get_microcode_revision(); in collect_cpu_info_early()
380 unsigned int sig, pf, rev, total_size, data_size, date; in show_saved_mc() local
393 rev = uci.cpu_sig.rev; in show_saved_mc()
394 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev); in show_saved_mc()
406 rev = mc_saved_header->rev; in show_saved_mc()
413 i++, sig, pf, rev, total_size, in show_saved_mc()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-imx/
H A Dcpu-imx31.c21 unsigned int rev; member
23 { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
24 { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
25 { .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
26 { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
27 { .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
28 { .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
29 { .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 },
30 { .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
31 { .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 },
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Did.c152 u8 dev_type, rev; in omap2xxx_check_revision() local
158 rev = (idcode >> 28) & 0x0f; in omap2xxx_check_revision()
163 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff); in omap2xxx_check_revision()
353 u8 rev; in omap3xxx_check_revision() local
375 rev = (idcode >> 28) & 0xff; in omap3xxx_check_revision()
380 switch (rev) { in omap3xxx_check_revision()
412 switch (rev) { in omap3xxx_check_revision()
426 switch(rev) { in omap3xxx_check_revision()
442 switch (rev) { in omap3xxx_check_revision()
462 switch (rev) { in omap3xxx_check_revision()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-orion5x/
H A Dcommon.c210 u32 rev, dev; in orion5x_init_early() local
216 orion5x_pcie_id(&dev, &rev); in orion5x_init_early()
262 u32 dev, rev; in orion5x_find_tclk() local
264 orion5x_pcie_id(&dev, &rev); in orion5x_find_tclk()
287 void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) in orion5x_id() argument
289 orion5x_pcie_id(dev, rev); in orion5x_id()
292 if (*rev == MV88F5281_REV_D2) { in orion5x_id()
294 } else if (*rev == MV88F5281_REV_D1) { in orion5x_id()
296 } else if (*rev == MV88F5281_REV_D0) { in orion5x_id()
302 if (*rev == MV88F5182_REV_A2) { in orion5x_id()
[all …]
/OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/
H A Dcpu.c54 u32 rev = 0, ver = 1; in mach_cpu_init() local
66 rev = id >> AR71XX_REV_ID_REVISION_SHIFT; in mach_cpu_init()
67 rev &= AR71XX_REV_ID_REVISION_MASK; in mach_cpu_init()
82 rev = id & AR71XX_REV_ID_REVISION2_MASK; in mach_cpu_init()
85 rev = id & AR71XX_REV_ID_REVISION_MASK; in mach_cpu_init()
99 gd->arch.rev = rev; in mach_cpu_init()
108 u32 id, rev, ver; in print_cpuinfo() local
120 rev = gd->arch.rev; in print_cpuinfo()
129 ver, rev); in print_cpuinfo()
132 printf("Qualcomm Atheros TP%s rev %u\n", chip, rev); in print_cpuinfo()
[all …]
/OK3568_Linux_fs/kernel/drivers/firmware/arm_scmi/
H A Dbase.c63 struct scmi_revision_info *rev = ph->get_priv(ph); in scmi_base_attributes_get() local
73 rev->num_protocols = attr_info->num_protocols; in scmi_base_attributes_get()
74 rev->num_agents = attr_info->num_agents; in scmi_base_attributes_get()
97 struct scmi_revision_info *rev = ph->get_priv(ph); in scmi_base_vendor_id_get() local
102 vendor_id = rev->sub_vendor_id; in scmi_base_vendor_id_get()
103 size = ARRAY_SIZE(rev->sub_vendor_id); in scmi_base_vendor_id_get()
106 vendor_id = rev->vendor_id; in scmi_base_vendor_id_get()
107 size = ARRAY_SIZE(rev->vendor_id); in scmi_base_vendor_id_get()
138 struct scmi_revision_info *rev = ph->get_priv(ph); in scmi_base_implementation_version_get() local
148 rev->impl_ver = le32_to_cpu(*impl_ver); in scmi_base_implementation_version_get()
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/kvm/
H A Dbook3s_hv_rm_mmu.c81 void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev, in kvmppc_add_revmap_chain() argument
89 head = &kvm->arch.hpt.rev[i]; in kvmppc_add_revmap_chain()
92 tail = &kvm->arch.hpt.rev[head->back]; in kvmppc_add_revmap_chain()
95 rev->forw = i; in kvmppc_add_revmap_chain()
96 rev->back = head->back; in kvmppc_add_revmap_chain()
100 rev->forw = rev->back = pte_index; in kvmppc_add_revmap_chain()
161 struct revmap_entry *rev, in remove_revmap_chain() argument
172 ptel = rev->guest_rpte |= rcbits; in remove_revmap_chain()
179 next = real_vmalloc_addr(&kvm->arch.hpt.rev[rev->forw]); in remove_revmap_chain()
180 prev = real_vmalloc_addr(&kvm->arch.hpt.rev[rev->back]); in remove_revmap_chain()
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/
H A Divybridge_igd.c332 static int gma_pm_init_pre_vbios(void *gtt_bar, int rev) in gma_pm_init_pre_vbios() argument
336 debug("GT Power Management Init, silicon = %#x\n", rev); in gma_pm_init_pre_vbios()
338 if (rev < IVB_STEP_C0) { in gma_pm_init_pre_vbios()
348 if ((rev & BASE_REV_MASK) == BASE_REV_SNB) { in gma_pm_init_pre_vbios()
355 if (rev >= IVB_STEP_A0) { in gma_pm_init_pre_vbios()
364 if ((rev & BASE_REV_MASK) == BASE_REV_SNB) { in gma_pm_init_pre_vbios()
413 if (rev >= SNB_STEP_D1) in gma_pm_init_pre_vbios()
418 if (((rev & BASE_REV_MASK) == BASE_REV_SNB) && in gma_pm_init_pre_vbios()
419 (rev >= SNB_STEP_D2)) { in gma_pm_init_pre_vbios()
431 if ((rev & BASE_REV_MASK) == BASE_REV_IVB) { in gma_pm_init_pre_vbios()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h24 #define DPU_HW_MAJOR(rev) ((rev) >> 28) argument
25 #define DPU_HW_MINOR(rev) (((rev) >> 16) & 0xFFF) argument
26 #define DPU_HW_STEP(rev) ((rev) & 0xFFFF) argument
27 #define DPU_HW_MAJOR_MINOR(rev) ((rev) >> 16) argument
46 #define IS_MSM8996_TARGET(rev) IS_DPU_MAJOR_MINOR_SAME((rev), DPU_HW_VER_170) argument
47 #define IS_MSM8998_TARGET(rev) IS_DPU_MAJOR_MINOR_SAME((rev), DPU_HW_VER_300) argument
48 #define IS_SDM845_TARGET(rev) IS_DPU_MAJOR_MINOR_SAME((rev), DPU_HW_VER_400) argument
49 #define IS_SDM670_TARGET(rev) IS_DPU_MAJOR_MINOR_SAME((rev), DPU_HW_VER_410) argument
50 #define IS_SDM855_TARGET(rev) IS_DPU_MAJOR_MINOR_SAME((rev), DPU_HW_VER_500) argument
51 #define IS_SC7180_TARGET(rev) IS_DPU_MAJOR_MINOR_SAME((rev), DPU_HW_VER_620) argument
/OK3568_Linux_fs/kernel/drivers/acpi/
H A Dpci_mcfg.c46 #define AL_ECAM(table_id, rev, seg, ops) \ argument
47 { "AMAZON", table_id, rev, seg, MCFG_BUS_ANY, ops }
91 #define THUNDER_PEM_QUIRK(rev, node) \ argument
92 { "CAVIUM", "THUNDERX", rev, 4 + (10 * (node)), MCFG_BUS_ANY, \
94 { "CAVIUM", "THUNDERX", rev, 5 + (10 * (node)), MCFG_BUS_ANY, \
96 { "CAVIUM", "THUNDERX", rev, 6 + (10 * (node)), MCFG_BUS_ANY, \
98 { "CAVIUM", "THUNDERX", rev, 7 + (10 * (node)), MCFG_BUS_ANY, \
100 { "CAVIUM", "THUNDERX", rev, 8 + (10 * (node)), MCFG_BUS_ANY, \
102 { "CAVIUM", "THUNDERX", rev, 9 + (10 * (node)), MCFG_BUS_ANY, \
105 #define THUNDER_ECAM_QUIRK(rev, seg) \ argument
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dfdt.c199 int irq_0, int irq_1, int rev) in _fdt_fixup_msi_node() argument
218 if (rev > REV1_0) { in _fdt_fixup_msi_node()
250 if (rev > REV1_0) in _fdt_fixup_msi_node()
263 if (rev > REV1_0) in _fdt_fixup_msi_node()
278 static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev) in _fdt_fixup_pci_msi() argument
302 if (rev > REV1_0) { in _fdt_fixup_pci_msi()
326 unsigned int rev; in fdt_fixup_msi() local
328 rev = gur_in32(&gur->svr); in fdt_fixup_msi()
330 if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A))) in fdt_fixup_msi()
333 rev = SVR_REV(rev); in fdt_fixup_msi()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_indep_power/include/
H A Dbcmdefs.h209 #define CHIPREV(rev) (BCMCHIPREV) argument
211 #define CHIPREV(rev) (rev) argument
215 #define PCIECOREREV(rev) (BCMPCIEREV) argument
217 #define PCIECOREREV(rev) (rev) argument
221 #define PMUREV(rev) (BCMPMUREV) argument
223 #define PMUREV(rev) (rev) argument
227 #define CCREV(rev) (BCMCCREV) argument
229 #define CCREV(rev) (rev) argument
233 #define GCIREV(rev) (BCMGCIREV) argument
235 #define GCIREV(rev) (rev) argument
/OK3568_Linux_fs/u-boot/arch/x86/cpu/ivybridge/
H A Dnorthbridge.c90 static void northbridge_dmi_init(struct udevice *dev, int rev) in northbridge_dmi_init() argument
97 if ((rev & BASE_REV_MASK) == BASE_REV_SNB) { in northbridge_dmi_init()
104 if (rev >= SNB_STEP_D0) { in northbridge_dmi_init()
106 } else if (rev >= SNB_STEP_D1) { in northbridge_dmi_init()
112 if ((rev & BASE_REV_MASK) == BASE_REV_SNB) in northbridge_dmi_init()
118 static void northbridge_init(struct udevice *dev, int rev) in northbridge_init() argument
123 northbridge_dmi_init(dev, rev); in northbridge_init()
128 if ((rev & BASE_REV_MASK) == BASE_REV_IVB) { in northbridge_init()
219 int rev; in bd82x6x_northbridge_probe() local
224 rev = bridge_silicon_revision(dev); in bd82x6x_northbridge_probe()
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