1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2014-2015 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <efi_loader.h>
9*4882a593Smuzhiyun #include <linux/libfdt.h>
10*4882a593Smuzhiyun #include <fdt_support.h>
11*4882a593Smuzhiyun #include <phy.h>
12*4882a593Smuzhiyun #ifdef CONFIG_FSL_LSCH3
13*4882a593Smuzhiyun #include <asm/arch/fdt.h>
14*4882a593Smuzhiyun #endif
15*4882a593Smuzhiyun #ifdef CONFIG_FSL_ESDHC
16*4882a593Smuzhiyun #include <fsl_esdhc.h>
17*4882a593Smuzhiyun #endif
18*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_FMAN
19*4882a593Smuzhiyun #include <fsl_fman.h>
20*4882a593Smuzhiyun #endif
21*4882a593Smuzhiyun #ifdef CONFIG_MP
22*4882a593Smuzhiyun #include <asm/arch/mp.h>
23*4882a593Smuzhiyun #endif
24*4882a593Smuzhiyun #include <fsl_sec.h>
25*4882a593Smuzhiyun #include <asm/arch-fsl-layerscape/soc.h>
26*4882a593Smuzhiyun #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
27*4882a593Smuzhiyun #include <asm/armv8/sec_firmware.h>
28*4882a593Smuzhiyun #endif
29*4882a593Smuzhiyun
fdt_fixup_phy_connection(void * blob,int offset,phy_interface_t phyc)30*4882a593Smuzhiyun int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun return fdt_setprop_string(blob, offset, "phy-connection-type",
33*4882a593Smuzhiyun phy_string_for_interface(phyc));
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #ifdef CONFIG_MP
ft_fixup_cpu(void * blob)37*4882a593Smuzhiyun void ft_fixup_cpu(void *blob)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun int off;
40*4882a593Smuzhiyun __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
41*4882a593Smuzhiyun fdt32_t *reg;
42*4882a593Smuzhiyun int addr_cells;
43*4882a593Smuzhiyun u64 val, core_id;
44*4882a593Smuzhiyun size_t *boot_code_size = &(__secondary_boot_code_size);
45*4882a593Smuzhiyun #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
46*4882a593Smuzhiyun defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
47*4882a593Smuzhiyun int node;
48*4882a593Smuzhiyun u32 psci_ver;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* Check the psci version to determine if the psci is supported */
51*4882a593Smuzhiyun psci_ver = sec_firmware_support_psci_version();
52*4882a593Smuzhiyun if (psci_ver == 0xffffffff) {
53*4882a593Smuzhiyun /* remove psci DT node */
54*4882a593Smuzhiyun node = fdt_path_offset(blob, "/psci");
55*4882a593Smuzhiyun if (node >= 0)
56*4882a593Smuzhiyun goto remove_psci_node;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
59*4882a593Smuzhiyun if (node >= 0)
60*4882a593Smuzhiyun goto remove_psci_node;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
63*4882a593Smuzhiyun if (node >= 0)
64*4882a593Smuzhiyun goto remove_psci_node;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
67*4882a593Smuzhiyun if (node >= 0)
68*4882a593Smuzhiyun goto remove_psci_node;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun remove_psci_node:
71*4882a593Smuzhiyun if (node >= 0)
72*4882a593Smuzhiyun fdt_del_node(blob, node);
73*4882a593Smuzhiyun } else {
74*4882a593Smuzhiyun return;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun #endif
77*4882a593Smuzhiyun off = fdt_path_offset(blob, "/cpus");
78*4882a593Smuzhiyun if (off < 0) {
79*4882a593Smuzhiyun puts("couldn't find /cpus node\n");
80*4882a593Smuzhiyun return;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
85*4882a593Smuzhiyun while (off != -FDT_ERR_NOTFOUND) {
86*4882a593Smuzhiyun reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
87*4882a593Smuzhiyun if (reg) {
88*4882a593Smuzhiyun core_id = fdt_read_number(reg, addr_cells);
89*4882a593Smuzhiyun if (core_id == 0 || (is_core_online(core_id))) {
90*4882a593Smuzhiyun val = spin_tbl_addr;
91*4882a593Smuzhiyun val += id_to_core(core_id) *
92*4882a593Smuzhiyun SPIN_TABLE_ELEM_SIZE;
93*4882a593Smuzhiyun val = cpu_to_fdt64(val);
94*4882a593Smuzhiyun fdt_setprop_string(blob, off, "enable-method",
95*4882a593Smuzhiyun "spin-table");
96*4882a593Smuzhiyun fdt_setprop(blob, off, "cpu-release-addr",
97*4882a593Smuzhiyun &val, sizeof(val));
98*4882a593Smuzhiyun } else {
99*4882a593Smuzhiyun debug("skipping offline core\n");
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun } else {
102*4882a593Smuzhiyun puts("Warning: found cpu node without reg property\n");
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun off = fdt_node_offset_by_prop_value(blob, off, "device_type",
105*4882a593Smuzhiyun "cpu", 4);
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
109*4882a593Smuzhiyun *boot_code_size);
110*4882a593Smuzhiyun #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
111*4882a593Smuzhiyun efi_add_memory_map((uintptr_t)&secondary_boot_code,
112*4882a593Smuzhiyun ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
113*4882a593Smuzhiyun EFI_RESERVED_MEMORY_TYPE, false);
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun #endif
117*4882a593Smuzhiyun
fsl_fdt_disable_usb(void * blob)118*4882a593Smuzhiyun void fsl_fdt_disable_usb(void *blob)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun int off;
121*4882a593Smuzhiyun /*
122*4882a593Smuzhiyun * SYSCLK is used as a reference clock for USB. When the USB
123*4882a593Smuzhiyun * controller is used, SYSCLK must meet the additional requirement
124*4882a593Smuzhiyun * of 100 MHz.
125*4882a593Smuzhiyun */
126*4882a593Smuzhiyun if (CONFIG_SYS_CLK_FREQ != 100000000) {
127*4882a593Smuzhiyun off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
128*4882a593Smuzhiyun while (off != -FDT_ERR_NOTFOUND) {
129*4882a593Smuzhiyun fdt_status_disabled(blob, off);
130*4882a593Smuzhiyun off = fdt_node_offset_by_compatible(blob, off,
131*4882a593Smuzhiyun "snps,dwc3");
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
fdt_fixup_gic(void * blob)137*4882a593Smuzhiyun static void fdt_fixup_gic(void *blob)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun int offset, err;
140*4882a593Smuzhiyun u64 reg[8];
141*4882a593Smuzhiyun struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
142*4882a593Smuzhiyun unsigned int val;
143*4882a593Smuzhiyun struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
144*4882a593Smuzhiyun int align_64k = 0;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun val = gur_in32(&gur->svr);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
149*4882a593Smuzhiyun align_64k = 1;
150*4882a593Smuzhiyun } else if (SVR_REV(val) != REV1_0) {
151*4882a593Smuzhiyun val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
152*4882a593Smuzhiyun if (!val)
153*4882a593Smuzhiyun align_64k = 1;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000");
157*4882a593Smuzhiyun if (offset < 0) {
158*4882a593Smuzhiyun printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
159*4882a593Smuzhiyun "interrupt-controller@1400000", fdt_strerror(offset));
160*4882a593Smuzhiyun return;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* Fixup gic node align with 64K */
164*4882a593Smuzhiyun if (align_64k) {
165*4882a593Smuzhiyun reg[0] = cpu_to_fdt64(GICD_BASE_64K);
166*4882a593Smuzhiyun reg[1] = cpu_to_fdt64(GICD_SIZE_64K);
167*4882a593Smuzhiyun reg[2] = cpu_to_fdt64(GICC_BASE_64K);
168*4882a593Smuzhiyun reg[3] = cpu_to_fdt64(GICC_SIZE_64K);
169*4882a593Smuzhiyun reg[4] = cpu_to_fdt64(GICH_BASE_64K);
170*4882a593Smuzhiyun reg[5] = cpu_to_fdt64(GICH_SIZE_64K);
171*4882a593Smuzhiyun reg[6] = cpu_to_fdt64(GICV_BASE_64K);
172*4882a593Smuzhiyun reg[7] = cpu_to_fdt64(GICV_SIZE_64K);
173*4882a593Smuzhiyun } else {
174*4882a593Smuzhiyun /* Fixup gic node align with default */
175*4882a593Smuzhiyun reg[0] = cpu_to_fdt64(GICD_BASE);
176*4882a593Smuzhiyun reg[1] = cpu_to_fdt64(GICD_SIZE);
177*4882a593Smuzhiyun reg[2] = cpu_to_fdt64(GICC_BASE);
178*4882a593Smuzhiyun reg[3] = cpu_to_fdt64(GICC_SIZE);
179*4882a593Smuzhiyun reg[4] = cpu_to_fdt64(GICH_BASE);
180*4882a593Smuzhiyun reg[5] = cpu_to_fdt64(GICH_SIZE);
181*4882a593Smuzhiyun reg[6] = cpu_to_fdt64(GICV_BASE);
182*4882a593Smuzhiyun reg[7] = cpu_to_fdt64(GICV_SIZE);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg));
186*4882a593Smuzhiyun if (err < 0) {
187*4882a593Smuzhiyun printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
188*4882a593Smuzhiyun "reg", "interrupt-controller@1400000",
189*4882a593Smuzhiyun fdt_strerror(err));
190*4882a593Smuzhiyun return;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun return;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun #endif
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
_fdt_fixup_msi_node(void * blob,const char * name,int irq_0,int irq_1,int rev)198*4882a593Smuzhiyun static int _fdt_fixup_msi_node(void *blob, const char *name,
199*4882a593Smuzhiyun int irq_0, int irq_1, int rev)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun int err, offset, len;
202*4882a593Smuzhiyun u32 tmp[4][3];
203*4882a593Smuzhiyun void *p;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun offset = fdt_path_offset(blob, name);
206*4882a593Smuzhiyun if (offset < 0) {
207*4882a593Smuzhiyun printf("WARNING: fdt_path_offset can't find path %s: %s\n",
208*4882a593Smuzhiyun name, fdt_strerror(offset));
209*4882a593Smuzhiyun return 0;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /*fixup the property of interrupts*/
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun tmp[0][0] = cpu_to_fdt32(0x0);
215*4882a593Smuzhiyun tmp[0][1] = cpu_to_fdt32(irq_0);
216*4882a593Smuzhiyun tmp[0][2] = cpu_to_fdt32(0x4);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (rev > REV1_0) {
219*4882a593Smuzhiyun tmp[1][0] = cpu_to_fdt32(0x0);
220*4882a593Smuzhiyun tmp[1][1] = cpu_to_fdt32(irq_1);
221*4882a593Smuzhiyun tmp[1][2] = cpu_to_fdt32(0x4);
222*4882a593Smuzhiyun tmp[2][0] = cpu_to_fdt32(0x0);
223*4882a593Smuzhiyun tmp[2][1] = cpu_to_fdt32(irq_1 + 1);
224*4882a593Smuzhiyun tmp[2][2] = cpu_to_fdt32(0x4);
225*4882a593Smuzhiyun tmp[3][0] = cpu_to_fdt32(0x0);
226*4882a593Smuzhiyun tmp[3][1] = cpu_to_fdt32(irq_1 + 2);
227*4882a593Smuzhiyun tmp[3][2] = cpu_to_fdt32(0x4);
228*4882a593Smuzhiyun len = sizeof(tmp);
229*4882a593Smuzhiyun } else {
230*4882a593Smuzhiyun len = sizeof(tmp[0]);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun err = fdt_setprop(blob, offset, "interrupts", tmp, len);
234*4882a593Smuzhiyun if (err < 0) {
235*4882a593Smuzhiyun printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
236*4882a593Smuzhiyun "interrupts", name, fdt_strerror(err));
237*4882a593Smuzhiyun return 0;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun /*fixup the property of reg*/
241*4882a593Smuzhiyun p = (char *)fdt_getprop(blob, offset, "reg", &len);
242*4882a593Smuzhiyun if (!p) {
243*4882a593Smuzhiyun printf("WARNING: fdt_getprop can't get %s from node %s\n",
244*4882a593Smuzhiyun "reg", name);
245*4882a593Smuzhiyun return 0;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun memcpy((char *)tmp, p, len);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun if (rev > REV1_0)
251*4882a593Smuzhiyun *((u32 *)tmp + 3) = cpu_to_fdt32(0x1000);
252*4882a593Smuzhiyun else
253*4882a593Smuzhiyun *((u32 *)tmp + 3) = cpu_to_fdt32(0x8);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun err = fdt_setprop(blob, offset, "reg", tmp, len);
256*4882a593Smuzhiyun if (err < 0) {
257*4882a593Smuzhiyun printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
258*4882a593Smuzhiyun "reg", name, fdt_strerror(err));
259*4882a593Smuzhiyun return 0;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /*fixup the property of compatible*/
263*4882a593Smuzhiyun if (rev > REV1_0)
264*4882a593Smuzhiyun err = fdt_setprop_string(blob, offset, "compatible",
265*4882a593Smuzhiyun "fsl,ls1043a-v1.1-msi");
266*4882a593Smuzhiyun else
267*4882a593Smuzhiyun err = fdt_setprop_string(blob, offset, "compatible",
268*4882a593Smuzhiyun "fsl,ls1043a-msi");
269*4882a593Smuzhiyun if (err < 0) {
270*4882a593Smuzhiyun printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
271*4882a593Smuzhiyun "compatible", name, fdt_strerror(err));
272*4882a593Smuzhiyun return 0;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun return 1;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
_fdt_fixup_pci_msi(void * blob,const char * name,int rev)278*4882a593Smuzhiyun static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun int offset, len, err;
281*4882a593Smuzhiyun void *p;
282*4882a593Smuzhiyun int val;
283*4882a593Smuzhiyun u32 tmp[4][8];
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun offset = fdt_path_offset(blob, name);
286*4882a593Smuzhiyun if (offset < 0) {
287*4882a593Smuzhiyun printf("WARNING: fdt_path_offset can't find path %s: %s\n",
288*4882a593Smuzhiyun name, fdt_strerror(offset));
289*4882a593Smuzhiyun return 0;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
293*4882a593Smuzhiyun if (!p || len != sizeof(tmp)) {
294*4882a593Smuzhiyun printf("WARNING: fdt_getprop can't get %s from node %s\n",
295*4882a593Smuzhiyun "interrupt-map", name);
296*4882a593Smuzhiyun return 0;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun memcpy((char *)tmp, p, len);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun val = fdt32_to_cpu(tmp[0][6]);
302*4882a593Smuzhiyun if (rev > REV1_0) {
303*4882a593Smuzhiyun tmp[1][6] = cpu_to_fdt32(val + 1);
304*4882a593Smuzhiyun tmp[2][6] = cpu_to_fdt32(val + 2);
305*4882a593Smuzhiyun tmp[3][6] = cpu_to_fdt32(val + 3);
306*4882a593Smuzhiyun } else {
307*4882a593Smuzhiyun tmp[1][6] = cpu_to_fdt32(val);
308*4882a593Smuzhiyun tmp[2][6] = cpu_to_fdt32(val);
309*4882a593Smuzhiyun tmp[3][6] = cpu_to_fdt32(val);
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
313*4882a593Smuzhiyun if (err < 0) {
314*4882a593Smuzhiyun printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
315*4882a593Smuzhiyun "interrupt-map", name, fdt_strerror(err));
316*4882a593Smuzhiyun return 0;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun return 1;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /* Fixup msi node for ls1043a rev1.1*/
322*4882a593Smuzhiyun
fdt_fixup_msi(void * blob)323*4882a593Smuzhiyun static void fdt_fixup_msi(void *blob)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
326*4882a593Smuzhiyun unsigned int rev;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun rev = gur_in32(&gur->svr);
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
331*4882a593Smuzhiyun return;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun rev = SVR_REV(rev);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun _fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000",
336*4882a593Smuzhiyun 116, 111, rev);
337*4882a593Smuzhiyun _fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000",
338*4882a593Smuzhiyun 126, 121, rev);
339*4882a593Smuzhiyun _fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000",
340*4882a593Smuzhiyun 160, 155, rev);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun _fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev);
343*4882a593Smuzhiyun _fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev);
344*4882a593Smuzhiyun _fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev);
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun #endif
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
349*4882a593Smuzhiyun /* Remove JR node used by SEC firmware */
fdt_fixup_remove_jr(void * blob)350*4882a593Smuzhiyun void fdt_fixup_remove_jr(void *blob)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun int jr_node, addr_cells, len;
353*4882a593Smuzhiyun int crypto_node = fdt_path_offset(blob, "crypto");
354*4882a593Smuzhiyun u64 jr_offset, used_jr;
355*4882a593Smuzhiyun fdt32_t *reg;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun used_jr = sec_firmware_used_jobring_offset();
358*4882a593Smuzhiyun fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun jr_node = fdt_node_offset_by_compatible(blob, crypto_node,
361*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring");
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun while (jr_node != -FDT_ERR_NOTFOUND) {
364*4882a593Smuzhiyun reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len);
365*4882a593Smuzhiyun jr_offset = fdt_read_number(reg, addr_cells);
366*4882a593Smuzhiyun if (jr_offset == used_jr) {
367*4882a593Smuzhiyun fdt_del_node(blob, jr_node);
368*4882a593Smuzhiyun break;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun jr_node = fdt_node_offset_by_compatible(blob, jr_node,
371*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring");
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun #endif
375*4882a593Smuzhiyun
ft_cpu_setup(void * blob,bd_t * bd)376*4882a593Smuzhiyun void ft_cpu_setup(void *blob, bd_t *bd)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
379*4882a593Smuzhiyun unsigned int svr = gur_in32(&gur->svr);
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun /* delete crypto node if not on an E-processor */
382*4882a593Smuzhiyun if (!IS_E_PROCESSOR(svr))
383*4882a593Smuzhiyun fdt_fixup_crypto_node(blob, 0);
384*4882a593Smuzhiyun #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
385*4882a593Smuzhiyun else {
386*4882a593Smuzhiyun ccsr_sec_t __iomem *sec;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
389*4882a593Smuzhiyun if (fdt_fixup_kaslr(blob))
390*4882a593Smuzhiyun fdt_fixup_remove_jr(blob);
391*4882a593Smuzhiyun #endif
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
394*4882a593Smuzhiyun fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun #endif
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun #ifdef CONFIG_MP
399*4882a593Smuzhiyun ft_fixup_cpu(blob);
400*4882a593Smuzhiyun #endif
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun #ifdef CONFIG_SYS_NS16550
403*4882a593Smuzhiyun do_fixup_by_compat_u32(blob, "fsl,ns16550",
404*4882a593Smuzhiyun "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
405*4882a593Smuzhiyun #endif
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
408*4882a593Smuzhiyun CONFIG_SYS_CLK_FREQ, 1);
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun #ifdef CONFIG_PCI
411*4882a593Smuzhiyun ft_pci_setup(blob, bd);
412*4882a593Smuzhiyun #endif
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun #ifdef CONFIG_FSL_ESDHC
415*4882a593Smuzhiyun fdt_fixup_esdhc(blob, bd);
416*4882a593Smuzhiyun #endif
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_FMAN
419*4882a593Smuzhiyun fdt_fixup_fman_firmware(blob);
420*4882a593Smuzhiyun #endif
421*4882a593Smuzhiyun #ifndef CONFIG_LS1012A
422*4882a593Smuzhiyun fsl_fdt_disable_usb(blob);
423*4882a593Smuzhiyun #endif
424*4882a593Smuzhiyun #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
425*4882a593Smuzhiyun fdt_fixup_gic(blob);
426*4882a593Smuzhiyun #endif
427*4882a593Smuzhiyun #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
428*4882a593Smuzhiyun fdt_fixup_msi(blob);
429*4882a593Smuzhiyun #endif
430*4882a593Smuzhiyun }
431