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/rk3399_rockchip-uboot/doc/
H A DREADME.zynq2 # Xilinx ZYNQ U-Boot
4 # (C) Copyright 2013 Xilinx, Inc.
11 This document describes the information about Xilinx Zynq U-Boot -
16 Xilinx Zynq-7000 All Programmable SoCs enable extensive system level
80 [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm
81 [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
84 [5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
87 Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
/rk3399_rockchip-uboot/include/configs/
H A Dxilinx_zynqmp_zc1751_xm019_dc5.h2 * Configuration for Xilinx ZynqMP zc1751 XM019 DC5
4 * (C) Copyright 2015 Xilinx, Inc.
5 * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
6 * Michal Simek <michal.simek@xilinx.com>
H A Dxilinx_zynqmp_ep.h2 * Configuration for Xilinx ZynqMP emulation platforms
4 * (C) Copyright 2014 - 2015 Xilinx, Inc.
5 * Michal Simek <michal.simek@xilinx.com>
6 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
H A Dxilinx_zynqmp_mini.h3 * Configuration for Xilinx ZynqMP Flash utility
5 * (C) Copyright 2018 Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
7 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
H A Dxilinx_zynqmp_zc1751_xm016_dc2.h2 * Configuration for Xilinx ZynqMP zc1751 XM016 DC2
4 * (C) Copyright 2015 Xilinx, Inc.
5 * Michal Simek <michal.simek@xilinx.com>
H A Dxilinx_zynqmp_zc1751_xm015_dc1.h2 * Configuration for Xilinx ZynqMP zc1751 XM015 DC1
4 * (C) Copyright 2015 Xilinx, Inc.
5 * Michal Simek <michal.simek@xilinx.com>
H A Dxilinx_zynqmp_zcu102.h2 * Configuration for Xilinx ZynqMP zcu102
4 * (C) Copyright 2015 Xilinx, Inc.
5 * Michal Simek <michal.simek@xilinx.com>
H A Dzynq_zc70x.h2 * (C) Copyright 2013 Xilinx, Inc.
4 * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards
/rk3399_rockchip-uboot/drivers/fpga/
H A DKconfig35 bool "Enable Xilinx FPGA drivers"
38 Enable Xilinx FPGA specific functions which includes bitstream
42 bool "Enable Xilinx FPGA driver for ZynqMP"
46 on Xilinx Zynq UltraScale+ (ZynqMP) device.
H A Dfpga.c10 #include <xilinx.h> /* xilinx specific definitions */
89 printf("Xilinx Device\nDescriptor @ 0x%p\n", desc); in fpga_dev_info()
92 fpga_no_sup((char *)__func__, "Xilinx devices"); in fpga_dev_info()
198 fpga_no_sup((char *)__func__, "Xilinx devices"); in fpga_fsload()
227 fpga_no_sup((char *)__func__, "Xilinx devices"); in fpga_load()
269 fpga_no_sup((char *)__func__, "Xilinx devices"); in fpga_dump()
/rk3399_rockchip-uboot/include/
H A Dzynqmppl.h2 * (C) Copyright 2015 Xilinx, Inc,
3 * Michal Simek <michal.simek@xilinx.com>
11 #include <xilinx.h>
/rk3399_rockchip-uboot/board/cadence/xtfpga/
H A Dxtfpga.c27 const char *description = "Avnet Xilinx LX60 FPGA Evaluation Board / ";
30 const char *description = "Avnet Xilinx Virtex-5 LX110 Evaluation Kit / ";
33 const char *description = "Avnet Xilinx Virtex-4 LX200 Evaluation Kit / ";
36 const char *description = "Xilinx Virtex-6 FPGA ML605 Evaluation Kit / ";
39 const char *description = "Xilinx Kintex-7 FPGA KC705 Evaluation Kit / ";
H A DKconfig13 bool "Support Xilinx ML605"
15 bool "Support Xilinx KC705"
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dzynqmp-zcu102-revB.dts2 * dts file for Xilinx ZynqMP ZCU102 RevB
4 * (C) Copyright 2016, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
H A Dzynq-zc770-xm012.dts2 * Xilinx ZC770 XM012 board DTS
4 * Copyright (C) 2013 - 2015 Xilinx, Inc.
13 model = "Xilinx Zynq";
H A Dzynq-zc770-xm011.dts2 * Xilinx ZC770 XM013 board DTS
4 * Copyright (C) 2013 Xilinx, Inc.
13 model = "Xilinx Zynq";
H A Dzynqmp-zc1751-xm019-dc5.dts2 * dts file for Xilinx ZynqMP zc1751-xm019-dc5
4 * (C) Copyright 2015, Xilinx, Inc.
6 * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
7 * Michal Simek <michal.simek@xilinx.com>
H A Dzynq-zc770-xm013.dts2 * Xilinx ZC770 XM013 board DTS
4 * Copyright (C) 2013 Xilinx, Inc.
13 model = "Xilinx Zynq";
H A Dzynq-zc770-xm010.dts2 * Xilinx ZC770 XM010 board DTS
4 * Copyright (C) 2013 - 2015 Xilinx, Inc.
13 model = "Xilinx Zynq";
/rk3399_rockchip-uboot/board/xilinx/zynqmp/
H A DMakefile2 # (C) Copyright 2014 - 2016 Xilinx, Inc.
3 # Michal Simek <michal.simek@xilinx.com>
19 $(warning Put custom psu_init_gpl.c/h to board/xilinx/zynqmp/custom_hw_platform/))
H A DMAINTAINERS2 M: Michal Simek <michal.simek@xilinx.com>
4 F: board/xilinx/zynqmp/
/rk3399_rockchip-uboot/arch/microblaze/include/asm/
H A Dspl.h2 * (C) Copyright 2013 - 2014 Xilinx, Inc
4 * Michal Simek <michal.simek@xilinx.com>
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-zynqmp/
H A Dclk.h2 * (C) Copyright 2014 - 2015 Xilinx, Inc.
3 * Michal Simek <michal.simek@xilinx.com>
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/zynqmp/
H A DMakefile2 # (C) Copyright 2014 - 2015 Xilinx, Inc.
3 # Michal Simek <michal.simek@xilinx.com>
/rk3399_rockchip-uboot/arch/arm/mach-zynq/
H A Dspl.c2 * (C) Copyright 2014 Xilinx, Inc. Michal Simek
90 * board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists. in ps7_init()
98 * board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists. in ps7_post_config()

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