| #
fe84c48e |
| 04-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.09
Zynq:
- Add Z-Turn board support
fpga:
- Remove intermediate buffer from code
Zynqmp:
- dts
Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.09
Zynq:
- Add Z-Turn board support
fpga:
- Remove intermediate buffer from code
Zynqmp:
- dts cleanup
- change psu_init handling
- Add options to get silicon version
- Fix time handling
- Map OCM/TCM via MMU
- Add new clock driver
show more ...
|
| #
92687047 |
| 28-Jun-2017 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Fix SVD mask for getting chip ID
Mask should start from the first bit - using 0xe is just wrong.
3bits are used that's why 0x7 mask is correct.
This patch is fixing silicon ID code de
arm64: zynqmp: Fix SVD mask for getting chip ID
Mask should start from the first bit - using 0xe is just wrong.
3bits are used that's why 0x7 mask is correct.
This patch is fixing silicon ID code detection. Previous behavior was
that bit0 was completely ignored.
Issue was found on 2eg chip detection.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
show more ...
|
| #
2d221489 |
| 29-Nov-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| #
0cba6abb |
| 29-Sep-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
ARM64: zynqmp: Adjust to new SMC interface to get silicon version
The new FW interface returns the IDCODE and version register, leaving
extracting bitfields to the caller.
Cc: Michal Simek <michal.
ARM64: zynqmp: Adjust to new SMC interface to get silicon version
The new FW interface returns the IDCODE and version register, leaving
extracting bitfields to the caller.
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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|
| #
58c8c096 |
| 22-Sep-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
|
| #
47e60cbd |
| 01-Feb-2016 |
Michal Simek <michal.simek@xilinx.com> |
ARM64: zynqmp: Add support for chip ID detection
Chip ID needs to be known for loading bitstream because
U-Boot checks ID from bitstream header in BIT format.
BIN format is completely unchecked.
Th
ARM64: zynqmp: Add support for chip ID detection
Chip ID needs to be known for loading bitstream because
U-Boot checks ID from bitstream header in BIT format.
BIN format is completely unchecked.
The chipid is get from ATF via SMC.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
6b245014 |
| 13-Jan-2016 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
show more ...
|