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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-inno-usb2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-usb2phy
16 - rockchip,rk1808-usb2phy
17 - rockchip,rk3128-usb2phy
18 - rockchip,rk3228-usb2phy
19 - rockchip,rk3308-usb2phy
[all …]
H A Dphy-rockchip-naneng-usb2.txt4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rv1126-usb2phy"
6 - reg : the address offset of grf for usb-phy configuration.
7 - rockchip,grf : phandle to the syscon managing the "general register files"
8 - clocks : phandle + phy specifier pair, for the input clocks of phy.
9 - clock-names : input clocks name of phy.
10 - resets : phandle + reset specifier pairs.
11 - reset-names : reset names of phy.
12 - #clock-cells : should be 0.
13 - clock-output-names : specify the 480m output clock name.
[all …]
H A Dnvidia,tegra20-usb-phy.txt6 - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy".
7 For Tegra30, must contain "nvidia,tegra30-usb-phy". Otherwise, must contain
8 "nvidia,<chip>-usb-phy" plus at least one of the above, where <chip> is
10 - reg : Defines the following set of registers, in the order listed:
11 - The PHY's own register set.
12 Always present.
13 - The register set of the PHY containing the UTMI pad control registers.
14 Present if-and-only-if phy_type == utmi.
15 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
16 - clocks : Defines the clocks listed in the clock-names property.
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun8i-a83t-cubietruck-plus.dts2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
52 compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
63 hdmi-connector {
64 compatible = "hdmi-connector";
[all …]
H A Dimx6qdl-aristainetos2.dtsi6 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/gpio/gpio.h>
44 #include <dt-bindings/clock/imx6qdl-clock.h>
48 compatible = "pwm-backlight";
50 brightness-levels = <0 4 8 16 32 64 128 255>;
51 default-brightness-level = <7>;
52 enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
55 reg_2p5v: regulator-2p5v {
56 compatible = "regulator-fixed";
57 regulator-name = "2P5V";
[all …]
H A Dsun8i-a83t-allwinner-h8homlet-v2.dts5 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
45 #include "sun8i-a83t.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
51 compatible = "allwinner,h8homlet-v2", "allwinner,sun8i-a83t";
58 stdout-path = "serial0:115200n8";
61 reg_usb0_vbus: reg-usb0-vbus {
62 compatible = "regulator-fixed";
63 regulator-name = "usb0-vbus";
64 regulator-min-microvolt = <5000000>;
[all …]
H A Dimx6dl-yapp4-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2015-2018 Y Soft Corporation, a.s.
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
18 compatible = "pwm-backlight";
20 brightness-levels = <0 32 64 128 255>;
21 default-brightness-level = <32>;
[all …]
H A Dexynos5420-smdk5420.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Samsung SMDK5420 board based on Exynos5420";
26 stdout-path = "serial2:115200n8";
29 fixed-rate-clocks {
31 compatible = "samsung,exynos5420-oscclk";
32 clock-frequency = <24000000>;
[all …]
H A Dimx6sx-udoo-neo.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 stdout-path = "serial0:115200n8";
16 compatible = "gpio-leds";
19 label = "udoo-neo:red:mmc";
21 default-state = "off";
22 linux,default-trigger = "mmc0";
26 label = "udoo-neo:orange:user";
28 default-state = "keep";
32 reg_sdio_pwr: regulator-sdio-pwr {
33 compatible = "regulator-fixed";
[all …]
H A Dimx53-ppd.dts4 * This file is dual-licensed: you can use it either under the terms
42 /dts-v1/;
45 #include <dt-bindings/input/input.h>
49 compatible = "ge,imx53-cpuvo", "fsl,imx53";
58 stdout-path = "serial0:115200n8";
67 cko2_11M: sgtl-clock-cko2 {
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <11289600>;
73 achc_24M: achc-clock {
[all …]
H A Drk3229-echo-v10.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
46 #include "rk3229-cpu-opp.dtsi"
47 #include "rk322x-android.dtsi"
51 compatible = "rockchip,rk3229-echo", "rockchip,rk3229";
58 reserved-memory {
59 #address-cells = <1>;
60 #size-cells = <1>;
65 no-map;
69 sdio_pwrseq: sdio-pwrseq {
[all …]
H A Drk3128-fireprime.dts2 * This file is dual-licensed: you can use it either under the terms
41 /dts-v1/;
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/pinctrl/rockchip.h>
44 #include <dt-bindings/pwm/pwm.h>
46 #include "rk312x-android.dtsi"
52 fiq-debugger {
53 compatible = "rockchip,fiq-debugger";
54 rockchip,serial-id = <2>;
55 rockchip,signal-irq = <159>;
[all …]
H A Dsun8i-a83t-bananapi-m3.dts2 * Copyright 2017 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
51 model = "Banana Pi BPI-M3";
52 compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
64 compatible = "hdmi-connector";
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A D.rk3328-evb.dtb.pre.tmp
H A Drk3328-evb.dts4 * SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "rk3328-sdram-ddr3-666.dtsi"
10 #include <dt-bindings/input/input.h>
14 compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
16 adc-keys {
19 u-boot,dm-pre-reloc;
20 compatible = "adc-keys";
21 io-channels = <&saradc 0>;
22 io-channel-names = "buttons";
[all …]
H A Dsun9i-a80-optimus.dts2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun9i-a80.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
61 stdout-path = "serial0:115200n8";
65 compatible = "gpio-leds";
[all …]
H A Drk3128-evb.dts4 * SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
10 #include "rk3128-u-boot.dtsi"
14 compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
16 vcc_sys: vcc-sys {
17 compatible = "regulator-fixed";
18 regulator-name = "vcc_sys";
19 regulator-always-on;
20 regulator-boot-on;
21 regulator-min-microvolt = <5000000>;
[all …]
H A D.rk3128-evb.dtb.pre.tmp
H A Dsun9i-a80-cx-a99.dts2 * sun9i-a80-cx-a99.dts - Device Tree file for the Sunchip CX-A99 board.
6 * This file is dual-licensed: you can use it either under the terms
46 * The Sunchip CX-A99 board is found in several similar Android media
50 * Jesurun CS-Q8 (ships with larger remote control)
55 * See the Sunchip CX-A99 page on the Linux-sunxi wiki for more information.
58 /dts-v1/;
59 #include "sun9i-a80.dtsi"
61 #include <dt-bindings/gpio/gpio.h>
64 model = "Sunchip CX-A99";
65 compatible = "sunchip,cx-a99", "allwinner,sun9i-a80";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/nvidia/
H A Dtegra194-p3668-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p3668-0000", "nvidia,tegra194";
28 stdout-path = "serial0:115200n8";
35 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
36 phy-handle = <&phy>;
37 phy-mode = "rgmii-id";
40 #address-cells = <1>;
41 #size-cells = <0>;
44 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
H A Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
40 #size-cells = <0>;
43 compatible = "ethernet-phy-ieee802.3-c22";
45 interrupt-parent = <&gpio>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64-olinuxino.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Olimex A64-Olinuxino";
13 compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
24 hdmi-connector {
25 compatible = "hdmi-connector";
[all …]
H A Dsun50i-a64-orangepi-win.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Copyright (C) 2017-2018 Samuel Holland <samuel@sholland.org>
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64";
26 stdout-path = "serial0:115200n8";
29 hdmi-connector {
30 compatible = "hdmi-connector";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3328-evb-android.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "rk3328-android.dtsi"
9 #include <dt-bindings/input/input.h>
12 gmac_clkin: external-gmac-clock {
13 compatible = "fixed-clock";
14 clock-frequency = <125000000>;
15 clock-output-names = "gmac_clkin";
16 #clock-cells = <0>;
19 sdio_pwrseq: sdio-pwrseq {
20 compatible = "mmc-pwrseq-simple";
[all …]
/OK3568_Linux_fs/kernel/drivers/usb/musb/
H A Ddavinci.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2006 by Texas Instruments
18 #include <linux/dma-mapping.h>
24 #include <asm/mach-types.h>
40 struct gpio_desc *vbus; member
54 /* power everything up; start the on-chip PHY and its PLL */ in phy_on()
68 /* powerdown the on-chip PHY, its PLL, and the OTG block */ in phy_off()
81 tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK) in davinci_musb_enable()
83 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); in davinci_musb_enable()
85 tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK)) in davinci_musb_enable()
[all …]

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