1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * (C) Copyright 2016 Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "rk3328.dtsi" 9*4882a593Smuzhiyun#include "rk3328-sdram-ddr3-666.dtsi" 10*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Rockchip RK3328 EVB"; 14*4882a593Smuzhiyun compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun adc-keys { 17*4882a593Smuzhiyun status = "okay"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun u-boot,dm-pre-reloc; 20*4882a593Smuzhiyun compatible = "adc-keys"; 21*4882a593Smuzhiyun io-channels = <&saradc 0>; 22*4882a593Smuzhiyun io-channel-names = "buttons"; 23*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun vol-up-key { 26*4882a593Smuzhiyun u-boot,dm-pre-reloc; 27*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 28*4882a593Smuzhiyun label = "volume up"; 29*4882a593Smuzhiyun press-threshold-microvolt = <10000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun gmac_clkin: external-gmac-clock { 34*4882a593Smuzhiyun compatible = "fixed-clock"; 35*4882a593Smuzhiyun clock-frequency = <125000000>; 36*4882a593Smuzhiyun clock-output-names = "gmac_clkin"; 37*4882a593Smuzhiyun #clock-cells = <0>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun vcc3v3_sdmmc: sdmmc-pwren { 41*4882a593Smuzhiyun compatible = "regulator-fixed"; 42*4882a593Smuzhiyun regulator-name = "vcc3v3"; 43*4882a593Smuzhiyun gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; 44*4882a593Smuzhiyun regulator-always-on; 45*4882a593Smuzhiyun regulator-boot-on; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun vcc5v0_otg: vcc5v0-otg-drv { 49*4882a593Smuzhiyun compatible = "regulator-fixed"; 50*4882a593Smuzhiyun enable-active-high; 51*4882a593Smuzhiyun regulator-name = "vcc5v0_otg"; 52*4882a593Smuzhiyun gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; 53*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 54*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun vcc_host_vbus: host-vbus-regulator { 58*4882a593Smuzhiyun compatible = "regulator-fixed"; 59*4882a593Smuzhiyun enable-active-high; 60*4882a593Smuzhiyun regulator-name = "vcc_host_vbus"; 61*4882a593Smuzhiyun gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>; 62*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 63*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 67*4882a593Smuzhiyun compatible = "regulator-fixed"; 68*4882a593Smuzhiyun regulator-name = "vcc_phy"; 69*4882a593Smuzhiyun regulator-always-on; 70*4882a593Smuzhiyun regulator-boot-on; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&uart2 { 75*4882a593Smuzhiyun status = "okay"; 76*4882a593Smuzhiyun}; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun&sdmmc { 79*4882a593Smuzhiyun bus-width = <4>; 80*4882a593Smuzhiyun cap-mmc-highspeed; 81*4882a593Smuzhiyun cap-sd-highspeed; 82*4882a593Smuzhiyun card-detect-delay = <200>; 83*4882a593Smuzhiyun disable-wp; 84*4882a593Smuzhiyun num-slots = <1>; 85*4882a593Smuzhiyun pinctrl-names = "default"; 86*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; 87*4882a593Smuzhiyun vmmc-supply = <&vcc3v3_sdmmc>; 88*4882a593Smuzhiyun status = "okay"; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&crypto { 92*4882a593Smuzhiyun status = "okay"; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun&emmc { 96*4882a593Smuzhiyun bus-width = <8>; 97*4882a593Smuzhiyun cap-mmc-highspeed; 98*4882a593Smuzhiyun supports-emmc; 99*4882a593Smuzhiyun disable-wp; 100*4882a593Smuzhiyun non-removable; 101*4882a593Smuzhiyun num-slots = <1>; 102*4882a593Smuzhiyun pinctrl-names = "default"; 103*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 104*4882a593Smuzhiyun status = "okay"; 105*4882a593Smuzhiyun}; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun&gmac2io { 108*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 109*4882a593Smuzhiyun phy-mode = "rgmii"; 110*4882a593Smuzhiyun clock_in_out = "input"; 111*4882a593Smuzhiyun snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 112*4882a593Smuzhiyun snps,reset-active-low; 113*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 50000>; 114*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 115*4882a593Smuzhiyun assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 116*4882a593Smuzhiyun pinctrl-names = "default"; 117*4882a593Smuzhiyun pinctrl-0 = <&rgmiim1_pins>; 118*4882a593Smuzhiyun tx_delay = <0x26>; 119*4882a593Smuzhiyun rx_delay = <0x11>; 120*4882a593Smuzhiyun status = "okay"; 121*4882a593Smuzhiyun}; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun&gmac2phy { 124*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 125*4882a593Smuzhiyun clock_in_out = "output"; 126*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; 127*4882a593Smuzhiyun assigned-clock-rate = <50000000>; 128*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2PHY>; 129*4882a593Smuzhiyun assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; 130*4882a593Smuzhiyun status = "okay"; 131*4882a593Smuzhiyun}; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun&u2phy { 134*4882a593Smuzhiyun status = "okay"; 135*4882a593Smuzhiyun}; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun&u2phy_otg { 138*4882a593Smuzhiyun status = "okay"; 139*4882a593Smuzhiyun}; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun&u2phy_host { 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun}; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun&u3phy { 146*4882a593Smuzhiyun vbus-supply = <&vcc_host_vbus>; 147*4882a593Smuzhiyun status = "okay"; 148*4882a593Smuzhiyun}; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun&u3phy_utmi { 151*4882a593Smuzhiyun status = "okay"; 152*4882a593Smuzhiyun}; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun&u3phy_pipe { 155*4882a593Smuzhiyun status = "okay"; 156*4882a593Smuzhiyun}; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun&usb_host0_ehci { 159*4882a593Smuzhiyun vbus-supply = <&vcc5v0_otg>; 160*4882a593Smuzhiyun status = "okay"; 161*4882a593Smuzhiyun}; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun&usb_host0_ohci { 164*4882a593Smuzhiyun status = "okay"; 165*4882a593Smuzhiyun}; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun&usb20_otg { 168*4882a593Smuzhiyun vbus-supply = <&vcc5v0_otg>; 169*4882a593Smuzhiyun status = "okay"; 170*4882a593Smuzhiyun}; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun&usbdrd3 { 173*4882a593Smuzhiyun status = "okay"; 174*4882a593Smuzhiyun}; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun&usbdrd_dwc3 { 177*4882a593Smuzhiyun status = "okay"; 178*4882a593Smuzhiyun}; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun&i2c1 { 181*4882a593Smuzhiyun clock-frequency = <400000>; 182*4882a593Smuzhiyun i2c-scl-rising-time-ns = <168>; 183*4882a593Smuzhiyun i2c-scl-falling-time-ns = <4>; 184*4882a593Smuzhiyun status = "okay"; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun rk805: pmic@18 { 187*4882a593Smuzhiyun compatible = "rockchip,rk805"; 188*4882a593Smuzhiyun status = "okay"; 189*4882a593Smuzhiyun reg = <0x18>; 190*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 191*4882a593Smuzhiyun interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 192*4882a593Smuzhiyun pinctrl-names = "default"; 193*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 194*4882a593Smuzhiyun rockchip,system-power-controller; 195*4882a593Smuzhiyun wakeup-source; 196*4882a593Smuzhiyun gpio-controller; 197*4882a593Smuzhiyun #gpio-cells = <2>; 198*4882a593Smuzhiyun #clock-cells = <1>; 199*4882a593Smuzhiyun clock-output-names = "xin32k", "rk805-clkout2"; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun pwrkey { 202*4882a593Smuzhiyun status = "okay"; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun regulators { 206*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 207*4882a593Smuzhiyun regulator-name = "vdd_logic"; 208*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 209*4882a593Smuzhiyun regulator-max-microvolt = <1450000>; 210*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 211*4882a593Smuzhiyun regulator-boot-on; 212*4882a593Smuzhiyun regulator-always-on; 213*4882a593Smuzhiyun regulator-state-mem { 214*4882a593Smuzhiyun regulator-on-in-suspend; 215*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun vdd_arm: DCDC_REG2 { 220*4882a593Smuzhiyun regulator-name = "vdd_arm"; 221*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 222*4882a593Smuzhiyun regulator-max-microvolt = <1450000>; 223*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 224*4882a593Smuzhiyun regulator-boot-on; 225*4882a593Smuzhiyun regulator-always-on; 226*4882a593Smuzhiyun regulator-state-mem { 227*4882a593Smuzhiyun regulator-on-in-suspend; 228*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 233*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 234*4882a593Smuzhiyun regulator-boot-on; 235*4882a593Smuzhiyun regulator-always-on; 236*4882a593Smuzhiyun regulator-state-mem { 237*4882a593Smuzhiyun regulator-on-in-suspend; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 242*4882a593Smuzhiyun regulator-name = "vcc_io"; 243*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 244*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 245*4882a593Smuzhiyun regulator-boot-on; 246*4882a593Smuzhiyun regulator-always-on; 247*4882a593Smuzhiyun regulator-state-mem { 248*4882a593Smuzhiyun regulator-on-in-suspend; 249*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun vdd_18: LDO_REG1 { 254*4882a593Smuzhiyun regulator-name = "vdd_18"; 255*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 256*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 257*4882a593Smuzhiyun regulator-boot-on; 258*4882a593Smuzhiyun regulator-always-on; 259*4882a593Smuzhiyun regulator-state-mem { 260*4882a593Smuzhiyun regulator-on-in-suspend; 261*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun vcc_18emmc: LDO_REG2 { 266*4882a593Smuzhiyun regulator-name = "vcc_18emmc"; 267*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 268*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 269*4882a593Smuzhiyun regulator-boot-on; 270*4882a593Smuzhiyun regulator-always-on; 271*4882a593Smuzhiyun regulator-state-mem { 272*4882a593Smuzhiyun regulator-on-in-suspend; 273*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun vdd_10: LDO_REG3 { 278*4882a593Smuzhiyun regulator-name = "vdd_10"; 279*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 280*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 281*4882a593Smuzhiyun regulator-boot-on; 282*4882a593Smuzhiyun regulator-always-on; 283*4882a593Smuzhiyun regulator-state-mem { 284*4882a593Smuzhiyun regulator-on-in-suspend; 285*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun}; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun&pinctrl { 293*4882a593Smuzhiyun pmic { 294*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 295*4882a593Smuzhiyun rockchip,pins = 296*4882a593Smuzhiyun <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio2_a6 */ 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun}; 300*4882a593Smuzhiyun 301