1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright 2014 General Electric Company 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License 11*4882a593Smuzhiyun * version 2 as published by the Free Software Foundation. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 14*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*4882a593Smuzhiyun * GNU General Public License for more details. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * Or, alternatively, 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 21*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 22*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 23*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 24*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 25*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 26*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 27*4882a593Smuzhiyun * conditions: 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 30*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 31*4882a593Smuzhiyun * 32*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 33*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 37*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun/dts-v1/; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun#include "imx53.dtsi" 45*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun/ { 48*4882a593Smuzhiyun model = "General Electric CS ONE"; 49*4882a593Smuzhiyun compatible = "ge,imx53-cpuvo", "fsl,imx53"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun aliases { 52*4882a593Smuzhiyun spi0 = &cspi; 53*4882a593Smuzhiyun spi1 = &ecspi1; 54*4882a593Smuzhiyun spi2 = &ecspi2; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun chosen { 58*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun memory@70000000 { 62*4882a593Smuzhiyun device_type = "memory"; 63*4882a593Smuzhiyun reg = <0x70000000 0x20000000>, 64*4882a593Smuzhiyun <0xb0000000 0x20000000>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun cko2_11M: sgtl-clock-cko2 { 68*4882a593Smuzhiyun compatible = "fixed-clock"; 69*4882a593Smuzhiyun #clock-cells = <0>; 70*4882a593Smuzhiyun clock-frequency = <11289600>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun achc_24M: achc-clock { 74*4882a593Smuzhiyun compatible = "fixed-clock"; 75*4882a593Smuzhiyun #clock-cells = <0>; 76*4882a593Smuzhiyun clock-frequency = <24000000>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun sgtlsound: sound { 80*4882a593Smuzhiyun compatible = "fsl,imx53-cpuvo-sgtl5000", 81*4882a593Smuzhiyun "fsl,imx-audio-sgtl5000"; 82*4882a593Smuzhiyun model = "imx53-cpuvo-sgtl5000"; 83*4882a593Smuzhiyun ssi-controller = <&ssi2>; 84*4882a593Smuzhiyun audio-codec = <&sgtl5000>; 85*4882a593Smuzhiyun audio-routing = 86*4882a593Smuzhiyun "MIC_IN", "Mic Jack", 87*4882a593Smuzhiyun "Mic Jack", "Mic Bias", 88*4882a593Smuzhiyun "Headphone Jack", "HP_OUT"; 89*4882a593Smuzhiyun mux-int-port = <2>; 90*4882a593Smuzhiyun mux-ext-port = <6>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun reg_sgtl5k: regulator-sgtl5k { 94*4882a593Smuzhiyun compatible = "regulator-fixed"; 95*4882a593Smuzhiyun regulator-name = "regulator-sgtl5k"; 96*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 97*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 98*4882a593Smuzhiyun regulator-always-on; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun reg_usb_otg_vbus: regulator-usb-otg-vbus { 102*4882a593Smuzhiyun compatible = "regulator-fixed"; 103*4882a593Smuzhiyun regulator-name = "usbotg_vbus"; 104*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 105*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 106*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usb_otg_vbus>; 107*4882a593Smuzhiyun gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; 108*4882a593Smuzhiyun enable-active-high; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun reg_usb_vbus: regulator-usb-vbus { 112*4882a593Smuzhiyun compatible = "regulator-fixed"; 113*4882a593Smuzhiyun regulator-name = "usbh1_vbus"; 114*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 115*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 116*4882a593Smuzhiyun regulator-always-on; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun reg_usbh2_vbus: regulator-usbh2-vbus { 120*4882a593Smuzhiyun compatible = "regulator-fixed"; 121*4882a593Smuzhiyun regulator-name = "usbh2_vbus"; 122*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 123*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 124*4882a593Smuzhiyun pinctrl-names = "default"; 125*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbh2_vbus>; 126*4882a593Smuzhiyun gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; 127*4882a593Smuzhiyun enable-active-high; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun reg_usbh3_vbus: regulator-usbh3-vbus { 131*4882a593Smuzhiyun compatible = "regulator-fixed"; 132*4882a593Smuzhiyun regulator-name = "usbh3_vbus"; 133*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 134*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 135*4882a593Smuzhiyun pinctrl-names = "default"; 136*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbh3_vbus>; 137*4882a593Smuzhiyun gpio = <&gpio5 27 GPIO_ACTIVE_HIGH>; 138*4882a593Smuzhiyun enable-active-high; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun reg_tsiref: regulator-tsiref { 142*4882a593Smuzhiyun compatible = "regulator-fixed"; 143*4882a593Smuzhiyun regulator-name = "tsiref"; 144*4882a593Smuzhiyun regulator-min-microvolt = <2500000>; 145*4882a593Smuzhiyun regulator-max-microvolt = <2500000>; 146*4882a593Smuzhiyun regulator-always-on; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun reg_3v3: regulator-3v3 { 150*4882a593Smuzhiyun /* TPS54320 */ 151*4882a593Smuzhiyun compatible = "regulator-fixed"; 152*4882a593Smuzhiyun regulator-name = "3V3"; 153*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 154*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 155*4882a593Smuzhiyun regulator-always-on; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun reg_3v3_lcd: regulator-3v3-lcd { 159*4882a593Smuzhiyun /* MIC2009 */ 160*4882a593Smuzhiyun compatible = "regulator-fixed"; 161*4882a593Smuzhiyun regulator-name = "LCD_3V3"; 162*4882a593Smuzhiyun vin-supply = <®_3v3>; 163*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 164*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 165*4882a593Smuzhiyun regulator-always-on; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun pwm_bl: backlight { 169*4882a593Smuzhiyun compatible = "pwm-backlight"; 170*4882a593Smuzhiyun pwms = <&pwm2 0 50000>; 171*4882a593Smuzhiyun brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35 172*4882a593Smuzhiyun 38 40 43 45 48 51 53 56 58 61 63 66 68 71 173*4882a593Smuzhiyun 73 76 79 81 84 86 89 91 94 96 99 102 104 174*4882a593Smuzhiyun 107 109 112 114 117 119 122 124 127 130 175*4882a593Smuzhiyun 132 135 137 140 142 145 147 150 153 155 176*4882a593Smuzhiyun 158 160 163 165 168 170 173 175 178 181 177*4882a593Smuzhiyun 183 186 188 191 193 196 198 201 204 206 178*4882a593Smuzhiyun 209 211 214 216 219 221 224 226 229 232 179*4882a593Smuzhiyun 234 237 239 242 244 247 249 252 255>; 180*4882a593Smuzhiyun default-brightness-level = <0>; 181*4882a593Smuzhiyun enable-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; 182*4882a593Smuzhiyun power-supply = <®_3v3_lcd>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun leds-brightness { 186*4882a593Smuzhiyun compatible = "pwm-leds"; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun alarm-brightness { 189*4882a593Smuzhiyun pwms = <&pwm1 0 100000>; 190*4882a593Smuzhiyun max-brightness = <255>; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun leds { 195*4882a593Smuzhiyun compatible = "gpio-leds"; 196*4882a593Smuzhiyun pinctrl-names = "default"; 197*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_alarmled_pins>; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun alarm1 { 200*4882a593Smuzhiyun label = "alarm:red"; 201*4882a593Smuzhiyun gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun alarm2 { 205*4882a593Smuzhiyun label = "alarm:yellow"; 206*4882a593Smuzhiyun gpios = <&gpio7 7 GPIO_ACTIVE_HIGH>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun alarm3 { 210*4882a593Smuzhiyun label = "alarm:blue"; 211*4882a593Smuzhiyun gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun alarm4 { 215*4882a593Smuzhiyun label = "alarm:silenced"; 216*4882a593Smuzhiyun gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun gpio-poweroff { 221*4882a593Smuzhiyun compatible = "gpio-poweroff"; 222*4882a593Smuzhiyun gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun gpio-restart { 226*4882a593Smuzhiyun compatible = "gpio-restart"; 227*4882a593Smuzhiyun gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>; 228*4882a593Smuzhiyun active-delay = <100>; 229*4882a593Smuzhiyun inactive-delay = <10>; 230*4882a593Smuzhiyun wait-delay = <100>; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun power-gpio-keys { 234*4882a593Smuzhiyun compatible = "gpio-keys"; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun power-button { 237*4882a593Smuzhiyun label = "Power button"; 238*4882a593Smuzhiyun gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; 239*4882a593Smuzhiyun linux,code = <KEY_POWER>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun touch-lock-key { 244*4882a593Smuzhiyun compatible = "gpio-keys"; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun touch-lock-button { 247*4882a593Smuzhiyun label = "Touch lock button"; 248*4882a593Smuzhiyun gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; 249*4882a593Smuzhiyun linux,code = <KEY_F12>; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun usbphy2: usbphy-2 { 254*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 255*4882a593Smuzhiyun vcc-supply = <®_3v3>; 256*4882a593Smuzhiyun reset-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>; 257*4882a593Smuzhiyun clock-names = "main_clk"; 258*4882a593Smuzhiyun clock-frequency = <24000000>; 259*4882a593Smuzhiyun clocks = <&clks IMX5_CLK_CKO2>; 260*4882a593Smuzhiyun assigned-clocks = <&clks IMX5_CLK_CKO2_SEL>, <&clks IMX5_CLK_OSC>; 261*4882a593Smuzhiyun assigned-clock-parents = <&clks IMX5_CLK_OSC>; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun usbphy3: usbphy-3 { 265*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 266*4882a593Smuzhiyun vcc-supply = <®_3v3>; 267*4882a593Smuzhiyun reset-gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; 268*4882a593Smuzhiyun clock-names = "main_clk"; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun clock-frequency = <24000000>; 271*4882a593Smuzhiyun clocks = <&clks IMX5_CLK_CKO2>; 272*4882a593Smuzhiyun assigned-clocks = <&clks IMX5_CLK_CKO2_SEL>, <&clks IMX5_CLK_OSC>; 273*4882a593Smuzhiyun assigned-clock-parents = <&clks IMX5_CLK_OSC>; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun panel-lvds0 { 277*4882a593Smuzhiyun compatible = "nvd,9128"; 278*4882a593Smuzhiyun power-supply = <®_3v3_lcd>; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun port { 281*4882a593Smuzhiyun panel_in_lvds0: endpoint { 282*4882a593Smuzhiyun remote-endpoint = <&lvds0_out>; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun}; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun&usbphy0 { 289*4882a593Smuzhiyun vcc-supply = <®_3v3>; 290*4882a593Smuzhiyun}; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun&usbphy1 { 293*4882a593Smuzhiyun vcc-supply = <®_3v3>; 294*4882a593Smuzhiyun}; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun&audmux { 297*4882a593Smuzhiyun pinctrl-names = "default"; 298*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_audmux>; 299*4882a593Smuzhiyun status = "okay"; 300*4882a593Smuzhiyun}; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun&cpu0 { 303*4882a593Smuzhiyun /* CPU rated to 1GHz, not 1.2GHz as per the default settings */ 304*4882a593Smuzhiyun operating-points = < 305*4882a593Smuzhiyun /* kHz uV */ 306*4882a593Smuzhiyun 166666 850000 307*4882a593Smuzhiyun 400000 900000 308*4882a593Smuzhiyun 800000 1050000 309*4882a593Smuzhiyun 1000000 1200000 310*4882a593Smuzhiyun >; 311*4882a593Smuzhiyun}; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun&ecspi1 { 314*4882a593Smuzhiyun pinctrl-names = "default"; 315*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ecspi1>; 316*4882a593Smuzhiyun cs-gpios = <&gpio5 17 GPIO_ACTIVE_LOW 317*4882a593Smuzhiyun &gpio4 10 GPIO_ACTIVE_LOW 318*4882a593Smuzhiyun &gpio4 11 GPIO_ACTIVE_LOW 319*4882a593Smuzhiyun &gpio4 12 GPIO_ACTIVE_LOW>; 320*4882a593Smuzhiyun status = "okay"; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun spidev0: spi@1 { 323*4882a593Smuzhiyun compatible = "ge,achc", "nxp,kinetis-k20"; 324*4882a593Smuzhiyun reg = <1>, <0>; 325*4882a593Smuzhiyun vdd-supply = <®_3v3>; 326*4882a593Smuzhiyun vdda-supply = <®_3v3>; 327*4882a593Smuzhiyun clocks = <&achc_24M>; 328*4882a593Smuzhiyun reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; 329*4882a593Smuzhiyun }; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun gpioxra0: gpio@2 { 332*4882a593Smuzhiyun compatible = "exar,xra1403"; 333*4882a593Smuzhiyun reg = <2>; 334*4882a593Smuzhiyun gpio-controller; 335*4882a593Smuzhiyun #gpio-cells = <2>; 336*4882a593Smuzhiyun spi-max-frequency = <1000000>; 337*4882a593Smuzhiyun }; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun gpioxra1: gpio@3 { 340*4882a593Smuzhiyun compatible = "exar,xra1403"; 341*4882a593Smuzhiyun reg = <3>; 342*4882a593Smuzhiyun gpio-controller; 343*4882a593Smuzhiyun #gpio-cells = <2>; 344*4882a593Smuzhiyun spi-max-frequency = <1000000>; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun}; 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun&ecspi2 { 349*4882a593Smuzhiyun pinctrl-names = "default"; 350*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ecspi2>; 351*4882a593Smuzhiyun cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; 352*4882a593Smuzhiyun status = "okay"; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun da9053@0 { 355*4882a593Smuzhiyun compatible = "dlg,da9053-aa"; 356*4882a593Smuzhiyun reg = <0>; 357*4882a593Smuzhiyun interrupt-parent = <&gpio3>; 358*4882a593Smuzhiyun interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 359*4882a593Smuzhiyun spi-max-frequency = <1000000>; 360*4882a593Smuzhiyun dlg,tsi-as-adc; 361*4882a593Smuzhiyun tsiref-supply = <®_tsiref>; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun regulators { 364*4882a593Smuzhiyun buck1_reg: buck1 { 365*4882a593Smuzhiyun regulator-name = "BUCKCORE"; 366*4882a593Smuzhiyun regulator-min-microvolt = <500000>; 367*4882a593Smuzhiyun regulator-max-microvolt = <2075000>; 368*4882a593Smuzhiyun regulator-always-on; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun buck2_reg: buck2 { 372*4882a593Smuzhiyun regulator-name = "BUCKPRO"; 373*4882a593Smuzhiyun regulator-min-microvolt = <500000>; 374*4882a593Smuzhiyun regulator-max-microvolt = <2075000>; 375*4882a593Smuzhiyun regulator-always-on; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun buck3_reg: buck3 { 379*4882a593Smuzhiyun regulator-name = "BUCKMEM"; 380*4882a593Smuzhiyun regulator-min-microvolt = <925000>; 381*4882a593Smuzhiyun regulator-max-microvolt = <2500000>; 382*4882a593Smuzhiyun regulator-always-on; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun buck4_reg: buck4 { 386*4882a593Smuzhiyun regulator-name = "BUCKPERI"; 387*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 388*4882a593Smuzhiyun regulator-max-microvolt = <3600000>; 389*4882a593Smuzhiyun regulator-always-on; 390*4882a593Smuzhiyun }; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun ldo1_reg: ldo1 { 393*4882a593Smuzhiyun regulator-name = "ldo1_1v3"; 394*4882a593Smuzhiyun regulator-min-microvolt = <600000>; 395*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 396*4882a593Smuzhiyun regulator-always-on; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun ldo2_reg: ldo2 { 400*4882a593Smuzhiyun regulator-name = "ldo2_1v3"; 401*4882a593Smuzhiyun regulator-min-microvolt = <600000>; 402*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 403*4882a593Smuzhiyun regulator-always-on; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun ldo3_reg: ldo3 { 407*4882a593Smuzhiyun regulator-name = "ldo3_3v3"; 408*4882a593Smuzhiyun regulator-min-microvolt = <1725000>; 409*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 410*4882a593Smuzhiyun regulator-always-on; 411*4882a593Smuzhiyun }; 412*4882a593Smuzhiyun 413*4882a593Smuzhiyun ldo4_reg: ldo4 { 414*4882a593Smuzhiyun regulator-name = "ldo4_2v775"; 415*4882a593Smuzhiyun regulator-min-microvolt = <1725000>; 416*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 417*4882a593Smuzhiyun regulator-always-on; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun ldo5_reg: ldo5 { 421*4882a593Smuzhiyun regulator-name = "ldo5_3v3"; 422*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 423*4882a593Smuzhiyun regulator-max-microvolt = <3600000>; 424*4882a593Smuzhiyun regulator-always-on; 425*4882a593Smuzhiyun }; 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun ldo6_reg: ldo6 { 428*4882a593Smuzhiyun regulator-name = "ldo6_1v3"; 429*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 430*4882a593Smuzhiyun regulator-max-microvolt = <3600000>; 431*4882a593Smuzhiyun regulator-always-on; 432*4882a593Smuzhiyun }; 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun ldo7_reg: ldo7 { 435*4882a593Smuzhiyun regulator-name = "ldo7_2v75"; 436*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 437*4882a593Smuzhiyun regulator-max-microvolt = <3600000>; 438*4882a593Smuzhiyun regulator-always-on; 439*4882a593Smuzhiyun }; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun ldo8_reg: ldo8 { 442*4882a593Smuzhiyun regulator-name = "ldo8_1v8"; 443*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 444*4882a593Smuzhiyun regulator-max-microvolt = <3600000>; 445*4882a593Smuzhiyun regulator-always-on; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun ldo9_reg: ldo9 { 449*4882a593Smuzhiyun regulator-name = "ldo9_1v5"; 450*4882a593Smuzhiyun regulator-min-microvolt = <1250000>; 451*4882a593Smuzhiyun regulator-max-microvolt = <3650000>; 452*4882a593Smuzhiyun regulator-always-on; 453*4882a593Smuzhiyun }; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun ldo10_reg: ldo10 { 456*4882a593Smuzhiyun regulator-name = "ldo10_1v3"; 457*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 458*4882a593Smuzhiyun regulator-max-microvolt = <3600000>; 459*4882a593Smuzhiyun regulator-always-on; 460*4882a593Smuzhiyun }; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun}; 465*4882a593Smuzhiyun 466*4882a593Smuzhiyun&esdhc3 { 467*4882a593Smuzhiyun pinctrl-names = "default"; 468*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_esdhc3>; 469*4882a593Smuzhiyun bus-width = <8>; 470*4882a593Smuzhiyun status = "okay"; 471*4882a593Smuzhiyun}; 472*4882a593Smuzhiyun 473*4882a593Smuzhiyun&fec { 474*4882a593Smuzhiyun pinctrl-names = "default"; 475*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_fec>; 476*4882a593Smuzhiyun phy-supply = <®_3v3>; 477*4882a593Smuzhiyun phy-mode = "rmii"; 478*4882a593Smuzhiyun phy-reset-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>; 479*4882a593Smuzhiyun status = "okay"; 480*4882a593Smuzhiyun}; 481*4882a593Smuzhiyun 482*4882a593Smuzhiyun&i2c1 { 483*4882a593Smuzhiyun pinctrl-names = "default", "gpio"; 484*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c1>; 485*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_i2c1_gpio>; 486*4882a593Smuzhiyun sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; 487*4882a593Smuzhiyun scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 488*4882a593Smuzhiyun status = "okay"; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun i2c-switch@70 { 491*4882a593Smuzhiyun compatible = "nxp,pca9547"; 492*4882a593Smuzhiyun #address-cells = <1>; 493*4882a593Smuzhiyun #size-cells = <0>; 494*4882a593Smuzhiyun reg = <0x70>; 495*4882a593Smuzhiyun reset-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun i2c4: i2c@0 { 498*4882a593Smuzhiyun #address-cells = <1>; 499*4882a593Smuzhiyun #size-cells = <0>; 500*4882a593Smuzhiyun reg = <0>; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun sgtl5000: codec@a { 503*4882a593Smuzhiyun compatible = "fsl,sgtl5000"; 504*4882a593Smuzhiyun reg = <0xa>; 505*4882a593Smuzhiyun #sound-dai-cells = <0>; 506*4882a593Smuzhiyun VDDA-supply = <®_sgtl5k>; 507*4882a593Smuzhiyun VDDIO-supply = <®_sgtl5k>; 508*4882a593Smuzhiyun clocks = <&cko2_11M>; 509*4882a593Smuzhiyun status = "okay"; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun i2c5: i2c@1 { 514*4882a593Smuzhiyun #address-cells = <1>; 515*4882a593Smuzhiyun #size-cells = <0>; 516*4882a593Smuzhiyun reg = <1>; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun rtc@30 { 519*4882a593Smuzhiyun compatible = "sii,s35390a"; 520*4882a593Smuzhiyun reg = <0x30>; 521*4882a593Smuzhiyun }; 522*4882a593Smuzhiyun 523*4882a593Smuzhiyun temp@48 { 524*4882a593Smuzhiyun compatible = "ti,tmp112"; 525*4882a593Smuzhiyun reg = <0x48>; 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun mma8453q: accelerometer@1c { 529*4882a593Smuzhiyun compatible = "fsl,mma8453"; 530*4882a593Smuzhiyun reg = <0x1c>; 531*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 532*4882a593Smuzhiyun interrupts = <6 IRQ_TYPE_NONE>; 533*4882a593Smuzhiyun interrupt-names = "INT1"; 534*4882a593Smuzhiyun }; 535*4882a593Smuzhiyun 536*4882a593Smuzhiyun mpl3115: pressure-sensor@60 { 537*4882a593Smuzhiyun compatible = "fsl,mpl3115"; 538*4882a593Smuzhiyun reg = <0x60>; 539*4882a593Smuzhiyun }; 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun eeprom: eeprom@50 { 542*4882a593Smuzhiyun compatible = "atmel,24c08"; 543*4882a593Smuzhiyun reg = <0x50>; 544*4882a593Smuzhiyun }; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun i2c6: i2c@2 { 548*4882a593Smuzhiyun #address-cells = <1>; 549*4882a593Smuzhiyun #size-cells = <0>; 550*4882a593Smuzhiyun reg = <2>; 551*4882a593Smuzhiyun }; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun i2c7: i2c@3 { 554*4882a593Smuzhiyun #address-cells = <1>; 555*4882a593Smuzhiyun #size-cells = <0>; 556*4882a593Smuzhiyun reg = <3>; 557*4882a593Smuzhiyun }; 558*4882a593Smuzhiyun 559*4882a593Smuzhiyun i2c8: i2c@4 { 560*4882a593Smuzhiyun #address-cells = <1>; 561*4882a593Smuzhiyun #size-cells = <0>; 562*4882a593Smuzhiyun reg = <4>; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun i2c9: i2c@5 { 566*4882a593Smuzhiyun #address-cells = <1>; 567*4882a593Smuzhiyun #size-cells = <0>; 568*4882a593Smuzhiyun reg = <5>; 569*4882a593Smuzhiyun }; 570*4882a593Smuzhiyun 571*4882a593Smuzhiyun i2c10: i2c@6 { 572*4882a593Smuzhiyun #address-cells = <1>; 573*4882a593Smuzhiyun #size-cells = <0>; 574*4882a593Smuzhiyun reg = <6>; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun i2c11: i2c@7 { 578*4882a593Smuzhiyun #address-cells = <1>; 579*4882a593Smuzhiyun #size-cells = <0>; 580*4882a593Smuzhiyun reg = <7>; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun }; 583*4882a593Smuzhiyun}; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun&i2c2 { 586*4882a593Smuzhiyun pinctrl-names = "default", "gpio"; 587*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c2>; 588*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_i2c2_gpio>; 589*4882a593Smuzhiyun sda-gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; 590*4882a593Smuzhiyun scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; 591*4882a593Smuzhiyun status = "okay"; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun touchscreen@4b { 594*4882a593Smuzhiyun compatible = "atmel,maxtouch"; 595*4882a593Smuzhiyun reset-gpio = <&gpio5 19 GPIO_ACTIVE_LOW>; 596*4882a593Smuzhiyun reg = <0x4b>; 597*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 598*4882a593Smuzhiyun interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 599*4882a593Smuzhiyun }; 600*4882a593Smuzhiyun}; 601*4882a593Smuzhiyun 602*4882a593Smuzhiyun&i2c3 { 603*4882a593Smuzhiyun pinctrl-names = "default", "gpio"; 604*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c3>; 605*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_i2c3_gpio>; 606*4882a593Smuzhiyun sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; 607*4882a593Smuzhiyun scl-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; 608*4882a593Smuzhiyun status = "okay"; 609*4882a593Smuzhiyun}; 610*4882a593Smuzhiyun 611*4882a593Smuzhiyun&ldb { 612*4882a593Smuzhiyun status = "okay"; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun lvds0: lvds-channel@0 { 615*4882a593Smuzhiyun status = "okay"; 616*4882a593Smuzhiyun 617*4882a593Smuzhiyun port@2 { 618*4882a593Smuzhiyun lvds0_out: endpoint { 619*4882a593Smuzhiyun remote-endpoint = <&panel_in_lvds0>; 620*4882a593Smuzhiyun }; 621*4882a593Smuzhiyun }; 622*4882a593Smuzhiyun }; 623*4882a593Smuzhiyun}; 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun&pmu { 626*4882a593Smuzhiyun secure-reg-access; 627*4882a593Smuzhiyun}; 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun&pwm1 { 630*4882a593Smuzhiyun #pwm-cells = <2>; 631*4882a593Smuzhiyun pinctrl-names = "default"; 632*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm1>; 633*4882a593Smuzhiyun status = "okay"; 634*4882a593Smuzhiyun}; 635*4882a593Smuzhiyun 636*4882a593Smuzhiyun&pwm2 { 637*4882a593Smuzhiyun #pwm-cells = <2>; 638*4882a593Smuzhiyun pinctrl-names = "default"; 639*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm2>; 640*4882a593Smuzhiyun status = "okay"; 641*4882a593Smuzhiyun}; 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun&ssi2 { 644*4882a593Smuzhiyun status = "okay"; 645*4882a593Smuzhiyun}; 646*4882a593Smuzhiyun 647*4882a593Smuzhiyun&uart1 { 648*4882a593Smuzhiyun pinctrl-names = "default"; 649*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart1>; 650*4882a593Smuzhiyun status = "okay"; 651*4882a593Smuzhiyun}; 652*4882a593Smuzhiyun 653*4882a593Smuzhiyun&uart2 { 654*4882a593Smuzhiyun pinctrl-names = "default"; 655*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart2>; 656*4882a593Smuzhiyun status = "okay"; 657*4882a593Smuzhiyun}; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun&uart3 { 660*4882a593Smuzhiyun pinctrl-names = "default"; 661*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart3>; 662*4882a593Smuzhiyun uart-has-rtscts; 663*4882a593Smuzhiyun status = "okay"; 664*4882a593Smuzhiyun}; 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun&uart4 { 667*4882a593Smuzhiyun pinctrl-names = "default"; 668*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart4>; 669*4882a593Smuzhiyun status = "okay"; 670*4882a593Smuzhiyun}; 671*4882a593Smuzhiyun 672*4882a593Smuzhiyun&uart5 { 673*4882a593Smuzhiyun pinctrl-names = "default"; 674*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart5>; 675*4882a593Smuzhiyun status = "okay"; 676*4882a593Smuzhiyun}; 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun&usbotg { 679*4882a593Smuzhiyun dr_mode = "otg"; 680*4882a593Smuzhiyun phy_type = "utmi"; 681*4882a593Smuzhiyun vbus-supply = <®_usb_otg_vbus>; 682*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usb_otg>; 683*4882a593Smuzhiyun status = "okay"; 684*4882a593Smuzhiyun}; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun&usbh1 { 687*4882a593Smuzhiyun vbus-supply = <®_usb_vbus>; 688*4882a593Smuzhiyun phy_type = "utmi"; 689*4882a593Smuzhiyun dr_mode = "host"; 690*4882a593Smuzhiyun status = "okay"; 691*4882a593Smuzhiyun}; 692*4882a593Smuzhiyun 693*4882a593Smuzhiyun&usbh2 { 694*4882a593Smuzhiyun pinctrl-names = "default"; 695*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbh2>; 696*4882a593Smuzhiyun phy_type = "ulpi"; 697*4882a593Smuzhiyun dr_mode = "host"; 698*4882a593Smuzhiyun fsl,usbphy = <&usbphy2>; 699*4882a593Smuzhiyun vbus-supply = <®_usbh2_vbus>; 700*4882a593Smuzhiyun status = "okay"; 701*4882a593Smuzhiyun}; 702*4882a593Smuzhiyun 703*4882a593Smuzhiyun&usbh3 { 704*4882a593Smuzhiyun pinctrl-names = "default"; 705*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbh3>; 706*4882a593Smuzhiyun phy_type = "ulpi"; 707*4882a593Smuzhiyun dr_mode = "host"; 708*4882a593Smuzhiyun vbus-supply = <®_usbh3_vbus>; 709*4882a593Smuzhiyun fsl,usbphy = <&usbphy3>; 710*4882a593Smuzhiyun status = "okay"; 711*4882a593Smuzhiyun}; 712*4882a593Smuzhiyun 713*4882a593Smuzhiyun&iomuxc { 714*4882a593Smuzhiyun pinctrl-names = "default"; 715*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hog_rev6>; 716*4882a593Smuzhiyun 717*4882a593Smuzhiyun pinctrl_audmux: audmuxgrp { 718*4882a593Smuzhiyun fsl,pins = < 719*4882a593Smuzhiyun MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD 0x400 720*4882a593Smuzhiyun MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD 0x400 721*4882a593Smuzhiyun MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC 0x400 722*4882a593Smuzhiyun MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS 0x400 723*4882a593Smuzhiyun MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC 0x400 724*4882a593Smuzhiyun MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS 0x400 725*4882a593Smuzhiyun MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD 0x400 726*4882a593Smuzhiyun MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD 0x400 727*4882a593Smuzhiyun >; 728*4882a593Smuzhiyun }; 729*4882a593Smuzhiyun 730*4882a593Smuzhiyun pinctrl_ecspi1: ecspi1grp { 731*4882a593Smuzhiyun fsl,pins = < 732*4882a593Smuzhiyun MX53_PAD_DISP0_DAT21__ECSPI1_MOSI 0x400 733*4882a593Smuzhiyun MX53_PAD_DISP0_DAT22__ECSPI1_MISO 0x400 734*4882a593Smuzhiyun MX53_PAD_DISP0_DAT20__ECSPI1_SCLK 0x400 735*4882a593Smuzhiyun /* ECSPI1_SS0, must treat as GPIO for EzPort */ 736*4882a593Smuzhiyun MX53_PAD_DISP0_DAT23__GPIO5_17 0x400 737*4882a593Smuzhiyun MX53_PAD_KEY_COL2__GPIO4_10 0x0 738*4882a593Smuzhiyun MX53_PAD_KEY_ROW2__GPIO4_11 0x0 739*4882a593Smuzhiyun MX53_PAD_KEY_COL3__GPIO4_12 0x0 740*4882a593Smuzhiyun >; 741*4882a593Smuzhiyun }; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun pinctrl_ecspi2: ecspi2grp { 744*4882a593Smuzhiyun fsl,pins = < 745*4882a593Smuzhiyun MX53_PAD_EIM_CS1__ECSPI2_MOSI 0x0 746*4882a593Smuzhiyun MX53_PAD_EIM_OE__ECSPI2_MISO 0x0 747*4882a593Smuzhiyun MX53_PAD_EIM_CS0__ECSPI2_SCLK 0x0 748*4882a593Smuzhiyun MX53_PAD_EIM_RW__GPIO2_26 0x0 749*4882a593Smuzhiyun >; 750*4882a593Smuzhiyun }; 751*4882a593Smuzhiyun 752*4882a593Smuzhiyun pinctrl_esdhc1: esdhc1grp { 753*4882a593Smuzhiyun fsl,pins = < 754*4882a593Smuzhiyun MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 755*4882a593Smuzhiyun MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 756*4882a593Smuzhiyun MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 757*4882a593Smuzhiyun MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 758*4882a593Smuzhiyun MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 759*4882a593Smuzhiyun MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 760*4882a593Smuzhiyun >; 761*4882a593Smuzhiyun }; 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun pinctrl_esdhc3: esdhc3grp { 764*4882a593Smuzhiyun fsl,pins = < 765*4882a593Smuzhiyun MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 766*4882a593Smuzhiyun MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 767*4882a593Smuzhiyun MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 768*4882a593Smuzhiyun MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 769*4882a593Smuzhiyun MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 770*4882a593Smuzhiyun MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 771*4882a593Smuzhiyun MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 772*4882a593Smuzhiyun MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 773*4882a593Smuzhiyun MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 774*4882a593Smuzhiyun MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 775*4882a593Smuzhiyun >; 776*4882a593Smuzhiyun }; 777*4882a593Smuzhiyun 778*4882a593Smuzhiyun pinctrl_fec: fecgrp { 779*4882a593Smuzhiyun fsl,pins = < 780*4882a593Smuzhiyun MX53_PAD_FEC_MDC__FEC_MDC 0x0 781*4882a593Smuzhiyun MX53_PAD_FEC_MDIO__FEC_MDIO 0x0 782*4882a593Smuzhiyun MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x0 783*4882a593Smuzhiyun MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x0 784*4882a593Smuzhiyun MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x0 785*4882a593Smuzhiyun MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x0 786*4882a593Smuzhiyun MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x0 787*4882a593Smuzhiyun MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x0 788*4882a593Smuzhiyun MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x0 789*4882a593Smuzhiyun MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x0 790*4882a593Smuzhiyun >; 791*4882a593Smuzhiyun }; 792*4882a593Smuzhiyun 793*4882a593Smuzhiyun pinctrl_hog_rev6: hoggrp { 794*4882a593Smuzhiyun fsl,pins = < 795*4882a593Smuzhiyun /* CKO2 */ 796*4882a593Smuzhiyun MX53_PAD_GPIO_3__CCM_CLKO2 0x4 797*4882a593Smuzhiyun /* DEFIB_SYNC_MARKER_IN_IRQ */ 798*4882a593Smuzhiyun MX53_PAD_GPIO_5__GPIO1_5 0x0 799*4882a593Smuzhiyun /* ACCELEROMETER_DATA_RDY_N */ 800*4882a593Smuzhiyun MX53_PAD_GPIO_6__GPIO1_6 0x0 801*4882a593Smuzhiyun /* TEMPERATURE_ALERT_N */ 802*4882a593Smuzhiyun MX53_PAD_GPIO_7__GPIO1_7 0x0 803*4882a593Smuzhiyun /* BAROMETRIC_PRESSURE_DATA_RDY_N */ 804*4882a593Smuzhiyun MX53_PAD_GPIO_8__GPIO1_8 0x0 805*4882a593Smuzhiyun /* DOCKING_I2C_INTERFACE_IRQ_N */ 806*4882a593Smuzhiyun MX53_PAD_PATA_DATA4__GPIO2_4 0x0 807*4882a593Smuzhiyun /* PWR_OUT_TO_DOCK_FAULT_N */ 808*4882a593Smuzhiyun MX53_PAD_PATA_DATA5__GPIO2_5 0x0 809*4882a593Smuzhiyun /* ENABLE_PWR_TO_DOCK_N */ 810*4882a593Smuzhiyun MX53_PAD_PATA_DATA6__GPIO2_6 0x0 811*4882a593Smuzhiyun /* HOST_CONTROLLED_RESET_TO_DOCKING_CONNECTOR_N */ 812*4882a593Smuzhiyun MX53_PAD_PATA_DATA7__GPIO2_7 0x0 813*4882a593Smuzhiyun /* REMOTE_ON_REQUEST_FROM_DOCKING_CONNECTOR_IS_ACTIVE_N */ 814*4882a593Smuzhiyun MX53_PAD_PATA_DATA12__GPIO2_12 0x0 815*4882a593Smuzhiyun /* DOCK_PRESENT_N */ 816*4882a593Smuzhiyun MX53_PAD_PATA_DATA13__GPIO2_13 0x0 817*4882a593Smuzhiyun /* ECG_MARKER_IN_FROM_DOCKING_CONNECTOR_IRQ */ 818*4882a593Smuzhiyun MX53_PAD_PATA_DATA14__GPIO2_14 0x0 819*4882a593Smuzhiyun /* ENABLE_ECG_MARKER_INTERFACE_TO_DOCKING_CONNECTOR */ 820*4882a593Smuzhiyun MX53_PAD_PATA_DATA15__GPIO2_15 0x0 821*4882a593Smuzhiyun /* RESET_IMX535_ETHERNET_PHY_N */ 822*4882a593Smuzhiyun MX53_PAD_EIM_A22__GPIO2_16 0x0 823*4882a593Smuzhiyun /* ENABLE_PWR_TO_LCD_AND_UI_INTERFACE */ 824*4882a593Smuzhiyun MX53_PAD_EIM_A21__GPIO2_17 0x0 825*4882a593Smuzhiyun /* RESET_I2C1_BUS_SEGMENT_MUX_N */ 826*4882a593Smuzhiyun MX53_PAD_EIM_A20__GPIO2_18 0x0 827*4882a593Smuzhiyun /* RESET_IMX535_USB_HOST3_PHY_N */ 828*4882a593Smuzhiyun MX53_PAD_EIM_A19__GPIO2_19 0x0 829*4882a593Smuzhiyun /* ESDHC3_EMMC_NAND_RST_N */ 830*4882a593Smuzhiyun MX53_PAD_EIM_A18__GPIO2_20 0x0 831*4882a593Smuzhiyun /* LCD_AND_UI_INTERFACE_PWR_FAULT_N */ 832*4882a593Smuzhiyun MX53_PAD_EIM_A17__GPIO2_21 0x0 833*4882a593Smuzhiyun /* POWER_DOWN_LVDS0_DESERIALIZER_N */ 834*4882a593Smuzhiyun MX53_PAD_EIM_A16__GPIO2_22 0x0 835*4882a593Smuzhiyun /* POWER_DOWN_LVDS1_DESERIALIZER_N */ 836*4882a593Smuzhiyun MX53_PAD_EIM_LBA__GPIO2_27 0x0 837*4882a593Smuzhiyun /* RESET_DP0_TRANSMITTER_N */ 838*4882a593Smuzhiyun MX53_PAD_EIM_EB0__GPIO2_28 0x0 839*4882a593Smuzhiyun /* RESET_DP1_TRANSMITTER_N */ 840*4882a593Smuzhiyun MX53_PAD_EIM_EB1__GPIO2_29 0x0 841*4882a593Smuzhiyun /* ENABLE_SPDIF_AUDIO_TO_DP0 */ 842*4882a593Smuzhiyun MX53_PAD_EIM_DA0__GPIO3_0 0x0 843*4882a593Smuzhiyun /* ENABLE_SPDIF_AUDIO_TO_DP1 */ 844*4882a593Smuzhiyun MX53_PAD_EIM_DA1__GPIO3_1 0x0 845*4882a593Smuzhiyun /* LVDS1_MUX_CTRL */ 846*4882a593Smuzhiyun MX53_PAD_EIM_DA2__GPIO3_2 0x0 847*4882a593Smuzhiyun /* LVDS0_MUX_CTRL */ 848*4882a593Smuzhiyun MX53_PAD_EIM_DA3__GPIO3_3 0x0 849*4882a593Smuzhiyun /* DP1_TRANSMITTER_IRQ */ 850*4882a593Smuzhiyun MX53_PAD_EIM_DA4__GPIO3_4 0x0 851*4882a593Smuzhiyun /* DP0_TRANSMITTER_IRQ */ 852*4882a593Smuzhiyun MX53_PAD_EIM_DA5__GPIO3_5 0x0 853*4882a593Smuzhiyun /* USB_RESET_N */ 854*4882a593Smuzhiyun MX53_PAD_EIM_DA6__GPIO3_6 0x0 855*4882a593Smuzhiyun /* ENABLE_BATTERY_CHARGER */ 856*4882a593Smuzhiyun MX53_PAD_EIM_DA7__GPIO3_7 0x0 857*4882a593Smuzhiyun /* SOFTWARE_CONTROLLED_PWR_CYCLE */ 858*4882a593Smuzhiyun MX53_PAD_EIM_DA8__GPIO3_8 0x0 859*4882a593Smuzhiyun /* SOFTWARE_CONTROLLED_POWERDOWN */ 860*4882a593Smuzhiyun MX53_PAD_EIM_DA9__GPIO3_9 0x0 861*4882a593Smuzhiyun /* DC_PWR_IN_OK */ 862*4882a593Smuzhiyun MX53_PAD_EIM_DA10__GPIO3_10 0x0 863*4882a593Smuzhiyun /* BATT_PRESENT_N */ 864*4882a593Smuzhiyun MX53_PAD_EIM_DA11__GPIO3_11 0xe4 865*4882a593Smuzhiyun /* PMIC_IRQ_N */ 866*4882a593Smuzhiyun MX53_PAD_EIM_DA12__GPIO3_12 0x0 867*4882a593Smuzhiyun /* PMIC_VDD_FAULT_STATUS_N */ 868*4882a593Smuzhiyun MX53_PAD_EIM_DA13__GPIO3_13 0x0 869*4882a593Smuzhiyun /* IMX535_ETHERNET_PHY_STATUS_IRQ_N */ 870*4882a593Smuzhiyun MX53_PAD_EIM_DA14__GPIO3_14 0x0 871*4882a593Smuzhiyun /* NOT USED - AVAILABLE 3.3V GPIO */ 872*4882a593Smuzhiyun MX53_PAD_EIM_DA15__GPIO3_15 0x0 873*4882a593Smuzhiyun /* NOT USED - AVAILABLE 3.3V GPIO */ 874*4882a593Smuzhiyun MX53_PAD_EIM_D22__GPIO3_22 0x0 875*4882a593Smuzhiyun /* NOT USED - AVAILABLE 3.3V GPIO */ 876*4882a593Smuzhiyun MX53_PAD_EIM_D24__GPIO3_24 0x0 877*4882a593Smuzhiyun /* NBP_PUMP_VALVE_PWR_ENABLE */ 878*4882a593Smuzhiyun MX53_PAD_EIM_D25__GPIO3_25 0x0 879*4882a593Smuzhiyun /* NIBP_RESET_N */ 880*4882a593Smuzhiyun MX53_PAD_EIM_D26__GPIO3_26 0x0 881*4882a593Smuzhiyun /* LATCHED_OVERPRESSURE_N */ 882*4882a593Smuzhiyun MX53_PAD_EIM_D27__GPIO3_27 0x0 883*4882a593Smuzhiyun /* NBP_SBWTCLK */ 884*4882a593Smuzhiyun MX53_PAD_EIM_D29__GPIO3_29 0x0 885*4882a593Smuzhiyun /* ENABLE_WIFI_MODULE */ 886*4882a593Smuzhiyun MX53_PAD_GPIO_11__GPIO4_1 0x400 887*4882a593Smuzhiyun /* WIFI_MODULE_IRQ_N */ 888*4882a593Smuzhiyun MX53_PAD_GPIO_12__GPIO4_2 0x400 889*4882a593Smuzhiyun /* ENABLE_BLUETOOTH_MODULE */ 890*4882a593Smuzhiyun MX53_PAD_GPIO_13__GPIO4_3 0x400 891*4882a593Smuzhiyun /* RESET_IMX535_USB_HOST2_PHY_N */ 892*4882a593Smuzhiyun MX53_PAD_GPIO_14__GPIO4_4 0x400 893*4882a593Smuzhiyun /* ONKEY_IS_DEPRESSED */ 894*4882a593Smuzhiyun MX53_PAD_KEY_ROW3__GPIO4_13 0x0 895*4882a593Smuzhiyun /* UNUSED_GPIO_TO_ALARM_LIGHT_BOARD */ 896*4882a593Smuzhiyun MX53_PAD_EIM_WAIT__GPIO5_0 0x0 897*4882a593Smuzhiyun /* DISPLAY_LOCK_BUTTON_IS_DEPRESSED_N */ 898*4882a593Smuzhiyun MX53_PAD_EIM_A25__GPIO5_2 0x0 899*4882a593Smuzhiyun /* I2C_PCAP_TOUCHSCREEN_IRQ_N */ 900*4882a593Smuzhiyun MX53_PAD_EIM_A24__GPIO5_4 0x0 901*4882a593Smuzhiyun /* NOT USED - AVAILABLE 1.8V GPIO */ 902*4882a593Smuzhiyun MX53_PAD_DISP0_DAT13__GPIO5_7 0x400 903*4882a593Smuzhiyun /* NOT USED - AVAILABLE 1.8V GPIO */ 904*4882a593Smuzhiyun MX53_PAD_DISP0_DAT14__GPIO5_8 0x400 905*4882a593Smuzhiyun /* NOT USED - AVAILABLE 1.8V GPIO */ 906*4882a593Smuzhiyun MX53_PAD_DISP0_DAT15__GPIO5_9 0x400 907*4882a593Smuzhiyun /* HOST_CONTROLLED_RESET_TO_LCD_N */ 908*4882a593Smuzhiyun MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x0 909*4882a593Smuzhiyun /* HOST_CONTROLLED_RESET_TO_PCAP_N */ 910*4882a593Smuzhiyun MX53_PAD_CSI0_MCLK__GPIO5_19 0x0 911*4882a593Smuzhiyun /* LR_SCAN_CTRL */ 912*4882a593Smuzhiyun MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x0 913*4882a593Smuzhiyun /* UD_SCAN_CTRL */ 914*4882a593Smuzhiyun MX53_PAD_CSI0_VSYNC__GPIO5_21 0x0 915*4882a593Smuzhiyun /* DATA_WIDTH_CTRL */ 916*4882a593Smuzhiyun MX53_PAD_CSI0_DAT10__GPIO5_28 0x0 917*4882a593Smuzhiyun /* BACKLIGHT_ENABLE */ 918*4882a593Smuzhiyun MX53_PAD_CSI0_DAT11__GPIO5_29 0x0 919*4882a593Smuzhiyun /* MED_USB_PORT_1_HOST_SELECT */ 920*4882a593Smuzhiyun MX53_PAD_EIM_A23__GPIO6_6 0x0 921*4882a593Smuzhiyun /* MED_USB_PORT_2_HOST_SELECT */ 922*4882a593Smuzhiyun MX53_PAD_NANDF_CLE__GPIO6_7 0x0 923*4882a593Smuzhiyun /* MED_USB_PORT_3_HOST_SELECT */ 924*4882a593Smuzhiyun MX53_PAD_NANDF_ALE__GPIO6_8 0x0 925*4882a593Smuzhiyun /* MED_USB_PORT_4_HOST_SELECT */ 926*4882a593Smuzhiyun MX53_PAD_NANDF_WP_B__GPIO6_9 0x0 927*4882a593Smuzhiyun /* MED_USB_PORT_5_HOST_SELECT */ 928*4882a593Smuzhiyun MX53_PAD_NANDF_RB0__GPIO6_10 0x0 929*4882a593Smuzhiyun /* MED_USB_PORT_6_HOST_SELECT */ 930*4882a593Smuzhiyun MX53_PAD_NANDF_CS0__GPIO6_11 0x0 931*4882a593Smuzhiyun /* MED_USB_PORT_7_HOST_SELECT */ 932*4882a593Smuzhiyun MX53_PAD_NANDF_WE_B__GPIO6_12 0x0 933*4882a593Smuzhiyun /* MED_USB_PORT_8_HOST_SELECT */ 934*4882a593Smuzhiyun MX53_PAD_NANDF_RE_B__GPIO6_13 0x0 935*4882a593Smuzhiyun /* MED_USB_PORT_TO_IMX_SELECT_0 */ 936*4882a593Smuzhiyun MX53_PAD_NANDF_CS1__GPIO6_14 0x0 937*4882a593Smuzhiyun /* MED_USB_PORT_TO_IMX_SELECT_1 */ 938*4882a593Smuzhiyun MX53_PAD_NANDF_CS2__GPIO6_15 0x0 939*4882a593Smuzhiyun /* MED_USB_PORT_TO_IMX_SELECT_2 */ 940*4882a593Smuzhiyun MX53_PAD_NANDF_CS3__GPIO6_16 0x0 941*4882a593Smuzhiyun /* POWER_AND_BOOT_STATUS_INDICATOR */ 942*4882a593Smuzhiyun MX53_PAD_PATA_INTRQ__GPIO7_2 0x1e4 943*4882a593Smuzhiyun /* RUNNING_ON_BATTERY_INDICATOR_GREEN */ 944*4882a593Smuzhiyun MX53_PAD_GPIO_16__GPIO7_11 0x0 945*4882a593Smuzhiyun /* BATTERY_STATUS_INDICATOR_AMBER */ 946*4882a593Smuzhiyun MX53_PAD_GPIO_17__GPIO7_12 0x0 947*4882a593Smuzhiyun >; 948*4882a593Smuzhiyun }; 949*4882a593Smuzhiyun 950*4882a593Smuzhiyun pinctrl_i2c1: i2c1grp { 951*4882a593Smuzhiyun fsl,pins = < 952*4882a593Smuzhiyun MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4 953*4882a593Smuzhiyun MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4 954*4882a593Smuzhiyun >; 955*4882a593Smuzhiyun }; 956*4882a593Smuzhiyun 957*4882a593Smuzhiyun pinctrl_i2c1_gpio: i2c1gpiogrp { 958*4882a593Smuzhiyun fsl,pins = < 959*4882a593Smuzhiyun MX53_PAD_EIM_D28__GPIO3_28 0x1e4 960*4882a593Smuzhiyun MX53_PAD_EIM_D21__GPIO3_21 0x1e4 961*4882a593Smuzhiyun >; 962*4882a593Smuzhiyun }; 963*4882a593Smuzhiyun 964*4882a593Smuzhiyun pinctrl_i2c2: i2c2grp { 965*4882a593Smuzhiyun fsl,pins = < 966*4882a593Smuzhiyun MX53_PAD_EIM_EB2__I2C2_SCL 0x400001e4 967*4882a593Smuzhiyun MX53_PAD_EIM_D16__I2C2_SDA 0x400001e4 968*4882a593Smuzhiyun >; 969*4882a593Smuzhiyun }; 970*4882a593Smuzhiyun 971*4882a593Smuzhiyun pinctrl_i2c2_gpio: i2c2gpiogrp { 972*4882a593Smuzhiyun fsl,pins = < 973*4882a593Smuzhiyun MX53_PAD_EIM_D16__GPIO3_16 0x1e4 974*4882a593Smuzhiyun MX53_PAD_EIM_EB2__GPIO2_30 0x1e4 975*4882a593Smuzhiyun >; 976*4882a593Smuzhiyun }; 977*4882a593Smuzhiyun 978*4882a593Smuzhiyun pinctrl_i2c3: i2c3grp { 979*4882a593Smuzhiyun fsl,pins = < 980*4882a593Smuzhiyun MX53_PAD_EIM_D17__I2C3_SCL 0x400001e4 981*4882a593Smuzhiyun MX53_PAD_EIM_D18__I2C3_SDA 0x400001e4 982*4882a593Smuzhiyun >; 983*4882a593Smuzhiyun }; 984*4882a593Smuzhiyun 985*4882a593Smuzhiyun pinctrl_i2c3_gpio: i2c3gpiogrp { 986*4882a593Smuzhiyun fsl,pins = < 987*4882a593Smuzhiyun MX53_PAD_EIM_D18__GPIO3_18 0x1e4 988*4882a593Smuzhiyun MX53_PAD_EIM_D17__GPIO3_17 0x1e4 989*4882a593Smuzhiyun >; 990*4882a593Smuzhiyun }; 991*4882a593Smuzhiyun 992*4882a593Smuzhiyun pinctrl_pwm1: pwm1grp { 993*4882a593Smuzhiyun fsl,pins = < 994*4882a593Smuzhiyun MX53_PAD_GPIO_9__PWM1_PWMO 0x5 995*4882a593Smuzhiyun >; 996*4882a593Smuzhiyun }; 997*4882a593Smuzhiyun 998*4882a593Smuzhiyun pinctrl_pwm2: pwm2grp { 999*4882a593Smuzhiyun fsl,pins = < 1000*4882a593Smuzhiyun MX53_PAD_DISP0_DAT9__PWM2_PWMO 0x5 1001*4882a593Smuzhiyun >; 1002*4882a593Smuzhiyun }; 1003*4882a593Smuzhiyun 1004*4882a593Smuzhiyun pinctrl_uart1: uart1grp { 1005*4882a593Smuzhiyun fsl,pins = < 1006*4882a593Smuzhiyun MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 1007*4882a593Smuzhiyun MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 1008*4882a593Smuzhiyun >; 1009*4882a593Smuzhiyun }; 1010*4882a593Smuzhiyun 1011*4882a593Smuzhiyun pinctrl_uart2: uart2grp { 1012*4882a593Smuzhiyun fsl,pins = < 1013*4882a593Smuzhiyun MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 1014*4882a593Smuzhiyun MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 1015*4882a593Smuzhiyun >; 1016*4882a593Smuzhiyun }; 1017*4882a593Smuzhiyun 1018*4882a593Smuzhiyun pinctrl_uart3: uart3grp { 1019*4882a593Smuzhiyun fsl,pins = < 1020*4882a593Smuzhiyun MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 1021*4882a593Smuzhiyun MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 1022*4882a593Smuzhiyun MX53_PAD_EIM_D23__UART3_CTS 0x1e4 1023*4882a593Smuzhiyun MX53_PAD_EIM_EB3__UART3_RTS 0x1e4 1024*4882a593Smuzhiyun >; 1025*4882a593Smuzhiyun }; 1026*4882a593Smuzhiyun 1027*4882a593Smuzhiyun pinctrl_uart4: uart4grp { 1028*4882a593Smuzhiyun fsl,pins = < 1029*4882a593Smuzhiyun MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4 1030*4882a593Smuzhiyun MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4 1031*4882a593Smuzhiyun >; 1032*4882a593Smuzhiyun }; 1033*4882a593Smuzhiyun 1034*4882a593Smuzhiyun pinctrl_uart5: uart5grp { 1035*4882a593Smuzhiyun fsl,pins = < 1036*4882a593Smuzhiyun MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1e4 1037*4882a593Smuzhiyun MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1e4 1038*4882a593Smuzhiyun >; 1039*4882a593Smuzhiyun }; 1040*4882a593Smuzhiyun 1041*4882a593Smuzhiyun pinctrl_usb_otg_vbus: usb-otg-vbusgrp { 1042*4882a593Smuzhiyun fsl,pins = < 1043*4882a593Smuzhiyun /* USB_HS_OTG_VBUS_ENABLE */ 1044*4882a593Smuzhiyun MX53_PAD_KEY_ROW4__GPIO4_15 0x1c4 1045*4882a593Smuzhiyun >; 1046*4882a593Smuzhiyun }; 1047*4882a593Smuzhiyun 1048*4882a593Smuzhiyun pinctrl_usbh2: usbh2grp { 1049*4882a593Smuzhiyun fsl,pins = < 1050*4882a593Smuzhiyun /* USB H2 */ 1051*4882a593Smuzhiyun MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0 0x180 1052*4882a593Smuzhiyun MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1 0x180 1053*4882a593Smuzhiyun MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2 0x180 1054*4882a593Smuzhiyun MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3 0x180 1055*4882a593Smuzhiyun MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4 0x180 1056*4882a593Smuzhiyun MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5 0x180 1057*4882a593Smuzhiyun MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6 0x180 1058*4882a593Smuzhiyun MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7 0x180 1059*4882a593Smuzhiyun MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP 0x180 1060*4882a593Smuzhiyun MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT 0x180 1061*4882a593Smuzhiyun MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK 0x180 1062*4882a593Smuzhiyun MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR 0x5 1063*4882a593Smuzhiyun MX53_PAD_EIM_D30__USBOH3_USBH2_OC 0x180 1064*4882a593Smuzhiyun >; 1065*4882a593Smuzhiyun }; 1066*4882a593Smuzhiyun 1067*4882a593Smuzhiyun pinctrl_usbh2_vbus: usbh2-vbusgrp { 1068*4882a593Smuzhiyun fsl,pins = < 1069*4882a593Smuzhiyun /* USB_HS_HOST2_VBUS_ENABLE */ 1070*4882a593Smuzhiyun MX53_PAD_EIM_D31__GPIO3_31 0x0 1071*4882a593Smuzhiyun >; 1072*4882a593Smuzhiyun }; 1073*4882a593Smuzhiyun 1074*4882a593Smuzhiyun pinctrl_usbh3_vbus: usbh3-vbusgrp { 1075*4882a593Smuzhiyun fsl,pins = < 1076*4882a593Smuzhiyun /* USB_HS_HOST3_VBUS_ENABLE */ 1077*4882a593Smuzhiyun MX53_PAD_CSI0_DAT9__GPIO5_27 0x0 1078*4882a593Smuzhiyun >; 1079*4882a593Smuzhiyun }; 1080*4882a593Smuzhiyun 1081*4882a593Smuzhiyun pinctrl_usbh3: usbh3grp { 1082*4882a593Smuzhiyun fsl,pins = < 1083*4882a593Smuzhiyun /* USB H3 */ 1084*4882a593Smuzhiyun MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0 0x180 1085*4882a593Smuzhiyun MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1 0x180 1086*4882a593Smuzhiyun MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2 0x180 1087*4882a593Smuzhiyun MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3 0x180 1088*4882a593Smuzhiyun MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4 0x180 1089*4882a593Smuzhiyun MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5 0x180 1090*4882a593Smuzhiyun MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6 0x180 1091*4882a593Smuzhiyun MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7 0x180 1092*4882a593Smuzhiyun MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR 0x5 1093*4882a593Smuzhiyun MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK 0x180 1094*4882a593Smuzhiyun MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT 0x180 1095*4882a593Smuzhiyun MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP 0x180 1096*4882a593Smuzhiyun MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC 0x180 1097*4882a593Smuzhiyun >; 1098*4882a593Smuzhiyun }; 1099*4882a593Smuzhiyun 1100*4882a593Smuzhiyun pinctrl_usb_otg: usbotggrp { 1101*4882a593Smuzhiyun fsl,pins = < 1102*4882a593Smuzhiyun /* USB_OTG_FAULT_N */ 1103*4882a593Smuzhiyun MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC 0x180 1104*4882a593Smuzhiyun >; 1105*4882a593Smuzhiyun }; 1106*4882a593Smuzhiyun 1107*4882a593Smuzhiyun pinctrl_alarmled_pins: qmx6alarmledgrp { 1108*4882a593Smuzhiyun fsl,pins = < 1109*4882a593Smuzhiyun /* ACTIVATE_ALARM_LIGHT_RED */ 1110*4882a593Smuzhiyun MX53_PAD_PATA_DIOR__GPIO7_3 0x0 1111*4882a593Smuzhiyun /* ACTIVATE_ALARM_LIGHT_YELLOW */ 1112*4882a593Smuzhiyun MX53_PAD_PATA_DA_1__GPIO7_7 0x0 1113*4882a593Smuzhiyun /* ACTIVATE_ALARM_LIGHT_CYAN */ 1114*4882a593Smuzhiyun MX53_PAD_PATA_DA_2__GPIO7_8 0x0 1115*4882a593Smuzhiyun /* AUDIO_ALARMS_SILENCED_INDICATOR */ 1116*4882a593Smuzhiyun MX53_PAD_GPIO_18__GPIO7_13 0x0 1117*4882a593Smuzhiyun >; 1118*4882a593Smuzhiyun }; 1119*4882a593Smuzhiyun}; 1120