Home
last modified time | relevance | path

Searched +full:sd +full:- +full:hs (Results 1 – 25 of 193) sorted by relevance

12345678

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
21 - ti,j721e-sdhci-4bit
[all …]
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
[all …]
H A Dmarvell,xenon-sdhci.txt11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
17 - clocks:
22 - clock-names:
27 - reg:
28 * For "marvell,armada-3700-sdhci", two register areas.
31 Please follow the examples with compatible "marvell,armada-3700-sdhci"
[all …]
H A Darasan,sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Adrian Hunter <adrian.hunter@intel.com>
13 - $ref: "mmc-controller.yaml#"
14 - if:
18 const: arasan,sdhci-5.1
21 - phys
22 - phy-names
23 - if:
[all …]
/OK3568_Linux_fs/kernel/drivers/media/i2c/
H A Dlt8619c.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Dingxian Wen <shawn.wen@rock-chips.com>
27 #include <linux/v4l2-dv-timings.h>
31 #include <linux/rk-camera-module.h>
32 #include <media/v4l2-dv-timings.h>
33 #include <media/v4l2-device.h>
34 #include <media/v4l2-ctrls.h>
35 #include <media/v4l2-event.h>
36 #include <media/v4l2-fwnode.h>
45 MODULE_PARM_DESC(debug, "debug level (0-2)");
[all …]
H A Dlt6911uxe.c1 // SPDX-License-Identifier: GPL-2.0
5 * lt6911uxe HDMI to MIPI CSI-2 bridge driver.
7 * Author: Jianwei Fan <jianwei.fan@rock-chips.com>
28 #include <linux/rk-camera-module.h>
31 #include <linux/v4l2-dv-timings.h>
36 #include <media/v4l2-controls_rockchip.h>
37 #include <media/v4l2-ctrls.h>
38 #include <media/v4l2-device.h>
39 #include <media/v4l2-dv-timings.h>
40 #include <media/v4l2-event.h>
[all …]
H A Dlt7911d.c1 // SPDX-License-Identifier: GPL-2.0
5 * lt7911d type-c/DP to MIPI CSI-2 bridge driver.
7 * Author: Jianwei Fan <jianwei.fan@rock-chips.com>
24 #include <linux/rk-camera-module.h>
27 #include <linux/v4l2-dv-timings.h>
32 #include <media/v4l2-controls_rockchip.h>
33 #include <media/v4l2-ctrls.h>
34 #include <media/v4l2-device.h>
35 #include <media/v4l2-dv-timings.h>
36 #include <media/v4l2-event.h>
[all …]
H A Dlt6911uxc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Dingxian Wen <shawn.wen@rock-chips.com>
20 #include <linux/rk-camera-module.h>
23 #include <linux/v4l2-dv-timings.h>
28 #include <media/v4l2-controls_rockchip.h>
29 #include <media/v4l2-ctrls.h>
30 #include <media/v4l2-device.h>
31 #include <media/v4l2-dv-timings.h>
32 #include <media/v4l2-event.h>
33 #include <media/v4l2-fwnode.h>
[all …]
H A Dtw9910.c1 // SPDX-License-Identifier: GPL-2.0
13 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
26 #include <linux/v4l2-mediabus.h>
30 #include <media/v4l2-subdev.h>
136 #define IFSEL_S 0x10 /* 01 : S-video decoding */
146 /* 1 : ITU-R-656 compatible data sequence format */
147 #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
148 /* 1 : 16-bit YCrCb 4:2:2 output format.*/
150 /* 0 : free-run output mode */
151 #define AINC 0x10 /* Serial interface auto-indexing control */
[all …]
H A Dmax96722.c1 // SPDX-License-Identifier: GPL-2.0
3 * max96722 GMSL2/GMSL1 to CSI-2 Deserializer driver
28 #include <linux/rk-camera-module.h>
30 #include <media/media-entity.h>
31 #include <media/v4l2-async.h>
32 #include <media/v4l2-ctrls.h>
33 #include <media/v4l2-subdev.h>
34 #include <media/v4l2-ctrls.h>
35 #include <media/v4l2-fwnode.h>
36 #include <media/v4l2-subdev.h>
[all …]
H A Dtvp514x.c1 // SPDX-License-Identifier: GPL-2.0-only
15 * Karicheri Muralidharan <m-karicheri2@ti.com>
24 #include <linux/v4l2-mediabus.h>
28 #include <media/v4l2-async.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-common.h>
31 #include <media/v4l2-mediabus.h>
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-ctrls.h>
35 #include <media/media-entity.h>
[all …]
/OK3568_Linux_fs/kernel/drivers/media/i2c/rk628/
H A Drk628_bt1120_v4l2.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Shunqing Chen <csq@rock-chips.com>
22 #include <linux/rk-camera-module.h>
25 #include <linux/v4l2-controls.h>
26 #include <linux/v4l2-dv-timings.h>
30 #include <media/v4l2-controls_rockchip.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-dv-timings.h>
34 #include <media/v4l2-event.h>
[all …]
H A Drk628_csi_v4l2.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Dingxian Wen <shawn.wen@rock-chips.com>
22 #include <linux/rk-camera-module.h>
25 #include <linux/v4l2-dv-timings.h>
29 #include <media/v4l2-controls_rockchip.h>
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-dv-timings.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Duniphier-pxs2.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/thermal/thermal.h>
12 compatible = "socionext,uniphier-pxs2";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
[all …]
H A Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
9 compatible = "socionext,uniphier-pro5";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 enable-method = "psci";
23 next-level-cache = <&l2>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/socionext/
H A Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-pxs3";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
[all …]
/OK3568_Linux_fs/u-boot/board/aristainetos/
H A Daristainetos.cfg3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
8 * SPDX-License-Identifier: GPL-2.0+
10 * Refer doc/README.imximage for more details about how-to configure
21 * spi, sd
27 #include "asm/arch/mx6-ddr.h"
31 #include "ddr-setup.cfg"
H A Daristainetos2.cfg3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
8 * SPDX-License-Identifier: GPL-2.0+
10 * Refer doc/README.imximage for more details about how-to configure
21 * spi, sd
27 #include "asm/arch/mx6-ddr.h"
31 #include "ddr-setup2.cfg"
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A D.rk3308-evb.dtb.dts.tmp
/OK3568_Linux_fs/u-boot/include/configs/
H A Dam335x_shc.h3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
8 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
10 * SPDX-License-Identifier: GPL-2.0+
37 * in case of SD Card or Network boot we want to have a possibility to
49 * ENV at MMC Boot0 Partition - 0/Undefined=user, 1=boot0, 2=boot1,
81 "fdtfile=am335x-shc.dtb\0" \
84 "rootpath=/srv/nfs/shc-rootfs\0" \
115 "env import -t $loadaddr $filesize\0" \
125 "bootm ${kloadaddr} - ${fdtaddr}; " \
137 "bootm ${loadaddr} - ${fdtaddr}; " \
[all …]
H A Dm28evk.h5 * SPDX-License-Identifier: GPL-2.0+
36 #define MTDIDS_DEFAULT "nand0=gpmi-nand"
38 "mtdparts=gpmi-nand:" \
39 "3m(u-boot)," \
44 "-@4096k(UBI)"
121 "rootpath=/opt/eldk-5.5/armv5te/rootfs-qte-sdk\0" \
124 "le:0,ri:256,up:0,lo:45,hs:1,vs:1,sync:100663296," \
126 "update_nand_full_filename=u-boot.nand\0" \
127 "update_nand_firmware_filename=u-boot.sb\0" \
128 "update_sd_firmware_filename=u-boot.sd\0" \
[all …]
/OK3568_Linux_fs/kernel/Documentation/arm/stm32/
H A Dstm32h743-overview.rst6 ------------
8 The STM32H743 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @400MHz
12 - 2MB internal flash, 1MBytes internal RAM
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C, SPI, CAN busses support
[all …]
H A Dstm32f746-overview.rst6 ------------
8 The STM32F746 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C, SPI, CAN busses support
[all …]
H A Dstm32f769-overview.rst6 ------------
8 The STM32F769 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support*2
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C*4, SPI*6, CAN*3 busses support
[all …]
/OK3568_Linux_fs/kernel/drivers/media/platform/exynos4-is/
H A Dmipi-csis.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung S5P/EXYNOS SoC series MIPI-CSI receiver driver
5 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
29 #include <media/drv-intf/exynos-fimc.h>
30 #include <media/v4l2-fwnode.h>
31 #include <media/v4l2-subdev.h>
33 #include "mipi-csis.h"
37 MODULE_PARM_DESC(debug, "Debug level (0-2)");
51 /* D-PHY control */
62 #define S5PCSIS_CFG_FMT_USER(x) ((0x30 + x - 1) << 2)
[all …]

12345678