1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
4 *
5 * lt6911uxe HDMI to MIPI CSI-2 bridge driver.
6 *
7 * Author: Jianwei Fan <jianwei.fan@rock-chips.com>
8 *
9 * V0.0X01.0X00 first version.
10 * V0.0X01.0X01 support DPHY 4K60.
11 * V0.0X01.0X02 support BGR888 format.
12 * V0.0X01.0X03 add more timing support.
13 * V0.0X01.0X04
14 * 1.fix some errors.
15 * 2.add dphy timing reg.
16 *
17 */
18 // #define DEBUG
19 #include <linux/clk.h>
20 #include <linux/delay.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/hdmi.h>
23 #include <linux/i2c.h>
24 #include <linux/interrupt.h>
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/of_graph.h>
28 #include <linux/rk-camera-module.h>
29 #include <linux/slab.h>
30 #include <linux/timer.h>
31 #include <linux/v4l2-dv-timings.h>
32 #include <linux/version.h>
33 #include <linux/videodev2.h>
34 #include <linux/workqueue.h>
35 #include <linux/compat.h>
36 #include <media/v4l2-controls_rockchip.h>
37 #include <media/v4l2-ctrls.h>
38 #include <media/v4l2-device.h>
39 #include <media/v4l2-dv-timings.h>
40 #include <media/v4l2-event.h>
41 #include <media/v4l2-fwnode.h>
42
43 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x04)
44
45 static int debug;
46 module_param(debug, int, 0644);
47 MODULE_PARM_DESC(debug, "debug level (0-3)");
48
49 #define I2C_MAX_XFER_SIZE 128
50 #define POLL_INTERVAL_MS 1000
51
52 #define LT6911UXE_LINK_FREQ_1250M 1250000000
53 #define LT6911UXE_LINK_FREQ_900M 900000000
54 #define LT6911UXE_LINK_FREQ_600M 600000000
55 #define LT6911UXE_LINK_FREQ_450M 450000000
56 #define LT6911UXE_LINK_FREQ_400M 400000000
57 #define LT6911UXE_LINK_FREQ_300M 300000000
58 #define LT6911UXE_LINK_FREQ_200M 200000000
59 #define LT6911UXE_LINK_FREQ_150M 150000000
60 #define LT6911UXE_LINK_FREQ_100M 100000000
61 #define LT6911UXE_PIXEL_RATE 800000000
62
63 #define LT6911UXE_CHIPID 0x0221
64 #define CHIPID_REGH 0xe101
65 #define CHIPID_REGL 0xe100
66 #define I2C_EN_REG 0xe0ee
67 #define I2C_ENABLE 0x1
68 #define I2C_DISABLE 0x0
69
70 #define HTOTAL_H 0xe088
71 #define HTOTAL_L 0xe089
72 #define HACT_H 0xe08c
73 #define HACT_L 0xe08d
74
75 #define VTOTAL_H 0xe08a
76 #define VTOTAL_L 0xe08b
77 #define VACT_H 0xe08e
78 #define VACT_L 0xe08f
79
80 #define HS_HALF 0xe080
81 #define HFP_HALF_H 0xe081
82 #define HFP_HALF_L 0xe082
83
84 #define VS 0xe083
85 #define VFP_H 0xe097
86 #define VFP_L 0xe098
87
88 #define PCLK_H 0xe085
89 #define PCLK_M 0xe086
90 #define PCLK_L 0xe087
91
92 #define BYTE_PCLK_H 0xe092
93 #define BYTE_PCLK_M 0xe093
94 #define BYTE_PCLK_L 0xe094
95
96 #define AUDIO_FS_VALUE_H 0xe090
97 #define AUDIO_FS_VALUE_L 0xe091
98
99 #define LNAE_NUM 0xe095
100 #define BUS_FMT 0xe096
101
102 #define STREAM_CTL 0xe0b0
103 #define ENABLE_STREAM 0x01
104 #define DISABLE_STREAM 0x00
105
106 //mipi phy timing
107 #define CLK_ZERO_REG 0xeaa7
108 #define CLK_PRE_REG 0xeaa8
109 #define CLK_POST_REG 0xeaa9
110 #define HS_LPX_REG 0xeaa4
111 #define HS_PREPARE_REG 0xeaa5
112 #define HS_TRAIL 0xeaa6
113 #define HS_RQST_PRE_REG 0xea8a
114
115 //bit[2:0] mipi hs delay
116 #define MIPI_TX_PT0_TX0_DLY 0xe23a
117 #define MIPI_TX_PT0_TX1_DLY 0xe23b
118 #define MIPI_TX_PT0_TXC_DLY 0xe23c
119 #define MIPI_TX_PT0_TX2_DLY 0xe23d
120 #define MIPI_TX_PT0_TX3_DLY 0xe23e
121
122 #define MIPI_TX_PT1_TX0_DLY 0xe24a
123 #define MIPI_TX_PT1_TX1_DLY 0xe24b
124 #define MIPI_TX_PT1_TXC_DLY 0xe24c
125 #define MIPI_TX_PT1_TX2_DLY 0xe24d
126 #define MIPI_TX_PT1_TX3_DLY 0xe24e
127
128 #define MIPI_TIMING_MASK 0x7
129 //LP driver level
130 #define MIPI_TX_PT0_LPTX 0xe234
131 #define MIPI_TX_PT1_LPTX 0xe244
132
133 // #define LT6911UXE_OUT_RGB
134 #ifdef LT6911UXE_OUT_RGB
135 #define LT6911UXE_MEDIA_BUS_FMT MEDIA_BUS_FMT_BGR888_1X24
136 #else
137 #define LT6911UXE_MEDIA_BUS_FMT MEDIA_BUS_FMT_UYVY8_2X8
138 #endif
139
140 #define LT6911UXE_NAME "LT6911UXE"
141
142 #ifdef LT6911UXE_OUT_RGB
143 static const s64 link_freq_menu_items[] = {
144 LT6911UXE_LINK_FREQ_1250M,
145 LT6911UXE_LINK_FREQ_900M,
146 LT6911UXE_LINK_FREQ_600M,
147 LT6911UXE_LINK_FREQ_450M,
148 LT6911UXE_LINK_FREQ_300M,
149 LT6911UXE_LINK_FREQ_150M,
150 };
151 #else
152 static const s64 link_freq_menu_items[] = {
153 LT6911UXE_LINK_FREQ_1250M,
154 LT6911UXE_LINK_FREQ_600M,
155 LT6911UXE_LINK_FREQ_400M,
156 LT6911UXE_LINK_FREQ_300M,
157 LT6911UXE_LINK_FREQ_200M,
158 LT6911UXE_LINK_FREQ_100M,
159 };
160 #endif
161
162 struct lt6911uxe {
163 struct v4l2_fwnode_bus_mipi_csi2 bus;
164 struct v4l2_subdev sd;
165 struct media_pad pad;
166 struct v4l2_ctrl_handler hdl;
167 struct i2c_client *i2c_client;
168 struct mutex confctl_mutex;
169 struct v4l2_ctrl *detect_tx_5v_ctrl;
170 struct v4l2_ctrl *audio_sampling_rate_ctrl;
171 struct v4l2_ctrl *audio_present_ctrl;
172 struct v4l2_ctrl *link_freq;
173 struct v4l2_ctrl *pixel_rate;
174 struct delayed_work delayed_work_hotplug;
175 struct delayed_work delayed_work_res_change;
176 struct v4l2_dv_timings timings;
177 struct clk *xvclk;
178 struct gpio_desc *reset_gpio;
179 struct gpio_desc *plugin_det_gpio;
180 struct gpio_desc *power_gpio;
181 struct work_struct work_i2c_poll;
182 struct timer_list timer;
183 const char *module_facing;
184 const char *module_name;
185 const char *len_name;
186 const struct lt6911uxe_mode *cur_mode;
187 const struct lt6911uxe_mode *support_modes;
188 u32 cfg_num;
189 struct v4l2_fwnode_endpoint bus_cfg;
190 bool nosignal;
191 bool enable_hdcp;
192 bool is_audio_present;
193 bool power_on;
194 int plugin_irq;
195 u32 mbus_fmt_code;
196 u32 module_index;
197 u32 audio_sampling_rate;
198 int lane_in_use;
199 };
200
201 static const struct v4l2_dv_timings_cap lt6911uxe_timings_cap = {
202 .type = V4L2_DV_BT_656_1120,
203 .reserved = { 0 },
204 V4L2_INIT_BT_TIMINGS(1, 10000, 1, 10000, 0, 800000000,
205 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
206 V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
207 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_INTERLACED |
208 V4L2_DV_BT_CAP_REDUCED_BLANKING |
209 V4L2_DV_BT_CAP_CUSTOM)
210 };
211
212 struct lt6911uxe_mode {
213 u32 width;
214 u32 height;
215 struct v4l2_fract max_fps;
216 u32 hts_def;
217 u32 vts_def;
218 u32 exp_def;
219 u32 mipi_freq_idx;
220 u32 interlace;
221 };
222
223 static struct rkmodule_csi_dphy_param rk3588_dcphy_param = {
224 .vendor = PHY_VENDOR_SAMSUNG,
225 .lp_vol_ref = 3,
226 .lp_hys_sw = {3, 0, 3, 0},
227 .lp_escclk_pol_sel = {1, 1, 0, 0},
228 .skew_data_cal_clk = {0, 13, 0, 13},
229 .clk_hs_term_sel = 2,
230 .data_hs_term_sel = {2, 2, 2, 2},
231 .reserved = {0},
232 };
233
234 static const struct lt6911uxe_mode supported_modes_dphy[] = {
235 {
236 .width = 5120,
237 .height = 2160,
238 .max_fps = {
239 .numerator = 10000,
240 .denominator = 480000,
241 },
242 .hts_def = 5500,
243 .vts_def = 2250,
244 .mipi_freq_idx = 0,
245 .interlace = 0,
246 }, {
247 .width = 4096,
248 .height = 2160,
249 .max_fps = {
250 .numerator = 10000,
251 .denominator = 600000,
252 },
253 .hts_def = 4400,
254 .vts_def = 2250,
255 .mipi_freq_idx = 0,
256 .interlace = 0,
257 }, {
258 .width = 4096,
259 .height = 2160,
260 .max_fps = {
261 .numerator = 10000,
262 .denominator = 300000,
263 },
264 .hts_def = 4400,
265 .vts_def = 2250,
266 .mipi_freq_idx = 1,
267 .interlace = 0,
268 }, {
269 .width = 3840,
270 .height = 2160,
271 .max_fps = {
272 .numerator = 10000,
273 .denominator = 600000,
274 },
275 .hts_def = 4400,
276 .vts_def = 2250,
277 .mipi_freq_idx = 0,
278 .interlace = 0,
279 }, {
280 .width = 3840,
281 .height = 2160,
282 .max_fps = {
283 .numerator = 10000,
284 .denominator = 300000,
285 },
286 .hts_def = 4400,
287 .vts_def = 2250,
288 .mipi_freq_idx = 1,
289 .interlace = 0,
290 }, {
291 .width = 1920,
292 .height = 1080,
293 .max_fps = {
294 .numerator = 10000,
295 .denominator = 600000,
296 },
297 .hts_def = 2200,
298 .vts_def = 1125,
299 .mipi_freq_idx = 3,
300 .interlace = 0,
301 }, {
302 .width = 1920,
303 .height = 1200,
304 .max_fps = {
305 .numerator = 10000,
306 .denominator = 600000,
307 },
308 .hts_def = 2592,
309 .vts_def = 1245,
310 .mipi_freq_idx = 3,
311 .interlace = 0,
312 }, {
313 .width = 1920,
314 .height = 1080,
315 .max_fps = {
316 .numerator = 10000,
317 .denominator = 300000,
318 },
319 .hts_def = 2200,
320 .vts_def = 1125,
321 .mipi_freq_idx = 4,
322 .interlace = 0,
323 }, {
324 .width = 1920,
325 .height = 1080,
326 .max_fps = {
327 .numerator = 10000,
328 .denominator = 600000,
329 },
330 .hts_def = 2200,
331 .vts_def = 1125,
332 .mipi_freq_idx = 4,
333 .interlace = 1,
334 }, {
335 .width = 1680,
336 .height = 1050,
337 .max_fps = {
338 .numerator = 10000,
339 .denominator = 600000,
340 },
341 .hts_def = 2240,
342 .vts_def = 1089,
343 .mipi_freq_idx = 3,
344 .interlace = 0,
345 }, {
346 .width = 1600,
347 .height = 1200,
348 .max_fps = {
349 .numerator = 10000,
350 .denominator = 600000,
351 },
352 .hts_def = 2160,
353 .vts_def = 1250,
354 .mipi_freq_idx = 3,
355 .interlace = 0,
356 }, {
357 .width = 1600,
358 .height = 900,
359 .max_fps = {
360 .numerator = 10000,
361 .denominator = 600000,
362 },
363 .hts_def = 1800,
364 .vts_def = 1000,
365 .mipi_freq_idx = 3,
366 .interlace = 0,
367 }, {
368 .width = 1440,
369 .height = 900,
370 .max_fps = {
371 .numerator = 10000,
372 .denominator = 600000,
373 },
374 .hts_def = 1904,
375 .vts_def = 934,
376 .mipi_freq_idx = 3,
377 .interlace = 0,
378 }, {
379 .width = 1440,
380 .height = 240,
381 .max_fps = {
382 .numerator = 10000,
383 .denominator = 600000,
384 },
385 .hts_def = 1716,
386 .vts_def = 262,
387 .mipi_freq_idx = 5,
388 .interlace = 0,
389 }, {
390 .width = 1360,
391 .height = 768,
392 .max_fps = {
393 .numerator = 10000,
394 .denominator = 600000,
395 },
396 .hts_def = 1792,
397 .vts_def = 795,
398 .mipi_freq_idx = 4,
399 .interlace = 0,
400 }, {
401 .width = 1280,
402 .height = 1024,
403 .max_fps = {
404 .numerator = 10000,
405 .denominator = 600000,
406 },
407 .hts_def = 1688,
408 .vts_def = 1066,
409 .mipi_freq_idx = 3,
410 .interlace = 0,
411 }, {
412 .width = 1280,
413 .height = 960,
414 .max_fps = {
415 .numerator = 10000,
416 .denominator = 600000,
417 },
418 .hts_def = 1712,
419 .vts_def = 994,
420 .mipi_freq_idx = 3,
421 .interlace = 0,
422 }, {
423 .width = 1280,
424 .height = 800,
425 .max_fps = {
426 .numerator = 10000,
427 .denominator = 600000,
428 },
429 .hts_def = 1680,
430 .vts_def = 828,
431 .mipi_freq_idx = 4,
432 .interlace = 0,
433 }, {
434 .width = 1280,
435 .height = 768,
436 .max_fps = {
437 .numerator = 10000,
438 .denominator = 600000,
439 },
440 .hts_def = 1664,
441 .vts_def = 798,
442 .mipi_freq_idx = 4,
443 .interlace = 0,
444 }, {
445 .width = 1280,
446 .height = 720,
447 .max_fps = {
448 .numerator = 10000,
449 .denominator = 600000,
450 },
451 .hts_def = 1650,
452 .vts_def = 750,
453 .mipi_freq_idx = 4,
454 .interlace = 0,
455 }, {
456 .width = 1152,
457 .height = 864,
458 .max_fps = {
459 .numerator = 10000,
460 .denominator = 750000,
461 },
462 .hts_def = 1600,
463 .vts_def = 900,
464 .mipi_freq_idx = 4,
465 .interlace = 0,
466 }, {
467 .width = 1024,
468 .height = 768,
469 .max_fps = {
470 .numerator = 10000,
471 .denominator = 600000,
472 },
473 .hts_def = 1344,
474 .vts_def = 806,
475 .mipi_freq_idx = 4,
476 .interlace = 0,
477 }, {
478 .width = 800,
479 .height = 600,
480 .max_fps = {
481 .numerator = 10000,
482 .denominator = 600000,
483 },
484 .hts_def = 1056,
485 .vts_def = 628,
486 .mipi_freq_idx = 5,
487 .interlace = 0,
488 }, {
489 .width = 720,
490 .height = 576,
491 .max_fps = {
492 .numerator = 10000,
493 .denominator = 500000,
494 },
495 .hts_def = 864,
496 .vts_def = 625,
497 .mipi_freq_idx = 5,
498 .interlace = 0,
499 }, {
500 .width = 720,
501 .height = 480,
502 .max_fps = {
503 .numerator = 10000,
504 .denominator = 600000,
505 },
506 .hts_def = 858,
507 .vts_def = 525,
508 .mipi_freq_idx = 5,
509 .interlace = 0,
510 }, {
511 .width = 720,
512 .height = 400,
513 .max_fps = {
514 .numerator = 10000,
515 .denominator = 850000,
516 },
517 .hts_def = 936,
518 .vts_def = 446,
519 .mipi_freq_idx = 5,
520 .interlace = 0,
521 }, {
522 .width = 720,
523 .height = 240,
524 .max_fps = {
525 .numerator = 10000,
526 .denominator = 600000,
527 },
528 .mipi_freq_idx = 5,
529 .interlace = 0,
530 }, {
531 .width = 640,
532 .height = 480,
533 .max_fps = {
534 .numerator = 10000,
535 .denominator = 600000,
536 },
537 .hts_def = 800,
538 .vts_def = 525,
539 .mipi_freq_idx = 5,
540 .interlace = 0,
541 },
542 };
543
544 static void lt6911uxe_format_change(struct v4l2_subdev *sd);
545 static int lt6911uxe_s_ctrl_detect_tx_5v(struct v4l2_subdev *sd);
546 static int lt6911uxe_s_dv_timings(struct v4l2_subdev *sd,
547 struct v4l2_dv_timings *timings);
548
to_lt6911uxe(struct v4l2_subdev * sd)549 static inline struct lt6911uxe *to_lt6911uxe(struct v4l2_subdev *sd)
550 {
551 return container_of(sd, struct lt6911uxe, sd);
552 }
553
i2c_rd(struct v4l2_subdev * sd,u16 reg,u8 * values,u32 n)554 static void i2c_rd(struct v4l2_subdev *sd, u16 reg, u8 *values, u32 n)
555 {
556 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
557 struct i2c_client *client = lt6911uxe->i2c_client;
558 int err;
559 u8 buf[2] = { 0xFF, reg >> 8};
560 u8 reg_addr = reg & 0xFF;
561 struct i2c_msg msgs[3];
562
563 msgs[0].addr = client->addr;
564 msgs[0].flags = 0;
565 msgs[0].len = 2;
566 msgs[0].buf = buf;
567
568 msgs[1].addr = client->addr;
569 msgs[1].flags = 0;
570 msgs[1].len = 1;
571 msgs[1].buf = ®_addr;
572
573 msgs[2].addr = client->addr;
574 msgs[2].flags = I2C_M_RD;
575 msgs[2].len = n;
576 msgs[2].buf = values;
577
578 err = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
579 if (err != ARRAY_SIZE(msgs)) {
580 v4l2_err(sd, "%s: reading register 0x%x from 0x%x failed\n",
581 __func__, reg, client->addr);
582 }
583
584 if (!debug)
585 return;
586
587 switch (n) {
588 case 1:
589 v4l2_info(sd, "I2C read 0x%04x = 0x%02x\n",
590 reg, values[0]);
591 break;
592 case 2:
593 v4l2_info(sd, "I2C read 0x%04x = 0x%02x%02x\n",
594 reg, values[1], values[0]);
595 break;
596 case 4:
597 v4l2_info(sd, "I2C read 0x%04x = 0x%02x%02x%02x%02x\n",
598 reg, values[3], values[2], values[1], values[0]);
599 break;
600 default:
601 v4l2_info(sd, "I2C read %d bytes from address 0x%04x\n",
602 n, reg);
603 }
604 }
605
i2c_wr(struct v4l2_subdev * sd,u16 reg,u8 * values,u32 n)606 static void i2c_wr(struct v4l2_subdev *sd, u16 reg, u8 *values, u32 n)
607 {
608 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
609 struct i2c_client *client = lt6911uxe->i2c_client;
610 int err, i;
611 struct i2c_msg msgs[2];
612 u8 data[I2C_MAX_XFER_SIZE];
613 u8 buf[2] = { 0xFF, reg >> 8};
614
615 if ((1 + n) > I2C_MAX_XFER_SIZE) {
616 n = I2C_MAX_XFER_SIZE - 1;
617 v4l2_warn(sd, "i2c wr reg=%04x: len=%d is too big!\n",
618 reg, 1 + n);
619 }
620
621 msgs[0].addr = client->addr;
622 msgs[0].flags = 0;
623 msgs[0].len = 2;
624 msgs[0].buf = buf;
625
626 msgs[1].addr = client->addr;
627 msgs[1].flags = 0;
628 msgs[1].len = 1 + n;
629 msgs[1].buf = data;
630
631 data[0] = reg & 0xff;
632 for (i = 0; i < n; i++)
633 data[1 + i] = values[i];
634
635 err = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
636 if (err < 0) {
637 v4l2_err(sd, "%s: writing register 0x%x from 0x%x failed\n",
638 __func__, reg, client->addr);
639 return;
640 }
641
642 if (!debug)
643 return;
644
645 switch (n) {
646 case 1:
647 v4l2_info(sd, "I2C write 0x%04x = 0x%02x\n",
648 reg, data[1]);
649 break;
650 case 2:
651 v4l2_info(sd, "I2C write 0x%04x = 0x%02x%02x\n",
652 reg, data[2], data[1]);
653 break;
654 case 4:
655 v4l2_info(sd, "I2C write 0x%04x = 0x%02x%02x%02x%02x\n",
656 reg, data[4], data[3], data[2], data[1]);
657 break;
658 default:
659 v4l2_info(sd, "I2C write %d bytes from address 0x%04x\n",
660 n, reg);
661 }
662 }
663
i2c_rd8(struct v4l2_subdev * sd,u16 reg)664 static u8 i2c_rd8(struct v4l2_subdev *sd, u16 reg)
665 {
666 u32 val;
667
668 i2c_rd(sd, reg, (u8 __force *)&val, 1);
669 return val;
670 }
671
i2c_wr8(struct v4l2_subdev * sd,u16 reg,u8 val)672 static void i2c_wr8(struct v4l2_subdev *sd, u16 reg, u8 val)
673 {
674 i2c_wr(sd, reg, &val, 1);
675 }
676
i2c_wr8_and_or(struct v4l2_subdev * sd,u16 reg,u32 mask,u8 val)677 static __maybe_unused void i2c_wr8_and_or(struct v4l2_subdev *sd, u16 reg, u32 mask,
678 u8 val)
679 {
680 u8 val_p;
681
682 val_p = i2c_rd8(sd, reg);
683 i2c_wr8(sd, reg, (val_p & mask) | val);
684 }
685
lt6911uxe_i2c_enable(struct v4l2_subdev * sd)686 static void lt6911uxe_i2c_enable(struct v4l2_subdev *sd)
687 {
688 i2c_wr8(sd, I2C_EN_REG, I2C_ENABLE);
689 }
690
lt6911uxe_i2c_disable(struct v4l2_subdev * sd)691 static void lt6911uxe_i2c_disable(struct v4l2_subdev *sd)
692 {
693 i2c_wr8(sd, I2C_EN_REG, I2C_DISABLE);
694 }
695
tx_5v_power_present(struct v4l2_subdev * sd)696 static inline bool tx_5v_power_present(struct v4l2_subdev *sd)
697 {
698 bool ret;
699 int val, i, cnt;
700 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
701
702 /* if not use plugin det gpio */
703 if (!lt6911uxe->plugin_det_gpio)
704 return true;
705
706 cnt = 0;
707 for (i = 0; i < 5; i++) {
708 val = gpiod_get_value(lt6911uxe->plugin_det_gpio);
709 if (val > 0)
710 cnt++;
711 usleep_range(500, 600);
712 }
713
714 ret = (cnt >= 4) ? true : false;
715 v4l2_dbg(1, debug, sd, "%s: %d\n", __func__, ret);
716
717 return ret;
718 }
719
no_signal(struct v4l2_subdev * sd)720 static inline bool no_signal(struct v4l2_subdev *sd)
721 {
722 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
723
724 v4l2_dbg(1, debug, sd, "%s no signal:%d\n", __func__,
725 lt6911uxe->nosignal);
726
727 return lt6911uxe->nosignal;
728 }
729
audio_present(struct v4l2_subdev * sd)730 static inline bool audio_present(struct v4l2_subdev *sd)
731 {
732 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
733
734 return lt6911uxe->is_audio_present;
735 }
736
get_audio_sampling_rate(struct v4l2_subdev * sd)737 static int get_audio_sampling_rate(struct v4l2_subdev *sd)
738 {
739 static const int code_to_rate[] = {
740 44100, 0, 48000, 32000, 22050, 384000, 24000, 352800,
741 88200, 768000, 96000, 705600, 176400, 0, 192000, 0
742 };
743
744 if (no_signal(sd))
745 return 0;
746
747 return code_to_rate[2];
748 }
749
fps_calc(const struct v4l2_bt_timings * t)750 static inline unsigned int fps_calc(const struct v4l2_bt_timings *t)
751 {
752 if (!V4L2_DV_BT_FRAME_HEIGHT(t) || !V4L2_DV_BT_FRAME_WIDTH(t))
753 return 0;
754
755 return DIV_ROUND_CLOSEST((unsigned int)t->pixelclock,
756 V4L2_DV_BT_FRAME_HEIGHT(t) * V4L2_DV_BT_FRAME_WIDTH(t));
757 }
758
lt6911uxe_rcv_supported_res(struct v4l2_subdev * sd,u32 width,u32 height)759 static bool lt6911uxe_rcv_supported_res(struct v4l2_subdev *sd, u32 width,
760 u32 height)
761 {
762 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
763 u32 i;
764
765 for (i = 0; i < lt6911uxe->cfg_num; i++) {
766 if ((lt6911uxe->support_modes[i].width == width) &&
767 (lt6911uxe->support_modes[i].height == height)) {
768 break;
769 }
770 }
771
772 if (i == lt6911uxe->cfg_num) {
773 v4l2_err(sd, "%s do not support res wxh: %dx%d\n", __func__,
774 width, height);
775 return false;
776 } else {
777 return true;
778 }
779 }
780
lt6911uxe_get_detected_timings(struct v4l2_subdev * sd,struct v4l2_dv_timings * timings)781 static int lt6911uxe_get_detected_timings(struct v4l2_subdev *sd,
782 struct v4l2_dv_timings *timings)
783 {
784 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
785 struct v4l2_bt_timings *bt = &timings->bt;
786 u32 hact, vact, htotal, vtotal, hs, vs, hbp, vbp, hfp, vfp;
787 u32 pixel_clock, fps, halt_pix_clk;
788 u8 clk_h, clk_m, clk_l;
789 u8 val_h, val_l;
790 u32 byte_clk, mipi_clk, mipi_data_rate;
791
792 memset(timings, 0, sizeof(struct v4l2_dv_timings));
793 lt6911uxe_i2c_enable(sd);
794
795 clk_h = i2c_rd8(sd, PCLK_H);
796 clk_m = i2c_rd8(sd, PCLK_M);
797 clk_l = i2c_rd8(sd, PCLK_L);
798 halt_pix_clk = ((clk_h << 16) | (clk_m << 8) | clk_l);
799 pixel_clock = halt_pix_clk * 1000 * 2;
800
801 clk_h = i2c_rd8(sd, BYTE_PCLK_H);
802 clk_m = i2c_rd8(sd, BYTE_PCLK_M);
803 clk_l = i2c_rd8(sd, BYTE_PCLK_L);
804 byte_clk = ((clk_h << 16) | (clk_m << 8) | clk_l) * 1000;
805 mipi_clk = byte_clk * 4;
806 mipi_data_rate = byte_clk * 8;
807
808 val_h = i2c_rd8(sd, HTOTAL_H);
809 val_l = i2c_rd8(sd, HTOTAL_L);
810 htotal = ((val_h << 8) | val_l) * 2;
811
812 val_h = i2c_rd8(sd, VTOTAL_H);
813 val_l = i2c_rd8(sd, VTOTAL_L);
814 vtotal = (val_h << 8) | val_l;
815
816 val_h = i2c_rd8(sd, HACT_H);
817 val_l = i2c_rd8(sd, HACT_L);
818 hact = ((val_h << 8) | val_l) * 2;
819
820 val_h = i2c_rd8(sd, VACT_H);
821 val_l = i2c_rd8(sd, VACT_L);
822 vact = (val_h << 8) | val_l;
823
824 hs = i2c_rd8(sd, HS_HALF) * 2;
825
826 val_h = i2c_rd8(sd, HFP_HALF_H);
827 val_l = i2c_rd8(sd, HFP_HALF_L);
828 hfp = ((val_h << 8) | val_l) * 2;
829
830 hbp = htotal - hact - hs - hfp;
831
832 vs = i2c_rd8(sd, VS);
833 val_h = i2c_rd8(sd, VFP_H);
834 val_l = i2c_rd8(sd, VFP_L);
835 vfp = (val_h << 8) | val_l;
836
837 vbp = vtotal - vact - vs - vfp;
838 lt6911uxe_i2c_disable(sd);
839
840 lt6911uxe->nosignal = false;
841 lt6911uxe->is_audio_present = true;
842 timings->type = V4L2_DV_BT_656_1120;
843 bt->interlaced = V4L2_DV_PROGRESSIVE;
844 bt->width = hact;
845 bt->height = vact;
846 bt->vsync = vs;
847 bt->hsync = hs;
848 bt->hfrontporch = hfp;
849 bt->vfrontporch = vfp;
850 bt->hbackporch = hbp;
851 bt->vbackporch = vbp;
852 bt->pixelclock = pixel_clock;
853 fps = pixel_clock / (htotal * vtotal);
854
855 /* for interlaced res 1080i 576i 480i*/
856 if ((hact == 1920 && vact == 540) || (hact == 1440 && vact == 288)
857 || (hact == 1440 && vact == 240)) {
858 bt->interlaced = V4L2_DV_INTERLACED;
859 bt->height *= 2;
860 bt->il_vsync = bt->vsync + 1;
861 } else {
862 bt->interlaced = V4L2_DV_PROGRESSIVE;
863 }
864
865 if (!lt6911uxe_rcv_supported_res(sd, hact, bt->height)) {
866 lt6911uxe->nosignal = true;
867 v4l2_err(sd, "%s: rcv err res, return no signal!\n", __func__);
868 return -EINVAL;
869 }
870
871 v4l2_info(sd, "act:%dx%d, total:%dx%d, pixclk:%d, fps:%d\n",
872 hact, vact, htotal, vtotal, pixel_clock, fps);
873 v4l2_info(sd, "byte_clk:%u, mipi_clk:%u, mipi_data_rate:%u\n",
874 byte_clk, mipi_clk, mipi_data_rate);
875 v4l2_info(sd, "hfp:%d, hs:%d, hbp:%d, vfp:%d, vs:%d, vbp:%d, inerlaced:%d\n",
876 bt->hfrontporch, bt->hsync, bt->hbackporch, bt->vfrontporch,
877 bt->vsync, bt->vbackporch, bt->interlaced);
878
879 return 0;
880 }
881
lt6911uxe_delayed_work_hotplug(struct work_struct * work)882 static void lt6911uxe_delayed_work_hotplug(struct work_struct *work)
883 {
884 struct delayed_work *dwork = to_delayed_work(work);
885 struct lt6911uxe *lt6911uxe = container_of(dwork,
886 struct lt6911uxe, delayed_work_hotplug);
887 struct v4l2_subdev *sd = <6911uxe->sd;
888
889 lt6911uxe_s_ctrl_detect_tx_5v(sd);
890 }
891
lt6911uxe_delayed_work_res_change(struct work_struct * work)892 static void lt6911uxe_delayed_work_res_change(struct work_struct *work)
893 {
894 struct delayed_work *dwork = to_delayed_work(work);
895 struct lt6911uxe *lt6911uxe = container_of(dwork,
896 struct lt6911uxe, delayed_work_res_change);
897 struct v4l2_subdev *sd = <6911uxe->sd;
898
899 lt6911uxe_format_change(sd);
900 }
901
lt6911uxe_s_ctrl_detect_tx_5v(struct v4l2_subdev * sd)902 static int lt6911uxe_s_ctrl_detect_tx_5v(struct v4l2_subdev *sd)
903 {
904 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
905
906 return v4l2_ctrl_s_ctrl(lt6911uxe->detect_tx_5v_ctrl,
907 tx_5v_power_present(sd));
908 }
909
lt6911uxe_s_ctrl_audio_sampling_rate(struct v4l2_subdev * sd)910 static int lt6911uxe_s_ctrl_audio_sampling_rate(struct v4l2_subdev *sd)
911 {
912 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
913
914 return v4l2_ctrl_s_ctrl(lt6911uxe->audio_sampling_rate_ctrl,
915 get_audio_sampling_rate(sd));
916 }
917
lt6911uxe_s_ctrl_audio_present(struct v4l2_subdev * sd)918 static int lt6911uxe_s_ctrl_audio_present(struct v4l2_subdev *sd)
919 {
920 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
921
922 return v4l2_ctrl_s_ctrl(lt6911uxe->audio_present_ctrl,
923 audio_present(sd));
924 }
925
lt6911uxe_update_controls(struct v4l2_subdev * sd)926 static int lt6911uxe_update_controls(struct v4l2_subdev *sd)
927 {
928 int ret = 0;
929
930 ret |= lt6911uxe_s_ctrl_detect_tx_5v(sd);
931 ret |= lt6911uxe_s_ctrl_audio_sampling_rate(sd);
932 ret |= lt6911uxe_s_ctrl_audio_present(sd);
933
934 return ret;
935 }
936
lt6911uxe_config_dphy_timing(struct v4l2_subdev * sd)937 static void lt6911uxe_config_dphy_timing(struct v4l2_subdev *sd)
938 {
939 u8 val;
940
941 val = i2c_rd8(sd, CLK_ZERO_REG);
942 i2c_wr8(sd, CLK_ZERO_REG, val);
943
944 val = i2c_rd8(sd, HS_PREPARE_REG);
945 i2c_wr8(sd, HS_PREPARE_REG, val);
946
947 val = i2c_rd8(sd, HS_TRAIL);
948 i2c_wr8(sd, HS_TRAIL, val);
949 v4l2_info(sd, "%s: dphy timing: hs trail = %x\n", __func__, val);
950
951 val = i2c_rd8(sd, MIPI_TX_PT0_TX0_DLY);
952 i2c_wr8_and_or(sd, MIPI_TX_PT0_TX0_DLY, ~MIPI_TIMING_MASK, val);
953 v4l2_info(sd, "%s: dphy timing: port0 tx0 delay = %x\n", __func__, val);
954
955 val = i2c_rd8(sd, MIPI_TX_PT0_LPTX);
956 i2c_wr8(sd, MIPI_TX_PT0_LPTX, val);
957 v4l2_info(sd, "%s: dphy timing: port0 lptx = %x\n", __func__, val);
958
959 v4l2_info(sd, "%s: dphy timing config done.\n", __func__);
960 }
961
enable_stream(struct v4l2_subdev * sd,bool enable)962 static inline void enable_stream(struct v4l2_subdev *sd, bool enable)
963 {
964 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
965
966 lt6911uxe_i2c_enable(sd);
967 if (enable) {
968 lt6911uxe_config_dphy_timing(sd);
969 usleep_range(5000, 6000);
970 i2c_wr8(<6911uxe->sd, STREAM_CTL, ENABLE_STREAM);
971 } else {
972 i2c_wr8(<6911uxe->sd, STREAM_CTL, DISABLE_STREAM);
973 }
974 lt6911uxe_i2c_disable(sd);
975 msleep(20);
976
977 v4l2_dbg(2, debug, sd, "%s: %sable\n",
978 __func__, enable ? "en" : "dis");
979 }
980
lt6911uxe_format_change(struct v4l2_subdev * sd)981 static void lt6911uxe_format_change(struct v4l2_subdev *sd)
982 {
983 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
984 struct v4l2_dv_timings timings;
985 const struct v4l2_event lt6911uxe_ev_fmt = {
986 .type = V4L2_EVENT_SOURCE_CHANGE,
987 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
988 };
989
990 if (lt6911uxe_get_detected_timings(sd, &timings)) {
991 enable_stream(sd, false);
992 v4l2_dbg(1, debug, sd, "%s: No signal\n", __func__);
993 }
994
995 if (!v4l2_match_dv_timings(<6911uxe->timings, &timings, 0, false)) {
996 enable_stream(sd, false);
997 /* automatically set timing rather than set by user */
998 lt6911uxe_s_dv_timings(sd, &timings);
999 v4l2_print_dv_timings(sd->name,
1000 "Format_change: New format: ",
1001 &timings, false);
1002 if (sd->devnode && !lt6911uxe->i2c_client->irq)
1003 v4l2_subdev_notify_event(sd, <6911uxe_ev_fmt);
1004 }
1005 if (sd->devnode && lt6911uxe->i2c_client->irq)
1006 v4l2_subdev_notify_event(sd, <6911uxe_ev_fmt);
1007 }
1008
lt6911uxe_isr(struct v4l2_subdev * sd,u32 status,bool * handled)1009 static int lt6911uxe_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
1010 {
1011 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1012
1013 schedule_delayed_work(<6911uxe->delayed_work_res_change, HZ / 20);
1014 *handled = true;
1015
1016 return 0;
1017 }
1018
lt6911uxe_res_change_irq_handler(int irq,void * dev_id)1019 static irqreturn_t lt6911uxe_res_change_irq_handler(int irq, void *dev_id)
1020 {
1021 struct lt6911uxe *lt6911uxe = dev_id;
1022 bool handled;
1023
1024 lt6911uxe_isr(<6911uxe->sd, 0, &handled);
1025
1026 return handled ? IRQ_HANDLED : IRQ_NONE;
1027 }
1028
plugin_detect_irq_handler(int irq,void * dev_id)1029 static irqreturn_t plugin_detect_irq_handler(int irq, void *dev_id)
1030 {
1031 struct lt6911uxe *lt6911uxe = dev_id;
1032
1033 /* control hpd output level after 25ms */
1034 schedule_delayed_work(<6911uxe->delayed_work_hotplug,
1035 HZ / 40);
1036
1037 return IRQ_HANDLED;
1038 }
1039
lt6911uxe_irq_poll_timer(struct timer_list * t)1040 static void lt6911uxe_irq_poll_timer(struct timer_list *t)
1041 {
1042 struct lt6911uxe *lt6911uxe = from_timer(lt6911uxe, t, timer);
1043
1044 schedule_work(<6911uxe->work_i2c_poll);
1045 mod_timer(<6911uxe->timer, jiffies + msecs_to_jiffies(POLL_INTERVAL_MS));
1046 }
1047
lt6911uxe_work_i2c_poll(struct work_struct * work)1048 static void lt6911uxe_work_i2c_poll(struct work_struct *work)
1049 {
1050 struct lt6911uxe *lt6911uxe = container_of(work,
1051 struct lt6911uxe, work_i2c_poll);
1052 struct v4l2_subdev *sd = <6911uxe->sd;
1053
1054 lt6911uxe_format_change(sd);
1055 }
1056
lt6911uxe_subscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1057 static int lt6911uxe_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1058 struct v4l2_event_subscription *sub)
1059 {
1060 switch (sub->type) {
1061 case V4L2_EVENT_SOURCE_CHANGE:
1062 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
1063 case V4L2_EVENT_CTRL:
1064 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
1065 default:
1066 return -EINVAL;
1067 }
1068 }
1069
lt6911uxe_g_input_status(struct v4l2_subdev * sd,u32 * status)1070 static int lt6911uxe_g_input_status(struct v4l2_subdev *sd, u32 *status)
1071 {
1072 *status = 0;
1073 *status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0;
1074
1075 v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status);
1076
1077 return 0;
1078 }
1079
lt6911uxe_s_dv_timings(struct v4l2_subdev * sd,struct v4l2_dv_timings * timings)1080 static int lt6911uxe_s_dv_timings(struct v4l2_subdev *sd,
1081 struct v4l2_dv_timings *timings)
1082 {
1083 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1084
1085 if (!timings)
1086 return -EINVAL;
1087
1088 if (debug)
1089 v4l2_print_dv_timings(sd->name, "s_dv_timings: ",
1090 timings, false);
1091
1092 if (v4l2_match_dv_timings(<6911uxe->timings, timings, 0, false)) {
1093 v4l2_dbg(1, debug, sd, "%s: no change\n", __func__);
1094 return 0;
1095 }
1096
1097 if (!v4l2_valid_dv_timings(timings,
1098 <6911uxe_timings_cap, NULL, NULL)) {
1099 v4l2_dbg(1, debug, sd, "%s: timings out of range\n", __func__);
1100 return -ERANGE;
1101 }
1102
1103 lt6911uxe->timings = *timings;
1104
1105 enable_stream(sd, false);
1106
1107 return 0;
1108 }
1109
lt6911uxe_g_dv_timings(struct v4l2_subdev * sd,struct v4l2_dv_timings * timings)1110 static int lt6911uxe_g_dv_timings(struct v4l2_subdev *sd,
1111 struct v4l2_dv_timings *timings)
1112 {
1113 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1114
1115 *timings = lt6911uxe->timings;
1116
1117 return 0;
1118 }
1119
lt6911uxe_enum_dv_timings(struct v4l2_subdev * sd,struct v4l2_enum_dv_timings * timings)1120 static int lt6911uxe_enum_dv_timings(struct v4l2_subdev *sd,
1121 struct v4l2_enum_dv_timings *timings)
1122 {
1123 if (timings->pad != 0)
1124 return -EINVAL;
1125
1126 return v4l2_enum_dv_timings_cap(timings,
1127 <6911uxe_timings_cap, NULL, NULL);
1128 }
1129
lt6911uxe_query_dv_timings(struct v4l2_subdev * sd,struct v4l2_dv_timings * timings)1130 static int lt6911uxe_query_dv_timings(struct v4l2_subdev *sd,
1131 struct v4l2_dv_timings *timings)
1132 {
1133 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1134
1135 *timings = lt6911uxe->timings;
1136 if (debug)
1137 v4l2_print_dv_timings(sd->name,
1138 "query_dv_timings: ", timings, false);
1139
1140 if (!v4l2_valid_dv_timings(timings, <6911uxe_timings_cap, NULL,
1141 NULL)) {
1142 v4l2_dbg(1, debug, sd, "%s: timings out of range\n",
1143 __func__);
1144
1145 return -ERANGE;
1146 }
1147
1148 return 0;
1149 }
1150
lt6911uxe_dv_timings_cap(struct v4l2_subdev * sd,struct v4l2_dv_timings_cap * cap)1151 static int lt6911uxe_dv_timings_cap(struct v4l2_subdev *sd,
1152 struct v4l2_dv_timings_cap *cap)
1153 {
1154 if (cap->pad != 0)
1155 return -EINVAL;
1156
1157 *cap = lt6911uxe_timings_cap;
1158
1159 return 0;
1160 }
1161
lt6911uxe_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad,struct v4l2_mbus_config * cfg)1162 static int lt6911uxe_g_mbus_config(struct v4l2_subdev *sd,
1163 unsigned int pad, struct v4l2_mbus_config *cfg)
1164 {
1165 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1166 u32 lane_num = lt6911uxe->bus_cfg.bus.mipi_csi2.num_data_lanes;
1167 u32 val = 0;
1168
1169 val = 1 << (lane_num - 1) |
1170 V4L2_MBUS_CSI2_CHANNEL_0 |
1171 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1172
1173 cfg->type = lt6911uxe->bus_cfg.bus_type;
1174 cfg->flags = val;
1175
1176 return 0;
1177 }
1178
lt6911uxe_s_stream(struct v4l2_subdev * sd,int on)1179 static int lt6911uxe_s_stream(struct v4l2_subdev *sd, int on)
1180 {
1181 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1182 struct i2c_client *client = lt6911uxe->i2c_client;
1183
1184 dev_info(&client->dev, "%s: on: %d, %dx%d%s%d\n", __func__, on,
1185 lt6911uxe->cur_mode->width,
1186 lt6911uxe->cur_mode->height,
1187 lt6911uxe->cur_mode->interlace ? "I" : "P",
1188 DIV_ROUND_CLOSEST(lt6911uxe->cur_mode->max_fps.denominator,
1189 lt6911uxe->cur_mode->max_fps.numerator));
1190 enable_stream(sd, on);
1191
1192 return 0;
1193 }
1194
lt6911uxe_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)1195 static int lt6911uxe_enum_mbus_code(struct v4l2_subdev *sd,
1196 struct v4l2_subdev_pad_config *cfg,
1197 struct v4l2_subdev_mbus_code_enum *code)
1198 {
1199 switch (code->index) {
1200 case 0:
1201 code->code = LT6911UXE_MEDIA_BUS_FMT;
1202 break;
1203
1204 default:
1205 return -EINVAL;
1206 }
1207
1208 return 0;
1209 }
1210
lt6911uxe_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)1211 static int lt6911uxe_enum_frame_sizes(struct v4l2_subdev *sd,
1212 struct v4l2_subdev_pad_config *cfg,
1213 struct v4l2_subdev_frame_size_enum *fse)
1214 {
1215 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1216
1217 if (fse->index >= lt6911uxe->cfg_num)
1218 return -EINVAL;
1219
1220 if (fse->code != LT6911UXE_MEDIA_BUS_FMT)
1221 return -EINVAL;
1222
1223 fse->min_width = lt6911uxe->support_modes[fse->index].width;
1224 fse->max_width = lt6911uxe->support_modes[fse->index].width;
1225 fse->max_height = lt6911uxe->support_modes[fse->index].height;
1226 fse->min_height = lt6911uxe->support_modes[fse->index].height;
1227
1228 return 0;
1229 }
1230
lt6911uxe_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1231 static int lt6911uxe_enum_frame_interval(struct v4l2_subdev *sd,
1232 struct v4l2_subdev_pad_config *cfg,
1233 struct v4l2_subdev_frame_interval_enum *fie)
1234 {
1235 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1236
1237 if (fie->index >= lt6911uxe->cfg_num)
1238 return -EINVAL;
1239
1240 fie->code = LT6911UXE_MEDIA_BUS_FMT;
1241
1242 fie->width = lt6911uxe->support_modes[fie->index].width;
1243 fie->height = lt6911uxe->support_modes[fie->index].height;
1244 fie->interval = lt6911uxe->support_modes[fie->index].max_fps;
1245
1246 return 0;
1247 }
1248
lt6911uxe_get_reso_dist(const struct lt6911uxe_mode * mode,struct v4l2_dv_timings * timings)1249 static int lt6911uxe_get_reso_dist(const struct lt6911uxe_mode *mode,
1250 struct v4l2_dv_timings *timings)
1251 {
1252 struct v4l2_bt_timings *bt = &timings->bt;
1253 u32 cur_fps, dist_fps;
1254
1255 cur_fps = fps_calc(bt);
1256 dist_fps = DIV_ROUND_CLOSEST(mode->max_fps.denominator, mode->max_fps.numerator);
1257
1258 return abs(mode->width - bt->width) +
1259 abs(mode->height - bt->height) + abs(dist_fps - cur_fps);
1260 }
1261
1262 static const struct lt6911uxe_mode *
lt6911uxe_find_best_fit(struct lt6911uxe * lt6911uxe)1263 lt6911uxe_find_best_fit(struct lt6911uxe *lt6911uxe)
1264 {
1265 int dist;
1266 int cur_best_fit = 0;
1267 int cur_best_fit_dist = -1;
1268 unsigned int i;
1269
1270 for (i = 0; i < lt6911uxe->cfg_num; i++) {
1271 if (lt6911uxe->support_modes[i].interlace == lt6911uxe->timings.bt.interlaced) {
1272 dist = lt6911uxe_get_reso_dist(<6911uxe->support_modes[i],
1273 <6911uxe->timings);
1274 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
1275 cur_best_fit_dist = dist;
1276 cur_best_fit = i;
1277 }
1278 }
1279 }
1280 dev_info(<6911uxe->i2c_client->dev,
1281 "find current mode: support_mode[%d], %dx%d%s%dfps\n",
1282 cur_best_fit, lt6911uxe->support_modes[cur_best_fit].width,
1283 lt6911uxe->support_modes[cur_best_fit].height,
1284 lt6911uxe->support_modes[cur_best_fit].interlace ? "I" : "P",
1285 DIV_ROUND_CLOSEST(lt6911uxe->support_modes[cur_best_fit].max_fps.denominator,
1286 lt6911uxe->support_modes[cur_best_fit].max_fps.numerator));
1287
1288 return <6911uxe->support_modes[cur_best_fit];
1289 }
1290
lt6911uxe_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)1291 static int lt6911uxe_get_fmt(struct v4l2_subdev *sd,
1292 struct v4l2_subdev_pad_config *cfg,
1293 struct v4l2_subdev_format *format)
1294 {
1295 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1296 const struct lt6911uxe_mode *mode;
1297
1298 mutex_lock(<6911uxe->confctl_mutex);
1299 format->format.code = lt6911uxe->mbus_fmt_code;
1300 format->format.width = lt6911uxe->timings.bt.width;
1301 format->format.height = lt6911uxe->timings.bt.height;
1302 format->format.field =
1303 lt6911uxe->timings.bt.interlaced ?
1304 V4L2_FIELD_INTERLACED : V4L2_FIELD_NONE;
1305 format->format.colorspace = V4L2_COLORSPACE_SRGB;
1306 mutex_unlock(<6911uxe->confctl_mutex);
1307
1308 mode = lt6911uxe_find_best_fit(lt6911uxe);
1309 lt6911uxe->cur_mode = mode;
1310
1311 __v4l2_ctrl_s_ctrl_int64(lt6911uxe->pixel_rate,
1312 LT6911UXE_PIXEL_RATE);
1313 __v4l2_ctrl_s_ctrl(lt6911uxe->link_freq,
1314 mode->mipi_freq_idx);
1315
1316 v4l2_dbg(1, debug, sd, "%s: mode->mipi_freq_idx(%d)", __func__, mode->mipi_freq_idx);
1317
1318 v4l2_dbg(1, debug, sd, "%s: fmt code:%d, w:%d, h:%d, field code:%d\n",
1319 __func__, format->format.code, format->format.width,
1320 format->format.height, format->format.field);
1321
1322 return 0;
1323 }
1324
lt6911uxe_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)1325 static int lt6911uxe_set_fmt(struct v4l2_subdev *sd,
1326 struct v4l2_subdev_pad_config *cfg,
1327 struct v4l2_subdev_format *format)
1328 {
1329 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1330 const struct lt6911uxe_mode *mode;
1331
1332 /* is overwritten by get_fmt */
1333 u32 code = format->format.code;
1334 int ret = lt6911uxe_get_fmt(sd, cfg, format);
1335
1336 format->format.code = code;
1337
1338 if (ret)
1339 return ret;
1340
1341 switch (code) {
1342 case LT6911UXE_MEDIA_BUS_FMT:
1343 break;
1344
1345 default:
1346 return -EINVAL;
1347 }
1348
1349 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
1350 return 0;
1351
1352 lt6911uxe->mbus_fmt_code = format->format.code;
1353 mode = lt6911uxe_find_best_fit(lt6911uxe);
1354 lt6911uxe->cur_mode = mode;
1355
1356 enable_stream(sd, false);
1357
1358 return 0;
1359 }
1360
lt6911uxe_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)1361 static int lt6911uxe_g_frame_interval(struct v4l2_subdev *sd,
1362 struct v4l2_subdev_frame_interval *fi)
1363 {
1364 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1365 const struct lt6911uxe_mode *mode = lt6911uxe->cur_mode;
1366
1367 mutex_lock(<6911uxe->confctl_mutex);
1368 fi->interval = mode->max_fps;
1369 mutex_unlock(<6911uxe->confctl_mutex);
1370
1371 return 0;
1372 }
1373
lt6911uxe_get_module_inf(struct lt6911uxe * lt6911uxe,struct rkmodule_inf * inf)1374 static void lt6911uxe_get_module_inf(struct lt6911uxe *lt6911uxe,
1375 struct rkmodule_inf *inf)
1376 {
1377 memset(inf, 0, sizeof(*inf));
1378 strscpy(inf->base.sensor, LT6911UXE_NAME, sizeof(inf->base.sensor));
1379 strscpy(inf->base.module, lt6911uxe->module_name, sizeof(inf->base.module));
1380 strscpy(inf->base.lens, lt6911uxe->len_name, sizeof(inf->base.lens));
1381 }
1382
lt6911uxe_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1383 static long lt6911uxe_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1384 {
1385 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1386 long ret = 0;
1387 struct rkmodule_csi_dphy_param *dphy_param;
1388
1389 switch (cmd) {
1390 case RKMODULE_GET_MODULE_INFO:
1391 lt6911uxe_get_module_inf(lt6911uxe, (struct rkmodule_inf *)arg);
1392 break;
1393 case RKMODULE_GET_HDMI_MODE:
1394 *(int *)arg = RKMODULE_HDMIIN_MODE;
1395 break;
1396 case RKMODULE_SET_CSI_DPHY_PARAM:
1397 dphy_param = (struct rkmodule_csi_dphy_param *)arg;
1398 if (dphy_param->vendor == rk3588_dcphy_param.vendor)
1399 rk3588_dcphy_param = *dphy_param;
1400 dev_dbg(<6911uxe->i2c_client->dev,
1401 "sensor set dphy param\n");
1402 break;
1403 case RKMODULE_GET_CSI_DPHY_PARAM:
1404 dphy_param = (struct rkmodule_csi_dphy_param *)arg;
1405 if (dphy_param->vendor == rk3588_dcphy_param.vendor)
1406 *dphy_param = rk3588_dcphy_param;
1407 dev_dbg(<6911uxe->i2c_client->dev,
1408 "sensor get dphy param\n");
1409 break;
1410 default:
1411 ret = -ENOIOCTLCMD;
1412 break;
1413 }
1414
1415 return ret;
1416 }
1417
lt6911uxe_s_power(struct v4l2_subdev * sd,int on)1418 static int lt6911uxe_s_power(struct v4l2_subdev *sd, int on)
1419 {
1420 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1421 int ret = 0;
1422
1423 mutex_lock(<6911uxe->confctl_mutex);
1424
1425 if (lt6911uxe->power_on == !!on)
1426 goto unlock_and_return;
1427
1428 if (on)
1429 lt6911uxe->power_on = true;
1430 else
1431 lt6911uxe->power_on = false;
1432
1433 unlock_and_return:
1434 mutex_unlock(<6911uxe->confctl_mutex);
1435
1436 return ret;
1437 }
1438
1439 #ifdef CONFIG_COMPAT
lt6911uxe_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)1440 static long lt6911uxe_compat_ioctl32(struct v4l2_subdev *sd,
1441 unsigned int cmd, unsigned long arg)
1442 {
1443 void __user *up = compat_ptr(arg);
1444 struct rkmodule_inf *inf;
1445 long ret;
1446 int *seq;
1447 struct rkmodule_csi_dphy_param *dphy_param;
1448
1449 switch (cmd) {
1450 case RKMODULE_GET_MODULE_INFO:
1451 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
1452 if (!inf) {
1453 ret = -ENOMEM;
1454 return ret;
1455 }
1456
1457 ret = lt6911uxe_ioctl(sd, cmd, inf);
1458 if (!ret) {
1459 ret = copy_to_user(up, inf, sizeof(*inf));
1460 if (ret)
1461 ret = -EFAULT;
1462 }
1463 kfree(inf);
1464 break;
1465 case RKMODULE_GET_HDMI_MODE:
1466 seq = kzalloc(sizeof(*seq), GFP_KERNEL);
1467 if (!seq) {
1468 ret = -ENOMEM;
1469 return ret;
1470 }
1471
1472 ret = lt6911uxe_ioctl(sd, cmd, seq);
1473 if (!ret) {
1474 ret = copy_to_user(up, seq, sizeof(*seq));
1475 if (ret)
1476 ret = -EFAULT;
1477 }
1478 kfree(seq);
1479 break;
1480 case RKMODULE_SET_CSI_DPHY_PARAM:
1481 dphy_param = kzalloc(sizeof(*dphy_param), GFP_KERNEL);
1482 if (!dphy_param) {
1483 ret = -ENOMEM;
1484 return ret;
1485 }
1486
1487 ret = copy_from_user(dphy_param, up, sizeof(*dphy_param));
1488 if (!ret)
1489 ret = lt6911uxe_ioctl(sd, cmd, dphy_param);
1490 else
1491 ret = -EFAULT;
1492 kfree(dphy_param);
1493 break;
1494 case RKMODULE_GET_CSI_DPHY_PARAM:
1495 dphy_param = kzalloc(sizeof(*dphy_param), GFP_KERNEL);
1496 if (!dphy_param) {
1497 ret = -ENOMEM;
1498 return ret;
1499 }
1500
1501 ret = lt6911uxe_ioctl(sd, cmd, dphy_param);
1502 if (!ret) {
1503 ret = copy_to_user(up, dphy_param, sizeof(*dphy_param));
1504 if (ret)
1505 ret = -EFAULT;
1506 }
1507 kfree(dphy_param);
1508 break;
1509 default:
1510 ret = -ENOIOCTLCMD;
1511 break;
1512 }
1513
1514 return ret;
1515 }
1516 #endif
1517
1518 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
lt6911uxe_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1519 static int lt6911uxe_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1520 {
1521 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1522 struct v4l2_mbus_framefmt *try_fmt =
1523 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1524 const struct lt6911uxe_mode *def_mode = <6911uxe->support_modes[0];
1525
1526 mutex_lock(<6911uxe->confctl_mutex);
1527 /* Initialize try_fmt */
1528 try_fmt->width = def_mode->width;
1529 try_fmt->height = def_mode->height;
1530 try_fmt->code = LT6911UXE_MEDIA_BUS_FMT;
1531 try_fmt->field = V4L2_FIELD_NONE;
1532 mutex_unlock(<6911uxe->confctl_mutex);
1533
1534 return 0;
1535 }
1536 #endif
1537
1538 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1539 static const struct v4l2_subdev_internal_ops lt6911uxe_internal_ops = {
1540 .open = lt6911uxe_open,
1541 };
1542 #endif
1543
1544 static const struct v4l2_subdev_core_ops lt6911uxe_core_ops = {
1545 .s_power = lt6911uxe_s_power,
1546 .interrupt_service_routine = lt6911uxe_isr,
1547 .subscribe_event = lt6911uxe_subscribe_event,
1548 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1549 .ioctl = lt6911uxe_ioctl,
1550 #ifdef CONFIG_COMPAT
1551 .compat_ioctl32 = lt6911uxe_compat_ioctl32,
1552 #endif
1553 };
1554
1555 static const struct v4l2_subdev_video_ops lt6911uxe_video_ops = {
1556 .g_input_status = lt6911uxe_g_input_status,
1557 .s_dv_timings = lt6911uxe_s_dv_timings,
1558 .g_dv_timings = lt6911uxe_g_dv_timings,
1559 .query_dv_timings = lt6911uxe_query_dv_timings,
1560 .s_stream = lt6911uxe_s_stream,
1561 .g_frame_interval = lt6911uxe_g_frame_interval,
1562 };
1563
1564 static const struct v4l2_subdev_pad_ops lt6911uxe_pad_ops = {
1565 .enum_mbus_code = lt6911uxe_enum_mbus_code,
1566 .enum_frame_size = lt6911uxe_enum_frame_sizes,
1567 .enum_frame_interval = lt6911uxe_enum_frame_interval,
1568 .set_fmt = lt6911uxe_set_fmt,
1569 .get_fmt = lt6911uxe_get_fmt,
1570 .enum_dv_timings = lt6911uxe_enum_dv_timings,
1571 .dv_timings_cap = lt6911uxe_dv_timings_cap,
1572 .get_mbus_config = lt6911uxe_g_mbus_config,
1573 };
1574
1575 static const struct v4l2_subdev_ops lt6911uxe_ops = {
1576 .core = <6911uxe_core_ops,
1577 .video = <6911uxe_video_ops,
1578 .pad = <6911uxe_pad_ops,
1579 };
1580
1581 static const struct v4l2_ctrl_config lt6911uxe_ctrl_audio_sampling_rate = {
1582 .id = RK_V4L2_CID_AUDIO_SAMPLING_RATE,
1583 .name = "Audio sampling rate",
1584 .type = V4L2_CTRL_TYPE_INTEGER,
1585 .min = 0,
1586 .max = 768000,
1587 .step = 1,
1588 .def = 0,
1589 .flags = V4L2_CTRL_FLAG_READ_ONLY,
1590 };
1591
1592 static const struct v4l2_ctrl_config lt6911uxe_ctrl_audio_present = {
1593 .id = RK_V4L2_CID_AUDIO_PRESENT,
1594 .name = "Audio present",
1595 .type = V4L2_CTRL_TYPE_BOOLEAN,
1596 .min = 0,
1597 .max = 1,
1598 .step = 1,
1599 .def = 0,
1600 .flags = V4L2_CTRL_FLAG_READ_ONLY,
1601 };
1602
lt6911uxe_reset(struct lt6911uxe * lt6911uxe)1603 static void lt6911uxe_reset(struct lt6911uxe *lt6911uxe)
1604 {
1605 gpiod_set_value(lt6911uxe->reset_gpio, 0);
1606 usleep_range(2000, 2100);
1607 gpiod_set_value(lt6911uxe->reset_gpio, 1);
1608 usleep_range(120*1000, 121*1000);
1609 gpiod_set_value(lt6911uxe->reset_gpio, 0);
1610 usleep_range(300*1000, 310*1000);
1611 }
1612
lt6911uxe_init_v4l2_ctrls(struct lt6911uxe * lt6911uxe)1613 static int lt6911uxe_init_v4l2_ctrls(struct lt6911uxe *lt6911uxe)
1614 {
1615 const struct lt6911uxe_mode *mode;
1616 struct v4l2_subdev *sd;
1617 int ret;
1618
1619 mode = lt6911uxe->cur_mode;
1620 sd = <6911uxe->sd;
1621 ret = v4l2_ctrl_handler_init(<6911uxe->hdl, 5);
1622 if (ret)
1623 return ret;
1624
1625 lt6911uxe->link_freq = v4l2_ctrl_new_int_menu(<6911uxe->hdl, NULL,
1626 V4L2_CID_LINK_FREQ,
1627 ARRAY_SIZE(link_freq_menu_items) - 1, 0,
1628 link_freq_menu_items);
1629 lt6911uxe->pixel_rate = v4l2_ctrl_new_std(<6911uxe->hdl, NULL,
1630 V4L2_CID_PIXEL_RATE,
1631 0, LT6911UXE_PIXEL_RATE, 1, LT6911UXE_PIXEL_RATE);
1632
1633 lt6911uxe->detect_tx_5v_ctrl = v4l2_ctrl_new_std(<6911uxe->hdl,
1634 NULL, V4L2_CID_DV_RX_POWER_PRESENT,
1635 0, 1, 0, 0);
1636
1637 lt6911uxe->audio_sampling_rate_ctrl =
1638 v4l2_ctrl_new_custom(<6911uxe->hdl,
1639 <6911uxe_ctrl_audio_sampling_rate, NULL);
1640 lt6911uxe->audio_present_ctrl = v4l2_ctrl_new_custom(<6911uxe->hdl,
1641 <6911uxe_ctrl_audio_present, NULL);
1642
1643 sd->ctrl_handler = <6911uxe->hdl;
1644 if (lt6911uxe->hdl.error) {
1645 ret = lt6911uxe->hdl.error;
1646 v4l2_err(sd, "cfg v4l2 ctrls failed! ret:%d\n", ret);
1647 return ret;
1648 }
1649
1650 __v4l2_ctrl_s_ctrl(lt6911uxe->link_freq, mode->mipi_freq_idx);
1651 __v4l2_ctrl_s_ctrl_int64(lt6911uxe->pixel_rate, LT6911UXE_PIXEL_RATE);
1652
1653 if (lt6911uxe_update_controls(sd)) {
1654 ret = -ENODEV;
1655 v4l2_err(sd, "update v4l2 ctrls failed! ret:%d\n", ret);
1656 return ret;
1657 }
1658
1659 return 0;
1660 }
1661
1662 #ifdef CONFIG_OF
lt6911uxe_probe_of(struct lt6911uxe * lt6911uxe)1663 static int lt6911uxe_probe_of(struct lt6911uxe *lt6911uxe)
1664 {
1665 struct device *dev = <6911uxe->i2c_client->dev;
1666 struct device_node *node = dev->of_node;
1667 struct device_node *ep;
1668 int ret;
1669
1670 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1671 <6911uxe->module_index);
1672 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1673 <6911uxe->module_facing);
1674 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1675 <6911uxe->module_name);
1676 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1677 <6911uxe->len_name);
1678 if (ret) {
1679 dev_err(dev, "could not get module information!\n");
1680 return -EINVAL;
1681 }
1682
1683 lt6911uxe->power_gpio = devm_gpiod_get_optional(dev, "power",
1684 GPIOD_OUT_LOW);
1685 if (IS_ERR(lt6911uxe->power_gpio)) {
1686 dev_err(dev, "failed to get power gpio\n");
1687 ret = PTR_ERR(lt6911uxe->power_gpio);
1688 return ret;
1689 }
1690
1691 lt6911uxe->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1692 GPIOD_OUT_HIGH);
1693 if (IS_ERR(lt6911uxe->reset_gpio)) {
1694 dev_err(dev, "failed to get reset gpio\n");
1695 ret = PTR_ERR(lt6911uxe->reset_gpio);
1696 return ret;
1697 }
1698
1699 lt6911uxe->plugin_det_gpio = devm_gpiod_get_optional(dev, "plugin-det",
1700 GPIOD_IN);
1701 if (IS_ERR(lt6911uxe->plugin_det_gpio)) {
1702 dev_err(dev, "failed to get plugin det gpio\n");
1703 ret = PTR_ERR(lt6911uxe->plugin_det_gpio);
1704 return ret;
1705 }
1706
1707 ep = of_graph_get_next_endpoint(dev->of_node, NULL);
1708 if (!ep) {
1709 dev_err(dev, "missing endpoint node\n");
1710 return -EINVAL;
1711 }
1712
1713 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep),
1714 <6911uxe->bus_cfg);
1715 if (ret) {
1716 dev_err(dev, "failed to parse endpoint\n");
1717 goto put_node;
1718 }
1719
1720 lt6911uxe->support_modes = supported_modes_dphy;
1721 lt6911uxe->cfg_num = ARRAY_SIZE(supported_modes_dphy);
1722
1723 lt6911uxe->xvclk = devm_clk_get(dev, "xvclk");
1724 if (IS_ERR(lt6911uxe->xvclk)) {
1725 dev_err(dev, "failed to get xvclk\n");
1726 ret = -EINVAL;
1727 goto put_node;
1728 }
1729
1730 ret = clk_prepare_enable(lt6911uxe->xvclk);
1731 if (ret) {
1732 dev_err(dev, "Failed! to enable xvclk\n");
1733 goto put_node;
1734 }
1735
1736 lt6911uxe->enable_hdcp = false;
1737
1738 gpiod_set_value(lt6911uxe->power_gpio, 1);
1739 lt6911uxe_reset(lt6911uxe);
1740
1741 ret = 0;
1742
1743 put_node:
1744 of_node_put(ep);
1745 return ret;
1746 }
1747 #else
lt6911uxe_probe_of(struct lt6911uxe * state)1748 static inline int lt6911uxe_probe_of(struct lt6911uxe *state)
1749 {
1750 return -ENODEV;
1751 }
1752 #endif
lt6911uxe_check_chip_id(struct lt6911uxe * lt6911uxe)1753 static int lt6911uxe_check_chip_id(struct lt6911uxe *lt6911uxe)
1754 {
1755 struct device *dev = <6911uxe->i2c_client->dev;
1756 struct v4l2_subdev *sd = <6911uxe->sd;
1757 u8 id_h, id_l;
1758 u32 chipid;
1759 int ret = 0;
1760
1761 lt6911uxe_i2c_enable(sd);
1762 id_l = i2c_rd8(sd, CHIPID_REGL);
1763 id_h = i2c_rd8(sd, CHIPID_REGH);
1764 lt6911uxe_i2c_disable(sd);
1765
1766 chipid = (id_h << 8) | id_l;
1767 if (chipid != LT6911UXE_CHIPID) {
1768 dev_err(dev, "chipid err, read:%#x, expect:%#x\n",
1769 chipid, LT6911UXE_CHIPID);
1770 return -EINVAL;
1771 }
1772 dev_info(dev, "check chipid ok, id:%#x", chipid);
1773
1774 return ret;
1775 }
1776
lt6911uxe_probe(struct i2c_client * client,const struct i2c_device_id * id)1777 static int lt6911uxe_probe(struct i2c_client *client,
1778 const struct i2c_device_id *id)
1779 {
1780 struct v4l2_dv_timings default_timing =
1781 V4L2_DV_BT_CEA_640X480P59_94;
1782 struct lt6911uxe *lt6911uxe;
1783 struct v4l2_subdev *sd;
1784 struct device *dev = &client->dev;
1785 char facing[2];
1786 int err;
1787
1788 dev_info(dev, "driver version: %02x.%02x.%02x",
1789 DRIVER_VERSION >> 16,
1790 (DRIVER_VERSION & 0xff00) >> 8,
1791 DRIVER_VERSION & 0x00ff);
1792
1793 lt6911uxe = devm_kzalloc(dev, sizeof(struct lt6911uxe), GFP_KERNEL);
1794 if (!lt6911uxe)
1795 return -ENOMEM;
1796
1797 sd = <6911uxe->sd;
1798 lt6911uxe->i2c_client = client;
1799 lt6911uxe->mbus_fmt_code = LT6911UXE_MEDIA_BUS_FMT;
1800
1801 err = lt6911uxe_probe_of(lt6911uxe);
1802 if (err) {
1803 v4l2_err(sd, "lt6911uxe_parse_of failed! err:%d\n", err);
1804 return err;
1805 }
1806
1807 lt6911uxe->timings = default_timing;
1808 lt6911uxe->cur_mode = <6911uxe->support_modes[0];
1809 err = lt6911uxe_check_chip_id(lt6911uxe);
1810 if (err < 0)
1811 return err;
1812
1813 mutex_init(<6911uxe->confctl_mutex);
1814 err = lt6911uxe_init_v4l2_ctrls(lt6911uxe);
1815 if (err)
1816 goto err_free_hdl;
1817
1818 client->flags |= I2C_CLIENT_SCCB;
1819 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1820 v4l2_i2c_subdev_init(sd, client, <6911uxe_ops);
1821 sd->internal_ops = <6911uxe_internal_ops;
1822 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
1823 #endif
1824
1825 #if defined(CONFIG_MEDIA_CONTROLLER)
1826 lt6911uxe->pad.flags = MEDIA_PAD_FL_SOURCE;
1827 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1828 err = media_entity_pads_init(&sd->entity, 1, <6911uxe->pad);
1829 if (err < 0) {
1830 v4l2_err(sd, "media entity init failed! err:%d\n", err);
1831 goto err_free_hdl;
1832 }
1833 #endif
1834 memset(facing, 0, sizeof(facing));
1835 if (strcmp(lt6911uxe->module_facing, "back") == 0)
1836 facing[0] = 'b';
1837 else
1838 facing[0] = 'f';
1839
1840 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1841 lt6911uxe->module_index, facing,
1842 LT6911UXE_NAME, dev_name(sd->dev));
1843 err = v4l2_async_register_subdev_sensor_common(sd);
1844 if (err < 0) {
1845 v4l2_err(sd, "v4l2 register subdev failed! err:%d\n", err);
1846 goto err_clean_entity;
1847 }
1848
1849 INIT_DELAYED_WORK(<6911uxe->delayed_work_hotplug,
1850 lt6911uxe_delayed_work_hotplug);
1851 INIT_DELAYED_WORK(<6911uxe->delayed_work_res_change,
1852 lt6911uxe_delayed_work_res_change);
1853
1854 if (lt6911uxe->i2c_client->irq) {
1855 v4l2_dbg(1, debug, sd, "cfg lt6911uxe irq!\n");
1856 err = devm_request_threaded_irq(dev,
1857 lt6911uxe->i2c_client->irq,
1858 NULL, lt6911uxe_res_change_irq_handler,
1859 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1860 "lt6911uxe", lt6911uxe);
1861 if (err) {
1862 v4l2_err(sd, "request irq failed! err:%d\n", err);
1863 goto err_work_queues;
1864 }
1865 } else {
1866 v4l2_dbg(1, debug, sd, "no irq, cfg poll!\n");
1867 INIT_WORK(<6911uxe->work_i2c_poll, lt6911uxe_work_i2c_poll);
1868 timer_setup(<6911uxe->timer, lt6911uxe_irq_poll_timer, 0);
1869 lt6911uxe->timer.expires = jiffies +
1870 msecs_to_jiffies(POLL_INTERVAL_MS);
1871 add_timer(<6911uxe->timer);
1872 }
1873
1874 lt6911uxe->plugin_irq = gpiod_to_irq(lt6911uxe->plugin_det_gpio);
1875 if (lt6911uxe->plugin_irq < 0)
1876 dev_err(dev, "failed to get plugin det irq, maybe no use\n");
1877
1878 err = devm_request_threaded_irq(dev, lt6911uxe->plugin_irq, NULL,
1879 plugin_detect_irq_handler, IRQF_TRIGGER_FALLING |
1880 IRQF_TRIGGER_RISING | IRQF_ONESHOT, "lt6911uxe",
1881 lt6911uxe);
1882 if (err)
1883 dev_err(dev, "failed to register plugin det irq (%d), maybe no use\n", err);
1884
1885 err = v4l2_ctrl_handler_setup(sd->ctrl_handler);
1886 if (err) {
1887 v4l2_err(sd, "v4l2 ctrl handler setup failed! err:%d\n", err);
1888 goto err_work_queues;
1889 }
1890 enable_stream(sd, false);
1891 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1892 client->addr << 1, client->adapter->name);
1893
1894 return 0;
1895
1896 err_work_queues:
1897 if (!lt6911uxe->i2c_client->irq)
1898 flush_work(<6911uxe->work_i2c_poll);
1899 cancel_delayed_work(<6911uxe->delayed_work_hotplug);
1900 cancel_delayed_work(<6911uxe->delayed_work_res_change);
1901 err_clean_entity:
1902 #if defined(CONFIG_MEDIA_CONTROLLER)
1903 media_entity_cleanup(&sd->entity);
1904 #endif
1905 err_free_hdl:
1906 v4l2_ctrl_handler_free(<6911uxe->hdl);
1907 mutex_destroy(<6911uxe->confctl_mutex);
1908 return err;
1909 }
1910
lt6911uxe_remove(struct i2c_client * client)1911 static int lt6911uxe_remove(struct i2c_client *client)
1912 {
1913 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1914 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
1915
1916 if (!lt6911uxe->i2c_client->irq) {
1917 del_timer_sync(<6911uxe->timer);
1918 flush_work(<6911uxe->work_i2c_poll);
1919 }
1920 cancel_delayed_work_sync(<6911uxe->delayed_work_hotplug);
1921 cancel_delayed_work_sync(<6911uxe->delayed_work_res_change);
1922 v4l2_async_unregister_subdev(sd);
1923 v4l2_device_unregister_subdev(sd);
1924 #if defined(CONFIG_MEDIA_CONTROLLER)
1925 media_entity_cleanup(&sd->entity);
1926 #endif
1927 v4l2_ctrl_handler_free(<6911uxe->hdl);
1928 mutex_destroy(<6911uxe->confctl_mutex);
1929 clk_disable_unprepare(lt6911uxe->xvclk);
1930
1931 return 0;
1932 }
1933
1934 #if IS_ENABLED(CONFIG_OF)
1935 static const struct of_device_id lt6911uxe_of_match[] = {
1936 { .compatible = "lontium,lt6911uxe" },
1937 {},
1938 };
1939 MODULE_DEVICE_TABLE(of, lt6911uxe_of_match);
1940 #endif
1941
1942 static struct i2c_driver lt6911uxe_driver = {
1943 .driver = {
1944 .name = LT6911UXE_NAME,
1945 .of_match_table = of_match_ptr(lt6911uxe_of_match),
1946 },
1947 .probe = lt6911uxe_probe,
1948 .remove = lt6911uxe_remove,
1949 };
1950
lt6911uxe_driver_init(void)1951 static int __init lt6911uxe_driver_init(void)
1952 {
1953 return i2c_add_driver(<6911uxe_driver);
1954 }
1955
lt6911uxe_driver_exit(void)1956 static void __exit lt6911uxe_driver_exit(void)
1957 {
1958 i2c_del_driver(<6911uxe_driver);
1959 }
1960
1961 device_initcall_sync(lt6911uxe_driver_init);
1962 module_exit(lt6911uxe_driver_exit);
1963
1964 MODULE_DESCRIPTION("Lontium lt6911uxe HDMI to CSI-2 bridge driver");
1965 MODULE_AUTHOR("Jianwei Fan <jianwei.fan@rock-chips.com>");
1966 MODULE_LICENSE("GPL");
1967