1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
4 *
5 * Author: Dingxian Wen <shawn.wen@rock-chips.com>
6 */
7
8 #include <linux/clk.h>
9 #include <linux/compat.h>
10 #include <linux/debugfs.h>
11 #include <linux/delay.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/irq.h>
16 #include <linux/kernel.h>
17 #include <linux/math64.h>
18 #include <linux/module.h>
19 #include <linux/of_graph.h>
20 #include <linux/platform_device.h>
21 #include <linux/reset.h>
22 #include <linux/rk-camera-module.h>
23 #include <linux/slab.h>
24 #include <linux/timer.h>
25 #include <linux/v4l2-dv-timings.h>
26 #include <linux/version.h>
27 #include <linux/videodev2.h>
28 #include <linux/workqueue.h>
29 #include <media/v4l2-controls_rockchip.h>
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-dv-timings.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <video/videomode.h>
36
37 #include "rk628.h"
38 #include "rk628_combrxphy.h"
39 #include "rk628_combtxphy.h"
40 #include "rk628_csi.h"
41 #include "rk628_cru.h"
42 #include "rk628_dsi.h"
43 #include "rk628_hdmirx.h"
44 #include "rk628_mipi_dphy.h"
45
46 static int debug;
47 module_param(debug, int, 0644);
48 MODULE_PARM_DESC(debug, "debug level (0-3)");
49
50 #define DRIVER_VERSION KERNEL_VERSION(0, 0x0, 0x8)
51 #define RK628_CSI_NAME "rk628-csi"
52
53 #define EDID_NUM_BLOCKS_MAX 2
54 #define EDID_BLOCK_SIZE 128
55
56 #define RK628_CSI_LINK_FREQ_LOW 350000000
57 #define RK628_CSI_LINK_FREQ_HIGH 400000000
58 #define RK628_CSI_PIXEL_RATE_LOW 400000000
59 #define RK628_CSI_PIXEL_RATE_HIGH 600000000
60 #define MIPI_DATARATE_MBPS_LOW 750
61 #define MIPI_DATARATE_MBPS_HIGH 1250
62
63 #define POLL_INTERVAL_MS 1000
64 #define MODETCLK_CNT_NUM 1000
65 #define MODETCLK_HZ 49500000
66 #define RXPHY_CFG_MAX_TIMES 15
67 #define CSITX_ERR_RETRY_TIMES 3
68
69 #define YUV422_8BIT 0x1e
70
71 enum tx_mode_type {
72 CSI_MODE,
73 DSI_MODE,
74 };
75
76 struct rk628_plat_data {
77 int bus_fmt;
78 int tx_mode;
79 };
80
81 struct rk628_csi {
82 struct device *dev;
83 struct i2c_client *i2c_client;
84 struct rk628 *rk628;
85 struct media_pad pad;
86 struct v4l2_subdev sd;
87 struct v4l2_dv_timings src_timings;
88 struct v4l2_dv_timings timings;
89 struct v4l2_ctrl_handler hdl;
90 struct v4l2_ctrl *detect_tx_5v_ctrl;
91 struct v4l2_ctrl *audio_sampling_rate_ctrl;
92 struct v4l2_ctrl *audio_present_ctrl;
93 struct v4l2_ctrl *link_freq;
94 struct v4l2_ctrl *pixel_rate;
95 struct gpio_desc *enable_gpio;
96 struct gpio_desc *reset_gpio;
97 struct gpio_desc *power_gpio;
98 struct gpio_desc *plugin_det_gpio;
99 struct clk *soc_24M;
100 struct clk *clk_hdmirx_aud;
101 struct clk *clk_vop;
102 struct clk *clk_rx_read;
103 struct delayed_work delayed_work_enable_hotplug;
104 struct delayed_work delayed_work_res_change;
105 struct timer_list timer;
106 struct work_struct work_i2c_poll;
107 struct mutex confctl_mutex;
108 const struct rk628_csi_mode *cur_mode;
109 const char *module_facing;
110 const char *module_name;
111 const char *len_name;
112 u32 module_index;
113 u8 edid_blocks_written;
114 u64 lane_mbps;
115 u8 csi_lanes_in_use;
116 u32 mbus_fmt_code;
117 u8 fps;
118 u32 stream_state;
119 int hdmirx_irq;
120 int plugin_irq;
121 bool nosignal;
122 bool rxphy_pwron;
123 bool txphy_pwron;
124 bool enable_hdcp;
125 bool scaler_en;
126 bool hpd_output_inverted;
127 bool avi_rcv_rdy;
128 bool vid_ints_en;
129 struct rk628_hdcp hdcp;
130 bool i2s_enable_default;
131 HAUDINFO audio_info;
132 struct rk628_combtxphy *txphy;
133 struct rk628_dsi dsi;
134 const struct rk628_plat_data *plat_data;
135 };
136
137 struct rk628_csi_mode {
138 u32 width;
139 u32 height;
140 struct v4l2_fract max_fps;
141 u32 hts_def;
142 u32 vts_def;
143 u32 exp_def;
144 };
145
146 static const s64 link_freq_menu_items[] = {
147 RK628_CSI_LINK_FREQ_LOW,
148 RK628_CSI_LINK_FREQ_HIGH,
149 };
150
151 static const struct v4l2_dv_timings_cap rk628_csi_timings_cap = {
152 .type = V4L2_DV_BT_656_1120,
153 /* keep this initialization for compatibility with GCC < 4.4.6 */
154 .reserved = { 0 },
155 V4L2_INIT_BT_TIMINGS(1, 10000, 1, 10000, 0, 400000000,
156 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
157 V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
158 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_INTERLACED |
159 V4L2_DV_BT_CAP_REDUCED_BLANKING |
160 V4L2_DV_BT_CAP_CUSTOM)
161 };
162
163 static u8 edid_init_data[] = {
164 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00,
165 0x49, 0x73, 0x8D, 0x62, 0x00, 0x88, 0x88, 0x88,
166 0x08, 0x1E, 0x01, 0x03, 0x80, 0x00, 0x00, 0x78,
167 0x0A, 0x0D, 0xC9, 0xA0, 0x57, 0x47, 0x98, 0x27,
168 0x12, 0x48, 0x4C, 0x00, 0x00, 0x00, 0x01, 0x01,
169 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
170 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3A,
171 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40, 0x58, 0x2C,
172 0x45, 0x00, 0xC4, 0x8E, 0x21, 0x00, 0x00, 0x1E,
173 0x01, 0x1D, 0x00, 0x72, 0x51, 0xD0, 0x1E, 0x20,
174 0x6E, 0x28, 0x55, 0x00, 0xC4, 0x8E, 0x21, 0x00,
175 0x00, 0x1E, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x54,
176 0x37, 0x34, 0x39, 0x2D, 0x66, 0x48, 0x44, 0x37,
177 0x32, 0x30, 0x0A, 0x20, 0x00, 0x00, 0x00, 0xFD,
178 0x00, 0x14, 0x78, 0x01, 0xFF, 0x1D, 0x00, 0x0A,
179 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0x18,
180
181 0x02, 0x03, 0x1A, 0x71, 0x47, 0x5F, 0x90, 0x22,
182 0x04, 0x11, 0x02, 0x01, 0x23, 0x09, 0x07, 0x01,
183 0x83, 0x01, 0x00, 0x00, 0x65, 0x03, 0x0C, 0x00,
184 0x10, 0x00, 0x02, 0x3A, 0x80, 0x18, 0x71, 0x38,
185 0x2D, 0x40, 0x58, 0x2C, 0x45, 0x00, 0x20, 0xC2,
186 0x31, 0x00, 0x00, 0x1E, 0x01, 0x1D, 0x00, 0x72,
187 0x51, 0xD0, 0x1E, 0x20, 0x6E, 0x28, 0x55, 0x00,
188 0x20, 0xC2, 0x31, 0x00, 0x00, 0x1E, 0x02, 0x3A,
189 0x80, 0xD0, 0x72, 0x38, 0x2D, 0x40, 0x10, 0x2C,
190 0x45, 0x80, 0x20, 0xC2, 0x31, 0x00, 0x00, 0x1E,
191 0x01, 0x1D, 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40,
192 0x58, 0x2C, 0x45, 0x00, 0xC0, 0x6C, 0x00, 0x00,
193 0x00, 0x18, 0x01, 0x1D, 0x80, 0x18, 0x71, 0x1C,
194 0x16, 0x20, 0x58, 0x2C, 0x25, 0x00, 0xC0, 0x6C,
195 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00,
196 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC1,
197 };
198
199 static const struct rk628_csi_mode supported_modes[] = {
200 {
201 .width = 3840,
202 .height = 2160,
203 .max_fps = {
204 .numerator = 10000,
205 .denominator = 300000,
206 },
207 .hts_def = 4400,
208 .vts_def = 2250,
209 }, {
210 .width = 1920,
211 .height = 1080,
212 .max_fps = {
213 .numerator = 10000,
214 .denominator = 600000,
215 },
216 .hts_def = 2200,
217 .vts_def = 1125,
218 }, {
219 .width = 1280,
220 .height = 720,
221 .max_fps = {
222 .numerator = 10000,
223 .denominator = 600000,
224 },
225 .hts_def = 1650,
226 .vts_def = 750,
227 }, {
228 .width = 720,
229 .height = 576,
230 .max_fps = {
231 .numerator = 10000,
232 .denominator = 500000,
233 },
234 .hts_def = 864,
235 .vts_def = 625,
236 }, {
237 .width = 720,
238 .height = 480,
239 .max_fps = {
240 .numerator = 10000,
241 .denominator = 600000,
242 },
243 .hts_def = 858,
244 .vts_def = 525,
245 },
246 };
247
248 static struct v4l2_dv_timings dst_timing = {
249 .type = V4L2_DV_BT_656_1120,
250 .bt = {
251 .interlaced = V4L2_DV_PROGRESSIVE,
252 .width = 1920,
253 .height = 1080,
254 .hfrontporch = 88,
255 .hsync = 44,
256 .hbackporch = 148,
257 .vfrontporch = 4,
258 .vsync = 5,
259 .vbackporch = 36,
260 .pixelclock = 148500000,
261 },
262 };
263
264 static void rk628_post_process_setup(struct v4l2_subdev *sd);
265 static void rk628_csi_enable_interrupts(struct v4l2_subdev *sd, bool en);
266 static int rk628_csi_s_ctrl_detect_tx_5v(struct v4l2_subdev *sd);
267 static int rk628_csi_s_dv_timings(struct v4l2_subdev *sd,
268 struct v4l2_dv_timings *timings);
269 static int rk628_csi_s_edid(struct v4l2_subdev *sd,
270 struct v4l2_subdev_edid *edid);
271 static int mipi_dphy_power_on(struct rk628_csi *csi);
272 static void mipi_dphy_power_off(struct rk628_csi *csi);
273 static int rk628_hdmirx_phy_power_on(struct v4l2_subdev *sd);
274 static int rk628_hdmirx_phy_power_off(struct v4l2_subdev *sd);
275 static int rk628_hdmirx_phy_setup(struct v4l2_subdev *sd);
276 static void rk628_csi_format_change(struct v4l2_subdev *sd);
277 static void enable_stream(struct v4l2_subdev *sd, bool enable);
278 static void rk628_hdmirx_vid_enable(struct v4l2_subdev *sd, bool en);
279 static void rk628_csi_set_csi(struct v4l2_subdev *sd);
280 static void rk628_hdmirx_hpd_ctrl(struct v4l2_subdev *sd, bool en);
281 static void rk628_hdmirx_controller_reset(struct v4l2_subdev *sd);
282 static bool rk628_rcv_supported_res(struct v4l2_subdev *sd, u32 width,
283 u32 height);
284 static void rk628_dsi_set_scs(struct rk628_csi *csi);
285 static void rk628_dsi_enable(struct v4l2_subdev *sd);
286
to_csi(struct v4l2_subdev * sd)287 static inline struct rk628_csi *to_csi(struct v4l2_subdev *sd)
288 {
289 return container_of(sd, struct rk628_csi, sd);
290 }
291
tx_5v_power_present(struct v4l2_subdev * sd)292 static bool tx_5v_power_present(struct v4l2_subdev *sd)
293 {
294 bool ret;
295 int val, i, cnt;
296 struct rk628_csi *csi = to_csi(sd);
297
298 /* Direct Mode */
299 if (!csi->plugin_det_gpio)
300 return true;
301
302 cnt = 0;
303 for (i = 0; i < 5; i++) {
304 val = gpiod_get_value(csi->plugin_det_gpio);
305 if (val > 0)
306 cnt++;
307 usleep_range(500, 600);
308 }
309
310 ret = (cnt >= 3) ? true : false;
311 v4l2_dbg(1, debug, sd, "%s: %d\n", __func__, ret);
312
313 return ret;
314 }
315
no_signal(struct v4l2_subdev * sd)316 static inline bool no_signal(struct v4l2_subdev *sd)
317 {
318 struct rk628_csi *csi = to_csi(sd);
319
320 v4l2_dbg(1, debug, sd, "%s no signal:%d\n", __func__, csi->nosignal);
321 return csi->nosignal;
322 }
323
audio_present(struct v4l2_subdev * sd)324 static inline bool audio_present(struct v4l2_subdev *sd)
325 {
326 struct rk628_csi *csi = to_csi(sd);
327
328 return rk628_hdmirx_audio_present(csi->audio_info);
329 }
330
get_audio_sampling_rate(struct v4l2_subdev * sd)331 static int get_audio_sampling_rate(struct v4l2_subdev *sd)
332 {
333 struct rk628_csi *csi = to_csi(sd);
334
335 if (no_signal(sd))
336 return 0;
337
338 return rk628_hdmirx_audio_fs(csi->audio_info);
339 }
340
rk628_hdmirx_ctrl_enable(struct v4l2_subdev * sd,int en)341 static void rk628_hdmirx_ctrl_enable(struct v4l2_subdev *sd, int en)
342 {
343 u32 mask;
344 struct rk628_csi *csi = to_csi(sd);
345
346 if (en) {
347 /* don't enable audio until N CTS updated */
348 mask = HDMI_ENABLE_MASK;
349 v4l2_dbg(1, debug, sd, "%s: %#x %d\n", __func__, mask, en);
350 rk628_i2c_update_bits(csi->rk628, HDMI_RX_DMI_DISABLE_IF,
351 mask, HDMI_ENABLE(1) | AUD_ENABLE(1));
352 } else {
353 mask = AUD_ENABLE_MASK | HDMI_ENABLE_MASK;
354 v4l2_dbg(1, debug, sd, "%s: %#x %d\n", __func__, mask, en);
355 rk628_i2c_update_bits(csi->rk628, HDMI_RX_DMI_DISABLE_IF,
356 mask, HDMI_ENABLE(0) | AUD_ENABLE(0));
357 }
358 }
359
rk628_csi_get_detected_timings(struct v4l2_subdev * sd,struct v4l2_dv_timings * timings)360 static int rk628_csi_get_detected_timings(struct v4l2_subdev *sd,
361 struct v4l2_dv_timings *timings)
362 {
363 struct rk628_csi *csi = to_csi(sd);
364 struct v4l2_bt_timings *bt = &timings->bt;
365 u32 hact, vact, htotal, vtotal, fps, status;
366 u32 val;
367 u32 modetclk_cnt_hs, modetclk_cnt_vs, hs, vs;
368 u32 hofs_pix, hbp, hfp, vbp, vfp;
369 u32 tmds_clk, tmdsclk_cnt;
370 u64 tmp_data;
371 int retry = 0;
372
373 __retry:
374 memset(timings, 0, sizeof(struct v4l2_dv_timings));
375 timings->type = V4L2_DV_BT_656_1120;
376 rk628_i2c_read(csi->rk628, HDMI_RX_SCDC_REGS1, &val);
377 status = val;
378
379 rk628_i2c_read(csi->rk628, HDMI_RX_MD_STS, &val);
380 bt->interlaced = val & ILACE_STS ?
381 V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE;
382
383 rk628_i2c_read(csi->rk628, HDMI_RX_MD_HACT_PX, &val);
384 hact = val & 0xffff;
385 rk628_i2c_read(csi->rk628, HDMI_RX_MD_VAL, &val);
386 vact = val & 0xffff;
387 rk628_i2c_read(csi->rk628, HDMI_RX_MD_HT1, &val);
388 htotal = (val >> 16) & 0xffff;
389 rk628_i2c_read(csi->rk628, HDMI_RX_MD_VTL, &val);
390 vtotal = val & 0xffff;
391 rk628_i2c_read(csi->rk628, HDMI_RX_MD_HT1, &val);
392 hofs_pix = val & 0xffff;
393 rk628_i2c_read(csi->rk628, HDMI_RX_MD_VOL, &val);
394 vbp = (val & 0xffff) + 1;
395
396 rk628_i2c_read(csi->rk628, HDMI_RX_HDMI_CKM_RESULT, &val);
397 tmdsclk_cnt = val & 0xffff;
398 tmp_data = tmdsclk_cnt;
399 tmp_data = ((tmp_data * MODETCLK_HZ) + MODETCLK_CNT_NUM / 2);
400 do_div(tmp_data, MODETCLK_CNT_NUM);
401 tmds_clk = tmp_data;
402 if (!htotal || !vtotal) {
403 v4l2_err(&csi->sd, "timing err, htotal:%d, vtotal:%d\n",
404 htotal, vtotal);
405 if (retry++ < 5)
406 goto __retry;
407
408 goto TIMING_ERR;
409 }
410 fps = (tmds_clk + (htotal * vtotal) / 2) / (htotal * vtotal);
411
412 rk628_i2c_read(csi->rk628, HDMI_RX_MD_HT0, &val);
413 modetclk_cnt_hs = val & 0xffff;
414 hs = (tmdsclk_cnt * modetclk_cnt_hs + MODETCLK_CNT_NUM / 2) /
415 MODETCLK_CNT_NUM;
416
417 rk628_i2c_read(csi->rk628, HDMI_RX_MD_VSC, &val);
418 modetclk_cnt_vs = val & 0xffff;
419 vs = (tmdsclk_cnt * modetclk_cnt_vs + MODETCLK_CNT_NUM / 2) /
420 MODETCLK_CNT_NUM;
421 vs = (vs + htotal / 2) / htotal;
422
423 if ((hofs_pix < hs) || (htotal < (hact + hofs_pix)) ||
424 (vtotal < (vact + vs + vbp))) {
425 v4l2_err(sd, "timing err, total:%dx%d, act:%dx%d, hofs:%d, hs:%d, vs:%d, vbp:%d\n",
426 htotal, vtotal, hact, vact, hofs_pix, hs, vs, vbp);
427 goto TIMING_ERR;
428 }
429 hbp = hofs_pix - hs;
430 hfp = htotal - hact - hofs_pix;
431 vfp = vtotal - vact - vs - vbp;
432
433 v4l2_dbg(2, debug, sd, "cnt_num:%d, tmds_cnt:%d, hs_cnt:%d, vs_cnt:%d, hofs:%d\n",
434 MODETCLK_CNT_NUM, tmdsclk_cnt, modetclk_cnt_hs, modetclk_cnt_vs, hofs_pix);
435
436 bt->width = hact;
437 bt->height = vact;
438 bt->hfrontporch = hfp;
439 bt->hsync = hs;
440 bt->hbackporch = hbp;
441 bt->vfrontporch = vfp;
442 bt->vsync = vs;
443 bt->vbackporch = vbp;
444 bt->pixelclock = htotal * vtotal * fps;
445
446 if (bt->interlaced == V4L2_DV_INTERLACED) {
447 bt->height *= 2;
448 bt->il_vsync = bt->vsync + 1;
449 bt->pixelclock /= 2;
450 }
451
452 if (vact == 1080 && vtotal > 1500)
453 goto __retry;
454
455 v4l2_dbg(1, debug, sd, "SCDC_REGS1:%#x, act:%dx%d, total:%dx%d, fps:%d, pixclk:%llu\n",
456 status, hact, vact, htotal, vtotal, fps, bt->pixelclock);
457 v4l2_dbg(1, debug, sd, "hfp:%d, hs:%d, hbp:%d, vfp:%d, vs:%d, vbp:%d, interlace:%d\n",
458 bt->hfrontporch, bt->hsync, bt->hbackporch, bt->vfrontporch, bt->vsync,
459 bt->vbackporch, bt->interlaced);
460
461 csi->src_timings = *timings;
462 if (csi->scaler_en)
463 *timings = csi->timings;
464
465 return 0;
466
467 TIMING_ERR:
468 return -ENOLCK;
469 }
470
rk628_hdmirx_config_all(struct v4l2_subdev * sd)471 static void rk628_hdmirx_config_all(struct v4l2_subdev *sd)
472 {
473 int ret;
474 struct rk628_csi *csi = to_csi(sd);
475
476 rk628_hdmirx_controller_setup(csi->rk628);
477 ret = rk628_hdmirx_phy_setup(sd);
478 if (ret >= 0) {
479 rk628_csi_format_change(sd);
480 csi->nosignal = false;
481 }
482 }
483
rk628_csi_delayed_work_enable_hotplug(struct work_struct * work)484 static void rk628_csi_delayed_work_enable_hotplug(struct work_struct *work)
485 {
486 struct delayed_work *dwork = to_delayed_work(work);
487 struct rk628_csi *csi = container_of(dwork, struct rk628_csi,
488 delayed_work_enable_hotplug);
489 struct v4l2_subdev *sd = &csi->sd;
490 bool plugin;
491
492 mutex_lock(&csi->confctl_mutex);
493 csi->avi_rcv_rdy = false;
494 plugin = tx_5v_power_present(sd);
495 v4l2_dbg(1, debug, sd, "%s: 5v_det:%d\n", __func__, plugin);
496 if (plugin) {
497 rk628_csi_enable_interrupts(sd, false);
498 rk628_hdmirx_audio_setup(csi->audio_info);
499 rk628_hdmirx_set_hdcp(csi->rk628, &csi->hdcp, csi->enable_hdcp);
500 rk628_hdmirx_hpd_ctrl(sd, true);
501 rk628_hdmirx_config_all(sd);
502 rk628_csi_enable_interrupts(sd, true);
503 rk628_i2c_update_bits(csi->rk628, GRF_SYSTEM_CON0,
504 SW_I2S_DATA_OEN_MASK, SW_I2S_DATA_OEN(0));
505 } else {
506 rk628_csi_enable_interrupts(sd, false);
507 enable_stream(sd, false);
508 cancel_delayed_work(&csi->delayed_work_res_change);
509 rk628_hdmirx_audio_cancel_work_audio(csi->audio_info, true);
510 rk628_hdmirx_hpd_ctrl(sd, false);
511 rk628_hdmirx_phy_power_off(sd);
512 rk628_hdmirx_controller_reset(sd);
513 csi->nosignal = true;
514 }
515 mutex_unlock(&csi->confctl_mutex);
516 if (csi->plat_data->tx_mode == DSI_MODE && plugin)
517 enable_stream(sd, true);
518 }
519
rk628_check_resulotion_change(struct v4l2_subdev * sd)520 static int rk628_check_resulotion_change(struct v4l2_subdev *sd)
521 {
522 u32 val;
523 struct rk628_csi *csi = to_csi(sd);
524 u32 htotal, vtotal;
525 u32 old_htotal, old_vtotal;
526 struct v4l2_bt_timings *bt = &csi->src_timings.bt;
527
528 rk628_i2c_read(csi->rk628, HDMI_RX_MD_HT1, &val);
529 htotal = (val >> 16) & 0xffff;
530 rk628_i2c_read(csi->rk628, HDMI_RX_MD_VTL, &val);
531 vtotal = val & 0xffff;
532
533 old_htotal = bt->hfrontporch + bt->hsync + bt->width + bt->hbackporch;
534 old_vtotal = bt->vfrontporch + bt->vsync + bt->height + bt->vbackporch;
535
536 v4l2_dbg(1, debug, sd, "new mode: %d x %d\n", htotal, vtotal);
537 v4l2_dbg(1, debug, sd, "old mode: %d x %d\n", old_htotal, old_vtotal);
538
539 if (htotal != old_htotal || vtotal != old_vtotal)
540 return 1;
541
542 return 0;
543 }
544
rk628_delayed_work_res_change(struct work_struct * work)545 static void rk628_delayed_work_res_change(struct work_struct *work)
546 {
547 struct delayed_work *dwork = to_delayed_work(work);
548 struct rk628_csi *csi = container_of(dwork, struct rk628_csi,
549 delayed_work_res_change);
550 struct v4l2_subdev *sd = &csi->sd;
551 bool plugin;
552
553 mutex_lock(&csi->confctl_mutex);
554 csi->avi_rcv_rdy = false;
555 plugin = tx_5v_power_present(sd);
556 v4l2_dbg(1, debug, sd, "%s: 5v_det:%d\n", __func__, plugin);
557 if (plugin) {
558 if (rk628_check_resulotion_change(sd)) {
559 v4l2_dbg(1, debug, sd, "res change, recfg ctrler and phy!\n");
560 rk628_hdmirx_audio_cancel_work_audio(csi->audio_info, true);
561 rk628_hdmirx_phy_power_off(sd);
562 rk628_hdmirx_controller_reset(sd);
563 rk628_hdmirx_audio_setup(csi->audio_info);
564 rk628_hdmirx_set_hdcp(csi->rk628, &csi->hdcp, csi->enable_hdcp);
565 rk628_hdmirx_hpd_ctrl(sd, true);
566 rk628_hdmirx_config_all(sd);
567 rk628_csi_enable_interrupts(sd, true);
568 rk628_i2c_update_bits(csi->rk628, GRF_SYSTEM_CON0,
569 SW_I2S_DATA_OEN_MASK,
570 SW_I2S_DATA_OEN(0));
571 } else {
572 rk628_csi_format_change(sd);
573 csi->nosignal = false;
574 rk628_csi_enable_interrupts(sd, true);
575 }
576 }
577 mutex_unlock(&csi->confctl_mutex);
578 if (csi->plat_data->tx_mode == DSI_MODE && plugin)
579 rk628_dsi_enable(sd);
580 }
581
rk628_hdmirx_hpd_ctrl(struct v4l2_subdev * sd,bool en)582 static void rk628_hdmirx_hpd_ctrl(struct v4l2_subdev *sd, bool en)
583 {
584 u8 en_level, set_level;
585 struct rk628_csi *csi = to_csi(sd);
586
587 v4l2_dbg(1, debug, sd, "%s: %sable, hpd invert:%d\n", __func__,
588 en ? "en" : "dis", csi->hpd_output_inverted);
589 en_level = csi->hpd_output_inverted ? 0 : 1;
590 set_level = en ? en_level : !en_level;
591 rk628_i2c_update_bits(csi->rk628, HDMI_RX_HDMI_SETUP_CTRL,
592 HOT_PLUG_DETECT_MASK, HOT_PLUG_DETECT(set_level));
593 }
594
595
rk628_csi_s_ctrl_detect_tx_5v(struct v4l2_subdev * sd)596 static int rk628_csi_s_ctrl_detect_tx_5v(struct v4l2_subdev *sd)
597 {
598 struct rk628_csi *csi = to_csi(sd);
599
600 return v4l2_ctrl_s_ctrl(csi->detect_tx_5v_ctrl,
601 tx_5v_power_present(sd));
602 }
603
rk628_csi_s_ctrl_audio_sampling_rate(struct v4l2_subdev * sd)604 static int rk628_csi_s_ctrl_audio_sampling_rate(struct v4l2_subdev *sd)
605 {
606 struct rk628_csi *csi = to_csi(sd);
607
608 return v4l2_ctrl_s_ctrl(csi->audio_sampling_rate_ctrl,
609 get_audio_sampling_rate(sd));
610 }
611
rk628_csi_s_ctrl_audio_present(struct v4l2_subdev * sd)612 static int rk628_csi_s_ctrl_audio_present(struct v4l2_subdev *sd)
613 {
614 struct rk628_csi *csi = to_csi(sd);
615
616 return v4l2_ctrl_s_ctrl(csi->audio_present_ctrl,
617 audio_present(sd));
618 }
619
rk628_csi_update_controls(struct v4l2_subdev * sd)620 static int rk628_csi_update_controls(struct v4l2_subdev *sd)
621 {
622 int ret = 0;
623
624 ret |= rk628_csi_s_ctrl_detect_tx_5v(sd);
625 ret |= rk628_csi_s_ctrl_audio_sampling_rate(sd);
626 ret |= rk628_csi_s_ctrl_audio_present(sd);
627
628 return ret;
629 }
630
rk62_csi_reset(struct v4l2_subdev * sd)631 static void rk62_csi_reset(struct v4l2_subdev *sd)
632 {
633 struct rk628_csi *csi = to_csi(sd);
634
635 rk628_control_assert(csi->rk628, RGU_CSI);
636 udelay(10);
637 rk628_control_deassert(csi->rk628, RGU_CSI);
638
639 rk628_i2c_write(csi->rk628, CSITX_SYS_CTRL0_IMD, 0x1);
640 usleep_range(1000, 1100);
641 rk628_i2c_write(csi->rk628, CSITX_SYS_CTRL0_IMD, 0x0);
642 }
643
enable_csitx(struct v4l2_subdev * sd)644 static void enable_csitx(struct v4l2_subdev *sd)
645 {
646 u32 i, ret, val;
647 struct rk628_csi *csi = to_csi(sd);
648
649 for (i = 0; i < CSITX_ERR_RETRY_TIMES; i++) {
650 rk628_csi_set_csi(sd);
651 rk628_i2c_update_bits(csi->rk628, CSITX_CSITX_EN,
652 DPHY_EN_MASK |
653 CSITX_EN_MASK,
654 DPHY_EN(1) |
655 CSITX_EN(1));
656 rk628_i2c_write(csi->rk628, CSITX_CONFIG_DONE, CONFIG_DONE_IMD);
657 msleep(40);
658 rk628_i2c_write(csi->rk628, CSITX_ERR_INTR_CLR_IMD, 0xffffffff);
659 rk628_i2c_update_bits(csi->rk628, CSITX_SYS_CTRL1,
660 BYPASS_SELECT_MASK, BYPASS_SELECT(0));
661 rk628_i2c_write(csi->rk628, CSITX_CONFIG_DONE, CONFIG_DONE_IMD);
662 msleep(40);
663 ret = rk628_i2c_read(csi->rk628, CSITX_ERR_INTR_RAW_STATUS_IMD, &val);
664 if (!ret && !val)
665 break;
666
667 v4l2_err(sd, "%s csitx err, retry:%d, err status:%#x, ret:%d\n",
668 __func__, i, val, ret);
669 }
670 }
671
rk628_dsi_set_scs(struct rk628_csi * csi)672 static void rk628_dsi_set_scs(struct rk628_csi *csi)
673 {
674 u8 video_fmt;
675 u32 val;
676 int avi_rdy;
677
678 mutex_lock(&csi->confctl_mutex);
679 avi_rdy = rk628_is_avi_ready(csi->rk628, csi->avi_rcv_rdy);
680 mutex_unlock(&csi->confctl_mutex);
681
682 rk628_i2c_read(csi->rk628, HDMI_RX_PDEC_AVI_PB, &val);
683 video_fmt = (val & VIDEO_FORMAT_MASK) >> 5;
684 v4l2_info(&csi->sd, "%s PDEC_AVI_PB:%#x, video format:%d\n",
685 __func__, val, video_fmt);
686 if (video_fmt) {
687 if (csi->dsi.vid_mode == VIDEO_MODE)
688 rk628_i2c_write(csi->rk628, GRF_CSC_CTRL_CON,
689 SW_Y2R_EN(1) | SW_YUV2VYU_SWP(1));
690 else
691 rk628_i2c_write(csi->rk628, GRF_CSC_CTRL_CON,
692 SW_Y2R_EN(1) | SW_YUV2VYU_SWP(0));
693 } else {
694 if (csi->dsi.vid_mode == VIDEO_MODE)
695 rk628_i2c_write(csi->rk628, GRF_CSC_CTRL_CON,
696 SW_Y2R_EN(0) | SW_YUV2VYU_SWP(1));
697 else
698 rk628_i2c_write(csi->rk628, GRF_CSC_CTRL_CON,
699 SW_Y2R_EN(0) | SW_YUV2VYU_SWP(0));
700 }
701
702 /* if avi packet is not stable, reset ctrl*/
703 if (!avi_rdy) {
704 csi->nosignal = true;
705 schedule_delayed_work(&csi->delayed_work_enable_hotplug, HZ / 20);
706 }
707 }
708
rk628_dsi_enable(struct v4l2_subdev * sd)709 static void rk628_dsi_enable(struct v4l2_subdev *sd)
710 {
711 struct rk628_csi *csi = to_csi(sd);
712
713 rk628_post_process_setup(sd);
714
715 if (csi->txphy_pwron) {
716 v4l2_dbg(1, debug, sd,
717 "%s: txphy already power on, power off\n", __func__);
718 mipi_dphy_power_off(csi);
719 csi->txphy_pwron = false;
720 }
721
722 csi->dsi.rk628 = csi->rk628;
723 csi->dsi.timings = csi->timings;
724 csi->dsi.lane_mbps = csi->lane_mbps;
725 rk628_mipi_dsi_power_on(&csi->dsi);
726 csi->txphy_pwron = true;
727 v4l2_dbg(2, debug, sd, "%s: txphy power on!\n", __func__);
728 usleep_range(1000, 1500);
729 rk628_dsi_set_scs(csi);
730 }
731
enable_dsitx(struct v4l2_subdev * sd)732 static void enable_dsitx(struct v4l2_subdev *sd)
733 {
734 struct rk628_csi *csi = to_csi(sd);
735
736 /* rst for dsi0 */
737 rk628_control_assert(csi->rk628, RGU_DSI0);
738 usleep_range(20, 40);
739 rk628_control_deassert(csi->rk628, RGU_DSI0);
740 usleep_range(20, 40);
741
742 rk628_dsi_enable(sd);
743 }
744
rk628_dsi_enable_stream(struct v4l2_subdev * sd,bool en)745 static void rk628_dsi_enable_stream(struct v4l2_subdev *sd, bool en)
746 {
747 struct rk628_csi *csi = to_csi(sd);
748
749 if (en) {
750 rk628_hdmirx_vid_enable(sd, true);
751 rk628_i2c_write(csi->rk628, GRF_SCALER_CON0, SCL_EN(1));
752 rk628_dsi_set_scs(csi);
753 return;
754 }
755
756 rk628_hdmirx_vid_enable(sd, false);
757 rk628_i2c_write(csi->rk628, GRF_SCALER_CON0, SCL_EN(0));
758 }
759
enable_stream(struct v4l2_subdev * sd,bool en)760 static void enable_stream(struct v4l2_subdev *sd, bool en)
761 {
762 struct rk628_csi *csi = to_csi(sd);
763
764 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, en ? "en" : "dis");
765 if (en) {
766 rk628_hdmirx_vid_enable(sd, true);
767 if (csi->plat_data->tx_mode == DSI_MODE)
768 enable_dsitx(sd);
769 else
770 enable_csitx(sd);
771 } else {
772 if (csi->plat_data->tx_mode == CSI_MODE) {
773 rk628_hdmirx_vid_enable(sd, false);
774 rk628_i2c_update_bits(csi->rk628, CSITX_CSITX_EN,
775 DPHY_EN_MASK |
776 CSITX_EN_MASK,
777 DPHY_EN(0) |
778 CSITX_EN(0));
779 rk628_i2c_write(csi->rk628, CSITX_CONFIG_DONE,
780 CONFIG_DONE_IMD);
781 } else {
782 rk628_dsi_enable_stream(sd, en);
783 }
784 }
785 }
786
rk628_post_process_setup(struct v4l2_subdev * sd)787 static void rk628_post_process_setup(struct v4l2_subdev *sd)
788 {
789 struct rk628_csi *csi = to_csi(sd);
790 struct v4l2_bt_timings *bt = &csi->src_timings.bt;
791 struct v4l2_bt_timings *dst_bt = &csi->timings.bt;
792 struct videomode src, dst;
793 u64 dst_pclk;
794
795 src.hactive = bt->width;
796 src.hfront_porch = bt->hfrontporch;
797 src.hsync_len = bt->hsync;
798 src.hback_porch = bt->hbackporch;
799 src.vactive = bt->height;
800 src.vfront_porch = bt->vfrontporch;
801 src.vsync_len = bt->vsync;
802 src.vback_porch = bt->vbackporch;
803 src.pixelclock = bt->pixelclock;
804 src.flags = 0;
805 if (bt->interlaced == V4L2_DV_INTERLACED)
806 src.flags |= DISPLAY_FLAGS_INTERLACED;
807 if (!src.pixelclock) {
808 enable_stream(sd, false);
809 csi->nosignal = true;
810 schedule_delayed_work(&csi->delayed_work_enable_hotplug, HZ / 20);
811 return;
812 }
813
814 dst.hactive = dst_bt->width;
815 dst.hfront_porch = dst_bt->hfrontporch;
816 dst.hsync_len = dst_bt->hsync;
817 dst.hback_porch = dst_bt->hbackporch;
818 dst.vactive = dst_bt->height;
819 dst.vfront_porch = dst_bt->vfrontporch;
820 dst.vsync_len = dst_bt->vsync;
821 dst.vback_porch = dst_bt->vbackporch;
822 dst.pixelclock = dst_bt->pixelclock;
823
824 rk628_post_process_en(csi->rk628, &src, &dst, &dst_pclk);
825 dst_bt->pixelclock = dst_pclk;
826 }
827
rk628_csi_set_csi(struct v4l2_subdev * sd)828 static void rk628_csi_set_csi(struct v4l2_subdev *sd)
829 {
830 struct rk628_csi *csi = to_csi(sd);
831 u8 video_fmt;
832 u8 lanes = csi->csi_lanes_in_use;
833 u8 lane_num;
834 u8 dphy_lane_en;
835 u32 wc_usrdef, val;
836 int avi_rdy;
837
838 lane_num = lanes - 1;
839 dphy_lane_en = (1 << (lanes + 1)) - 1;
840 wc_usrdef = csi->timings.bt.width * 2;
841
842 rk62_csi_reset(sd);
843 rk628_post_process_setup(sd);
844
845 if (csi->txphy_pwron) {
846 v4l2_dbg(1, debug, sd,
847 "%s: txphy already power on, power off\n", __func__);
848 mipi_dphy_power_off(csi);
849 csi->txphy_pwron = false;
850 }
851
852 mipi_dphy_power_on(csi);
853 csi->txphy_pwron = true;
854 v4l2_dbg(2, debug, sd, "%s: txphy power on!\n", __func__);
855 usleep_range(1000, 1500);
856
857 rk628_i2c_update_bits(csi->rk628, CSITX_CSITX_EN,
858 VOP_UV_SWAP_MASK |
859 VOP_YUV422_EN_MASK |
860 VOP_P2_EN_MASK |
861 LANE_NUM_MASK |
862 DPHY_EN_MASK |
863 CSITX_EN_MASK,
864 VOP_UV_SWAP(1) |
865 VOP_YUV422_EN(1) |
866 VOP_P2_EN(1) |
867 LANE_NUM(lane_num) |
868 DPHY_EN(0) |
869 CSITX_EN(0));
870 rk628_i2c_update_bits(csi->rk628, CSITX_SYS_CTRL1,
871 BYPASS_SELECT_MASK,
872 BYPASS_SELECT(1));
873 rk628_i2c_write(csi->rk628, CSITX_CONFIG_DONE, CONFIG_DONE_IMD);
874 rk628_i2c_write(csi->rk628, CSITX_SYS_CTRL2, VOP_WHOLE_FRM_EN | VSYNC_ENABLE);
875 rk628_i2c_update_bits(csi->rk628, CSITX_SYS_CTRL3_IMD,
876 CONT_MODE_CLK_CLR_MASK |
877 CONT_MODE_CLK_SET_MASK |
878 NON_CONTINUOUS_MODE_MASK,
879 CONT_MODE_CLK_CLR(0) |
880 CONT_MODE_CLK_SET(0) |
881 NON_CONTINUOUS_MODE(1));
882
883 rk628_i2c_write(csi->rk628, CSITX_VOP_PATH_CTRL,
884 VOP_WC_USERDEFINE(wc_usrdef) |
885 VOP_DT_USERDEFINE(YUV422_8BIT) |
886 VOP_PIXEL_FORMAT(0) |
887 VOP_WC_USERDEFINE_EN(1) |
888 VOP_DT_USERDEFINE_EN(1) |
889 VOP_PATH_EN(1));
890 rk628_i2c_update_bits(csi->rk628, CSITX_DPHY_CTRL,
891 CSI_DPHY_EN_MASK,
892 CSI_DPHY_EN(dphy_lane_en));
893 rk628_i2c_write(csi->rk628, CSITX_CONFIG_DONE, CONFIG_DONE_IMD);
894 v4l2_dbg(1, debug, sd, "%s csi cofig done\n", __func__);
895
896 mutex_lock(&csi->confctl_mutex);
897 avi_rdy = rk628_is_avi_ready(csi->rk628, csi->avi_rcv_rdy);
898 mutex_unlock(&csi->confctl_mutex);
899
900 rk628_i2c_read(csi->rk628, HDMI_RX_PDEC_AVI_PB, &val);
901 video_fmt = (val & VIDEO_FORMAT_MASK) >> 5;
902 v4l2_dbg(1, debug, &csi->sd, "%s PDEC_AVI_PB:%#x, video format:%d\n",
903 __func__, val, video_fmt);
904 if (video_fmt) {
905 /* yuv data: cfg SW_YUV2VYU_SWP */
906 rk628_i2c_write(csi->rk628, GRF_CSC_CTRL_CON,
907 SW_YUV2VYU_SWP(1) |
908 SW_R2Y_EN(0));
909 } else {
910 /* rgb data: cfg SW_R2Y_EN */
911 rk628_i2c_write(csi->rk628, GRF_CSC_CTRL_CON,
912 SW_YUV2VYU_SWP(0) |
913 SW_R2Y_EN(1));
914 }
915
916 /* if avi packet is not stable, reset ctrl*/
917 if (!avi_rdy) {
918 csi->nosignal = true;
919 schedule_delayed_work(&csi->delayed_work_enable_hotplug, HZ / 20);
920 }
921 }
922
rk628_hdmirx_phy_power_on(struct v4l2_subdev * sd)923 static int rk628_hdmirx_phy_power_on(struct v4l2_subdev *sd)
924 {
925 struct rk628_csi *csi = to_csi(sd);
926 int ret, f;
927
928 /* Bit31 is used to distinguish HDMI cable mode and direct connection
929 * mode in the rk628_combrxphy driver.
930 * Bit31: 0 -direct connection mode;
931 * 1 -cable mode;
932 * The cable mode is to know the input clock frequency through cdr_mode
933 * in the rk628_combrxphy driver, and the cable mode supports up to
934 * 297M, so 297M is passed uniformly here.
935 */
936 f = 297000 | BIT(31);
937
938 if (csi->rxphy_pwron) {
939 v4l2_dbg(1, debug, sd, "rxphy already power on, power off!\n");
940 ret = rk628_rxphy_power_off(csi->rk628);
941 if (ret)
942 v4l2_err(sd, "hdmi rxphy power off failed!\n");
943 else
944 csi->rxphy_pwron = false;
945 usleep_range(100, 110);
946 }
947
948 if (csi->rxphy_pwron == false) {
949 rk628_hdmirx_ctrl_enable(sd, 0);
950 ret = rk628_rxphy_power_on(csi->rk628, f);
951 if (ret) {
952 csi->rxphy_pwron = false;
953 v4l2_err(sd, "hdmi rxphy power on failed\n");
954 } else {
955 csi->rxphy_pwron = true;
956 }
957 rk628_hdmirx_ctrl_enable(sd, 1);
958 msleep(100);
959 }
960
961 return ret;
962 }
963
rk628_hdmirx_phy_power_off(struct v4l2_subdev * sd)964 static int rk628_hdmirx_phy_power_off(struct v4l2_subdev *sd)
965 {
966 struct rk628_csi *csi = to_csi(sd);
967
968 if (csi->rxphy_pwron) {
969 v4l2_dbg(1, debug, sd, "rxphy power off!\n");
970 rk628_rxphy_power_off(csi->rk628);
971 csi->rxphy_pwron = false;
972 }
973 usleep_range(100, 100);
974
975 return 0;
976 }
977
rk628_hdmirx_vid_enable(struct v4l2_subdev * sd,bool en)978 static void rk628_hdmirx_vid_enable(struct v4l2_subdev *sd, bool en)
979 {
980 struct rk628_csi *csi = to_csi(sd);
981
982 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, en ? "en" : "dis");
983 if (en) {
984 if (!csi->i2s_enable_default)
985 rk628_hdmirx_audio_i2s_ctrl(csi->audio_info, true);
986 rk628_i2c_update_bits(csi->rk628, HDMI_RX_DMI_DISABLE_IF,
987 VID_ENABLE_MASK, VID_ENABLE(1));
988 } else {
989 if (!csi->i2s_enable_default)
990 rk628_hdmirx_audio_i2s_ctrl(csi->audio_info, false);
991 rk628_i2c_update_bits(csi->rk628, HDMI_RX_DMI_DISABLE_IF,
992 VID_ENABLE_MASK, VID_ENABLE(0));
993 }
994 }
995
rk628_hdmirx_controller_reset(struct v4l2_subdev * sd)996 static void rk628_hdmirx_controller_reset(struct v4l2_subdev *sd)
997 {
998 struct rk628_csi *csi = to_csi(sd);
999
1000 v4l2_dbg(1, debug, sd, "%s reset hdmirx_controller\n", __func__);
1001 rk628_control_assert(csi->rk628, RGU_HDMIRX_PON);
1002 udelay(10);
1003 rk628_control_deassert(csi->rk628, RGU_HDMIRX_PON);
1004 udelay(10);
1005 rk628_i2c_write(csi->rk628, HDMI_RX_DMI_SW_RST, 0x000101ff);
1006 rk628_i2c_write(csi->rk628, HDMI_RX_DMI_DISABLE_IF, 0x00000000);
1007 rk628_i2c_write(csi->rk628, HDMI_RX_DMI_DISABLE_IF, 0x0000017f);
1008 rk628_i2c_write(csi->rk628, HDMI_RX_DMI_DISABLE_IF, 0x0001017f);
1009 }
1010
rk628_rcv_supported_res(struct v4l2_subdev * sd,u32 width,u32 height)1011 static bool rk628_rcv_supported_res(struct v4l2_subdev *sd, u32 width,
1012 u32 height)
1013 {
1014 u32 i;
1015
1016 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
1017 if ((supported_modes[i].width == width) &&
1018 (supported_modes[i].height == height)) {
1019 break;
1020 }
1021 }
1022 if (i == ARRAY_SIZE(supported_modes)) {
1023 v4l2_err(sd, "%s do not support res wxh: %dx%d\n", __func__,
1024 width, height);
1025 return false;
1026 } else {
1027 return true;
1028 }
1029 }
1030
rk628_hdmirx_phy_setup(struct v4l2_subdev * sd)1031 static int rk628_hdmirx_phy_setup(struct v4l2_subdev *sd)
1032 {
1033 u32 i, cnt, val;
1034 u32 width, height, frame_width, frame_height, status;
1035 struct rk628_csi *csi = to_csi(sd);
1036 int ret;
1037
1038 for (i = 0; i < RXPHY_CFG_MAX_TIMES; i++) {
1039 ret = rk628_hdmirx_phy_power_on(sd);
1040 if (ret < 0) {
1041 msleep(50);
1042 continue;
1043 }
1044 cnt = 0;
1045
1046 do {
1047 cnt++;
1048 rk628_i2c_read(csi->rk628, HDMI_RX_MD_HACT_PX, &val);
1049 width = val & 0xffff;
1050 rk628_i2c_read(csi->rk628, HDMI_RX_MD_VAL, &val);
1051 height = val & 0xffff;
1052 rk628_i2c_read(csi->rk628, HDMI_RX_MD_HT1, &val);
1053 frame_width = (val >> 16) & 0xffff;
1054 rk628_i2c_read(csi->rk628, HDMI_RX_MD_VTL, &val);
1055 frame_height = val & 0xffff;
1056 rk628_i2c_read(csi->rk628, HDMI_RX_SCDC_REGS1, &val);
1057 status = val;
1058 v4l2_dbg(1, debug, sd, "%s read wxh:%dx%d, total:%dx%d, SCDC_REGS1:%#x, cnt:%d\n",
1059 __func__, width, height, frame_width, frame_height, status, cnt);
1060
1061 rk628_i2c_read(csi->rk628, HDMI_RX_PDEC_STS, &val);
1062 if (val & DVI_DET)
1063 dev_info(csi->dev, "DVI mode detected\n");
1064
1065 if (!tx_5v_power_present(sd)) {
1066 v4l2_info(sd, "HDMI pull out, return!\n");
1067 return -1;
1068 }
1069
1070 if (cnt >= 15)
1071 break;
1072 } while (((status & 0xfff) != 0xf00) ||
1073 (!rk628_rcv_supported_res(sd, width, height)));
1074
1075 if (((status & 0xfff) != 0xf00) ||
1076 (!rk628_rcv_supported_res(sd, width, height))) {
1077 v4l2_err(sd, "%s hdmi rxphy lock failed, retry:%d\n",
1078 __func__, i);
1079 continue;
1080 } else {
1081 break;
1082 }
1083 }
1084
1085 if (i == RXPHY_CFG_MAX_TIMES)
1086 return -1;
1087
1088 return 0;
1089 }
1090
rk628_csi_initial_setup(struct v4l2_subdev * sd)1091 static void rk628_csi_initial_setup(struct v4l2_subdev *sd)
1092 {
1093 struct rk628_csi *csi = to_csi(sd);
1094 struct v4l2_subdev_edid def_edid;
1095
1096 /* selete int io function */
1097 rk628_i2c_write(csi->rk628, GRF_GPIO3AB_SEL_CON, 0x30002000);
1098 rk628_i2c_write(csi->rk628, GRF_GPIO1AB_SEL_CON, HIWORD_UPDATE(0x7, 10, 8));
1099 /* I2S_SCKM0 */
1100 rk628_i2c_write(csi->rk628, GRF_GPIO0AB_SEL_CON, HIWORD_UPDATE(0x1, 2, 2));
1101 /* I2SLR_M0 */
1102 rk628_i2c_write(csi->rk628, GRF_GPIO0AB_SEL_CON, HIWORD_UPDATE(0x1, 3, 3));
1103 /* I2SM0D0 */
1104 rk628_i2c_write(csi->rk628, GRF_GPIO0AB_SEL_CON, HIWORD_UPDATE(0x1, 5, 4));
1105 /* hdmirx int en */
1106 rk628_i2c_write(csi->rk628, GRF_INTR0_EN, 0x01000100);
1107
1108 udelay(10);
1109 rk628_control_assert(csi->rk628, RGU_HDMIRX);
1110 rk628_control_assert(csi->rk628, RGU_HDMIRX_PON);
1111 rk628_control_assert(csi->rk628, RGU_CSI);
1112 udelay(10);
1113 rk628_control_deassert(csi->rk628, RGU_HDMIRX);
1114 rk628_control_deassert(csi->rk628, RGU_HDMIRX_PON);
1115 rk628_control_deassert(csi->rk628, RGU_CSI);
1116 udelay(10);
1117
1118 rk628_i2c_update_bits(csi->rk628, GRF_SYSTEM_CON0,
1119 SW_INPUT_MODE_MASK |
1120 SW_OUTPUT_MODE_MASK |
1121 SW_EFUSE_HDCP_EN_MASK |
1122 SW_HSYNC_POL_MASK |
1123 SW_VSYNC_POL_MASK,
1124 SW_INPUT_MODE(INPUT_MODE_HDMI) |
1125 SW_OUTPUT_MODE(OUTPUT_MODE_CSI) |
1126 SW_EFUSE_HDCP_EN(0) |
1127 SW_HSYNC_POL(1) |
1128 SW_VSYNC_POL(1));
1129 rk628_hdmirx_controller_reset(sd);
1130
1131 def_edid.pad = 0;
1132 def_edid.start_block = 0;
1133 def_edid.blocks = 2;
1134 def_edid.edid = edid_init_data;
1135 rk628_csi_s_edid(sd, &def_edid);
1136 rk628_hdmirx_set_hdcp(csi->rk628, &csi->hdcp, false);
1137
1138 if (csi->plat_data->tx_mode == CSI_MODE) {
1139 mipi_dphy_reset(csi->rk628);
1140 mipi_dphy_power_on(csi);
1141 }
1142 csi->txphy_pwron = true;
1143 if (tx_5v_power_present(sd))
1144 schedule_delayed_work(&csi->delayed_work_enable_hotplug, msecs_to_jiffies(1000));
1145 }
1146
rk628_csi_format_change(struct v4l2_subdev * sd)1147 static void rk628_csi_format_change(struct v4l2_subdev *sd)
1148 {
1149 struct rk628_csi *csi = to_csi(sd);
1150 struct v4l2_dv_timings timings;
1151 const struct v4l2_event rk628_csi_ev_fmt = {
1152 .type = V4L2_EVENT_SOURCE_CHANGE,
1153 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
1154 };
1155
1156 rk628_csi_get_detected_timings(sd, &timings);
1157 if (!v4l2_match_dv_timings(&csi->timings, &timings, 0, false)) {
1158 /* automatically set timing rather than set by userspace */
1159 rk628_csi_s_dv_timings(sd, &timings);
1160 v4l2_print_dv_timings(sd->name,
1161 "rk628_csi_format_change: New format: ",
1162 &timings, false);
1163 }
1164
1165 if (sd->devnode)
1166 v4l2_subdev_notify_event(sd, &rk628_csi_ev_fmt);
1167 }
1168
rk628_csi_enable_interrupts(struct v4l2_subdev * sd,bool en)1169 static void rk628_csi_enable_interrupts(struct v4l2_subdev *sd, bool en)
1170 {
1171 u32 pdec_ien, md_ien;
1172 u32 pdec_mask = 0, md_mask = 0;
1173 struct rk628_csi *csi = to_csi(sd);
1174
1175 pdec_mask |= AVI_RCV_ENSET;
1176 md_mask = VACT_LIN_ENSET | HACT_PIX_ENSET | HS_CLK_ENSET |
1177 DE_ACTIVITY_ENSET | VS_ACT_ENSET | HS_ACT_ENSET;
1178 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, en ? "en" : "dis");
1179 /* clr irq */
1180 rk628_i2c_write(csi->rk628, HDMI_RX_MD_ICLR, md_mask);
1181 rk628_i2c_write(csi->rk628, HDMI_RX_PDEC_ICLR, pdec_mask);
1182 if (en) {
1183 rk628_i2c_write(csi->rk628, HDMI_RX_MD_IEN_SET, md_mask);
1184 rk628_i2c_write(csi->rk628, HDMI_RX_PDEC_IEN_SET, pdec_mask);
1185 csi->vid_ints_en = true;
1186 } else {
1187 rk628_i2c_write(csi->rk628, HDMI_RX_MD_IEN_CLR, md_mask);
1188 rk628_i2c_write(csi->rk628, HDMI_RX_PDEC_IEN_CLR, pdec_mask);
1189 rk628_i2c_write(csi->rk628, HDMI_RX_AUD_FIFO_IEN_CLR, 0x1f);
1190 csi->vid_ints_en = false;
1191 }
1192 usleep_range(5000, 5000);
1193 rk628_i2c_read(csi->rk628, HDMI_RX_MD_IEN, &md_ien);
1194 rk628_i2c_read(csi->rk628, HDMI_RX_PDEC_IEN, &pdec_ien);
1195 v4l2_dbg(1, debug, sd, "%s MD_IEN:%#x, PDEC_IEN:%#x\n", __func__, md_ien, pdec_ien);
1196 }
1197
rk628_csi_isr(struct v4l2_subdev * sd,u32 status,bool * handled)1198 static int rk628_csi_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
1199 {
1200 u32 md_ints, pdec_ints, fifo_ints, hact, vact;
1201 bool plugin;
1202 struct rk628_csi *csi = to_csi(sd);
1203 void *audio_info = csi->audio_info;
1204
1205 if (handled == NULL) {
1206 v4l2_err(sd, "handled NULL, err return!\n");
1207 return -EINVAL;
1208 }
1209 rk628_i2c_read(csi->rk628, HDMI_RX_PDEC_ISTS, &pdec_ints);
1210 if (rk628_audio_ctsnints_enabled(audio_info)) {
1211 if (pdec_ints & (ACR_N_CHG_ICLR | ACR_CTS_CHG_ICLR)) {
1212 rk628_csi_isr_ctsn(audio_info, pdec_ints);
1213 pdec_ints &= ~(ACR_CTS_CHG_ICLR | ACR_CTS_CHG_ICLR);
1214 *handled = true;
1215 }
1216 }
1217 if (rk628_audio_fifoints_enabled(audio_info)) {
1218 rk628_i2c_read(csi->rk628, HDMI_RX_AUD_FIFO_ISTS, &fifo_ints);
1219 if (fifo_ints & 0x18) {
1220 rk628_csi_isr_fifoints(audio_info, fifo_ints);
1221 *handled = true;
1222 }
1223 }
1224 if (csi->vid_ints_en) {
1225 rk628_i2c_read(csi->rk628, HDMI_RX_MD_ISTS, &md_ints);
1226 plugin = tx_5v_power_present(sd);
1227 v4l2_dbg(1, debug, sd, "%s: md_ints: %#x, pdec_ints:%#x, plugin: %d\n",
1228 __func__, md_ints, pdec_ints, plugin);
1229
1230 if ((md_ints & (VACT_LIN_ISTS | HACT_PIX_ISTS |
1231 HS_CLK_ISTS | DE_ACTIVITY_ISTS |
1232 VS_ACT_ISTS | HS_ACT_ISTS))
1233 && plugin) {
1234
1235 rk628_i2c_read(csi->rk628, HDMI_RX_MD_HACT_PX, &hact);
1236 rk628_i2c_read(csi->rk628, HDMI_RX_MD_VAL, &vact);
1237 v4l2_dbg(1, debug, sd, "%s: HACT:%#x, VACT:%#x\n",
1238 __func__, hact, vact);
1239
1240 rk628_csi_enable_interrupts(sd, false);
1241 enable_stream(sd, false);
1242 csi->nosignal = true;
1243 schedule_delayed_work(&csi->delayed_work_res_change, HZ / 2);
1244
1245 v4l2_dbg(1, debug, sd, "%s: hact/vact change, md_ints: %#x\n",
1246 __func__, (u32)(md_ints & (VACT_LIN_ISTS | HACT_PIX_ISTS)));
1247 *handled = true;
1248 }
1249
1250 if ((pdec_ints & AVI_RCV_ISTS) && plugin && !csi->avi_rcv_rdy) {
1251 v4l2_dbg(1, debug, sd, "%s: AVI RCV INT!\n", __func__);
1252 if (csi->plat_data->tx_mode == DSI_MODE)
1253 enable_stream(sd, false);
1254 csi->avi_rcv_rdy = true;
1255 /* After get the AVI_RCV interrupt state, disable interrupt. */
1256 rk628_i2c_write(csi->rk628, HDMI_RX_PDEC_IEN_CLR, AVI_RCV_ISTS);
1257
1258 *handled = true;
1259 }
1260 }
1261 if (*handled != true)
1262 v4l2_dbg(1, debug, sd, "%s: unhandled interrupt!\n", __func__);
1263
1264 /* clear interrupts */
1265 rk628_i2c_write(csi->rk628, HDMI_RX_MD_ICLR, 0xffffffff);
1266 rk628_i2c_write(csi->rk628, HDMI_RX_PDEC_ICLR, 0xffffffff);
1267 rk628_i2c_write(csi->rk628, GRF_INTR0_CLR_EN, 0x01000100);
1268
1269 return 0;
1270 }
1271
rk628_csi_irq_handler(int irq,void * dev_id)1272 static irqreturn_t rk628_csi_irq_handler(int irq, void *dev_id)
1273 {
1274 struct rk628_csi *csi = dev_id;
1275 bool handled = false;
1276
1277 rk628_csi_isr(&csi->sd, 0, &handled);
1278
1279 return handled ? IRQ_HANDLED : IRQ_NONE;
1280 }
1281
rk628_csi_irq_poll_timer(struct timer_list * t)1282 static void rk628_csi_irq_poll_timer(struct timer_list *t)
1283 {
1284 struct rk628_csi *csi = from_timer(csi, t, timer);
1285
1286 schedule_work(&csi->work_i2c_poll);
1287 mod_timer(&csi->timer, jiffies + msecs_to_jiffies(POLL_INTERVAL_MS));
1288 }
1289
rk628_csi_work_i2c_poll(struct work_struct * work)1290 static void rk628_csi_work_i2c_poll(struct work_struct *work)
1291 {
1292 struct rk628_csi *csi = container_of(work, struct rk628_csi,
1293 work_i2c_poll);
1294 struct v4l2_subdev *sd = &csi->sd;
1295
1296 rk628_csi_format_change(sd);
1297 }
1298
rk628_csi_subscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1299 static int rk628_csi_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1300 struct v4l2_event_subscription *sub)
1301 {
1302 switch (sub->type) {
1303 case V4L2_EVENT_SOURCE_CHANGE:
1304 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
1305 case V4L2_EVENT_CTRL:
1306 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
1307 default:
1308 return -EINVAL;
1309 }
1310 }
1311
rk628_csi_g_input_status(struct v4l2_subdev * sd,u32 * status)1312 static int rk628_csi_g_input_status(struct v4l2_subdev *sd, u32 *status)
1313 {
1314 struct rk628_csi *csi = to_csi(sd);
1315 static u8 cnt;
1316
1317 *status = 0;
1318 *status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0;
1319
1320 if (no_signal(sd) && tx_5v_power_present(sd)) {
1321 if (cnt++ >= 6) {
1322 cnt = 0;
1323 v4l2_info(sd, "no signal but 5v_det, recfg hdmirx!\n");
1324 schedule_delayed_work(&csi->delayed_work_enable_hotplug,
1325 HZ / 20);
1326 }
1327 } else {
1328 cnt = 0;
1329 }
1330
1331 v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status);
1332
1333 return 0;
1334 }
1335
rk628_csi_s_dv_timings(struct v4l2_subdev * sd,struct v4l2_dv_timings * timings)1336 static int rk628_csi_s_dv_timings(struct v4l2_subdev *sd,
1337 struct v4l2_dv_timings *timings)
1338 {
1339 struct rk628_csi *csi = to_csi(sd);
1340
1341 if (!timings)
1342 return -EINVAL;
1343
1344 if (debug)
1345 v4l2_print_dv_timings(sd->name, "rk628_csi_s_dv_timings: ",
1346 timings, false);
1347
1348 if (v4l2_match_dv_timings(&csi->timings, timings, 0, false)) {
1349 v4l2_dbg(1, debug, sd, "%s: no change\n", __func__);
1350 return 0;
1351 }
1352
1353 if (!v4l2_valid_dv_timings(timings, &rk628_csi_timings_cap, NULL,
1354 NULL)) {
1355 v4l2_dbg(1, debug, sd, "%s: timings out of range\n", __func__);
1356 return -ERANGE;
1357 }
1358
1359 csi->timings = *timings;
1360 enable_stream(sd, false);
1361
1362 return 0;
1363 }
1364
rk628_csi_g_dv_timings(struct v4l2_subdev * sd,struct v4l2_dv_timings * timings)1365 static int rk628_csi_g_dv_timings(struct v4l2_subdev *sd,
1366 struct v4l2_dv_timings *timings)
1367 {
1368 struct rk628_csi *csi = to_csi(sd);
1369
1370 *timings = csi->timings;
1371
1372 return 0;
1373 }
1374
rk628_csi_enum_dv_timings(struct v4l2_subdev * sd,struct v4l2_enum_dv_timings * timings)1375 static int rk628_csi_enum_dv_timings(struct v4l2_subdev *sd,
1376 struct v4l2_enum_dv_timings *timings)
1377 {
1378 if (timings->pad != 0)
1379 return -EINVAL;
1380
1381 return v4l2_enum_dv_timings_cap(timings, &rk628_csi_timings_cap, NULL,
1382 NULL);
1383 }
1384
rk628_csi_query_dv_timings(struct v4l2_subdev * sd,struct v4l2_dv_timings * timings)1385 static int rk628_csi_query_dv_timings(struct v4l2_subdev *sd,
1386 struct v4l2_dv_timings *timings)
1387 {
1388 int ret;
1389 struct rk628_csi *csi = to_csi(sd);
1390
1391 mutex_lock(&csi->confctl_mutex);
1392 ret = rk628_csi_get_detected_timings(sd, timings);
1393 mutex_unlock(&csi->confctl_mutex);
1394 if (ret)
1395 return ret;
1396
1397 if (debug)
1398 v4l2_print_dv_timings(sd->name, "rk628_csi_query_dv_timings: ",
1399 timings, false);
1400
1401 if (!v4l2_valid_dv_timings(timings, &rk628_csi_timings_cap, NULL,
1402 NULL)) {
1403 v4l2_dbg(1, debug, sd, "%s: timings out of range\n", __func__);
1404 return -ERANGE;
1405 }
1406
1407 return 0;
1408 }
1409
rk628_csi_dv_timings_cap(struct v4l2_subdev * sd,struct v4l2_dv_timings_cap * cap)1410 static int rk628_csi_dv_timings_cap(struct v4l2_subdev *sd,
1411 struct v4l2_dv_timings_cap *cap)
1412 {
1413 if (cap->pad != 0)
1414 return -EINVAL;
1415
1416 *cap = rk628_csi_timings_cap;
1417
1418 return 0;
1419 }
1420
rk628_csi_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad,struct v4l2_mbus_config * cfg)1421 static int rk628_csi_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad,
1422 struct v4l2_mbus_config *cfg)
1423 {
1424 struct rk628_csi *csi = to_csi(sd);
1425
1426 cfg->type = V4L2_MBUS_CSI2_DPHY;
1427 cfg->flags = V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1428
1429 switch (csi->csi_lanes_in_use) {
1430 case 1:
1431 cfg->flags |= V4L2_MBUS_CSI2_1_LANE;
1432 break;
1433 case 2:
1434 cfg->flags |= V4L2_MBUS_CSI2_2_LANE;
1435 break;
1436 case 3:
1437 cfg->flags |= V4L2_MBUS_CSI2_3_LANE;
1438 break;
1439 case 4:
1440 cfg->flags |= V4L2_MBUS_CSI2_4_LANE;
1441 break;
1442 default:
1443 return -EINVAL;
1444 }
1445
1446 return 0;
1447 }
1448
rk628_csi_s_stream(struct v4l2_subdev * sd,int enable)1449 static int rk628_csi_s_stream(struct v4l2_subdev *sd, int enable)
1450 {
1451 struct rk628_csi *csi = to_csi(sd);
1452
1453 if (csi->plat_data->tx_mode == CSI_MODE)
1454 enable_stream(sd, enable);
1455 else
1456 rk628_dsi_enable_stream(sd, enable);
1457
1458 return 0;
1459 }
1460
rk628_csi_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)1461 static int rk628_csi_enum_mbus_code(struct v4l2_subdev *sd,
1462 struct v4l2_subdev_pad_config *cfg,
1463 struct v4l2_subdev_mbus_code_enum *code)
1464 {
1465 struct rk628_csi *csi = to_csi(sd);
1466
1467 switch (code->index) {
1468 case 0:
1469 code->code = csi->plat_data->bus_fmt;
1470 break;
1471
1472 default:
1473 return -EINVAL;
1474 }
1475
1476 return 0;
1477 }
1478
rk628_csi_get_ctrl(struct v4l2_ctrl * ctrl)1479 static int rk628_csi_get_ctrl(struct v4l2_ctrl *ctrl)
1480 {
1481 int ret = -1;
1482 struct rk628_csi *csi = container_of(ctrl->handler, struct rk628_csi,
1483 hdl);
1484 struct v4l2_subdev *sd = &(csi->sd);
1485
1486 if (ctrl->id == V4L2_CID_DV_RX_POWER_PRESENT) {
1487 ret = tx_5v_power_present(sd);
1488 *ctrl->p_new.p_s32 = ret;
1489 }
1490
1491 return ret;
1492 }
1493
rk628_csi_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)1494 static int rk628_csi_enum_frame_sizes(struct v4l2_subdev *sd,
1495 struct v4l2_subdev_pad_config *cfg,
1496 struct v4l2_subdev_frame_size_enum *fse)
1497 {
1498 struct rk628_csi *csi = to_csi(sd);
1499
1500 if (fse->index >= ARRAY_SIZE(supported_modes))
1501 return -EINVAL;
1502
1503 if (fse->code != csi->plat_data->bus_fmt)
1504 return -EINVAL;
1505
1506 fse->min_width = supported_modes[fse->index].width;
1507 fse->max_width = supported_modes[fse->index].width;
1508 fse->max_height = supported_modes[fse->index].height;
1509 fse->min_height = supported_modes[fse->index].height;
1510
1511 return 0;
1512 }
1513
rk628_csi_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1514 static int rk628_csi_enum_frame_interval(struct v4l2_subdev *sd,
1515 struct v4l2_subdev_pad_config *cfg,
1516 struct v4l2_subdev_frame_interval_enum *fie)
1517 {
1518 struct rk628_csi *csi = to_csi(sd);
1519
1520 if (fie->index >= ARRAY_SIZE(supported_modes))
1521 return -EINVAL;
1522
1523 fie->code = csi->plat_data->bus_fmt;
1524
1525 fie->width = supported_modes[fie->index].width;
1526 fie->height = supported_modes[fie->index].height;
1527 fie->interval = supported_modes[fie->index].max_fps;
1528 return 0;
1529 }
1530
rk628_csi_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)1531 static int rk628_csi_get_fmt(struct v4l2_subdev *sd,
1532 struct v4l2_subdev_pad_config *cfg,
1533 struct v4l2_subdev_format *format)
1534 {
1535 struct rk628_csi *csi = to_csi(sd);
1536
1537 mutex_lock(&csi->confctl_mutex);
1538 format->format.code = csi->mbus_fmt_code;
1539 format->format.width = csi->timings.bt.width;
1540 format->format.height = csi->timings.bt.height;
1541 format->format.field = csi->timings.bt.interlaced ?
1542 V4L2_FIELD_INTERLACED : V4L2_FIELD_NONE;
1543 mutex_unlock(&csi->confctl_mutex);
1544
1545 v4l2_dbg(1, debug, sd, "%s: fmt code:%d, w:%d, h:%d, field code:%d\n",
1546 __func__, format->format.code, format->format.width,
1547 format->format.height, format->format.field);
1548
1549 return 0;
1550 }
1551
rk628_csi_get_reso_dist(const struct rk628_csi_mode * mode,struct v4l2_mbus_framefmt * framefmt)1552 static int rk628_csi_get_reso_dist(const struct rk628_csi_mode *mode,
1553 struct v4l2_mbus_framefmt *framefmt)
1554 {
1555 return abs(mode->width - framefmt->width) +
1556 abs(mode->height - framefmt->height);
1557 }
1558
1559 static const struct rk628_csi_mode *
rk628_csi_find_best_fit(struct v4l2_subdev_format * fmt)1560 rk628_csi_find_best_fit(struct v4l2_subdev_format *fmt)
1561 {
1562 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
1563 int dist;
1564 int cur_best_fit = 0;
1565 int cur_best_fit_dist = -1;
1566 unsigned int i;
1567
1568 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
1569 dist = rk628_csi_get_reso_dist(&supported_modes[i], framefmt);
1570 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
1571 cur_best_fit_dist = dist;
1572 cur_best_fit = i;
1573 }
1574 }
1575
1576 return &supported_modes[cur_best_fit];
1577 }
1578
rk628_csi_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)1579 static int rk628_csi_set_fmt(struct v4l2_subdev *sd,
1580 struct v4l2_subdev_pad_config *cfg,
1581 struct v4l2_subdev_format *format)
1582 {
1583 struct rk628_csi *csi = to_csi(sd);
1584 const struct rk628_csi_mode *mode;
1585
1586 u32 code = format->format.code; /* is overwritten by get_fmt */
1587 int ret = rk628_csi_get_fmt(sd, cfg, format);
1588
1589 format->format.code = code;
1590
1591 if (ret)
1592 return ret;
1593
1594 switch (code) {
1595 case MEDIA_BUS_FMT_UYVY8_2X8:
1596 if (csi->plat_data->bus_fmt == MEDIA_BUS_FMT_UYVY8_2X8)
1597 break;
1598 return -EINVAL;
1599 case MEDIA_BUS_FMT_RGB888_1X24:
1600 if (csi->plat_data->bus_fmt == MEDIA_BUS_FMT_RGB888_1X24)
1601 break;
1602 return -EINVAL;
1603 default:
1604 return -EINVAL;
1605 }
1606
1607 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1608 if (csi->plat_data->bus_fmt == MEDIA_BUS_FMT_UYVY8_2X8)
1609 return 0;
1610
1611 *v4l2_subdev_get_try_format(sd, cfg, format->pad) = format->format;
1612 }
1613
1614 csi->mbus_fmt_code = format->format.code;
1615 mode = rk628_csi_find_best_fit(format);
1616 csi->cur_mode = mode;
1617
1618 if ((mode->width == 3840) && (mode->height == 2160)) {
1619 v4l2_dbg(1, debug, sd,
1620 "%s res wxh:%dx%d, link freq:%llu, pixrate:%u\n",
1621 __func__, mode->width, mode->height,
1622 link_freq_menu_items[1], RK628_CSI_PIXEL_RATE_HIGH);
1623 __v4l2_ctrl_s_ctrl(csi->link_freq, 1);
1624 __v4l2_ctrl_s_ctrl_int64(csi->pixel_rate,
1625 RK628_CSI_PIXEL_RATE_HIGH);
1626 } else {
1627 v4l2_dbg(1, debug, sd,
1628 "%s res wxh:%dx%d, link freq:%llu, pixrate:%u\n",
1629 __func__, mode->width, mode->height,
1630 link_freq_menu_items[0], RK628_CSI_PIXEL_RATE_LOW);
1631 __v4l2_ctrl_s_ctrl(csi->link_freq, 0);
1632 __v4l2_ctrl_s_ctrl_int64(csi->pixel_rate,
1633 RK628_CSI_PIXEL_RATE_LOW);
1634 }
1635
1636 enable_stream(sd, false);
1637
1638 return 0;
1639 }
1640
rk628_csi_g_edid(struct v4l2_subdev * sd,struct v4l2_subdev_edid * edid)1641 static int rk628_csi_g_edid(struct v4l2_subdev *sd,
1642 struct v4l2_subdev_edid *edid)
1643 {
1644 struct rk628_csi *csi = to_csi(sd);
1645 u32 i, val;
1646
1647 memset(edid->reserved, 0, sizeof(edid->reserved));
1648
1649 if (edid->pad != 0)
1650 return -EINVAL;
1651
1652 if (edid->start_block == 0 && edid->blocks == 0) {
1653 edid->blocks = csi->edid_blocks_written;
1654 return 0;
1655 }
1656
1657 if (csi->edid_blocks_written == 0)
1658 return -ENODATA;
1659
1660 if (edid->start_block >= csi->edid_blocks_written ||
1661 edid->blocks == 0)
1662 return -EINVAL;
1663
1664 if (edid->start_block + edid->blocks > csi->edid_blocks_written)
1665 edid->blocks = csi->edid_blocks_written - edid->start_block;
1666
1667 /* edid access by apb when read, i2c slave addr: 0x0 */
1668 rk628_i2c_update_bits(csi->rk628, GRF_SYSTEM_CON0,
1669 SW_ADAPTER_I2CSLADR_MASK |
1670 SW_EDID_MODE_MASK,
1671 SW_ADAPTER_I2CSLADR(0) |
1672 SW_EDID_MODE(1));
1673
1674 for (i = 0; i < (edid->blocks * EDID_BLOCK_SIZE); i++) {
1675 rk628_i2c_read(csi->rk628, EDID_BASE + ((edid->start_block *
1676 EDID_BLOCK_SIZE) + i) * 4, &val);
1677 edid->edid[i] = val;
1678 }
1679
1680 rk628_i2c_update_bits(csi->rk628, GRF_SYSTEM_CON0,
1681 SW_EDID_MODE_MASK,
1682 SW_EDID_MODE(0));
1683
1684 return 0;
1685 }
1686
rk628_csi_s_edid(struct v4l2_subdev * sd,struct v4l2_subdev_edid * edid)1687 static int rk628_csi_s_edid(struct v4l2_subdev *sd,
1688 struct v4l2_subdev_edid *edid)
1689 {
1690 struct rk628_csi *csi = to_csi(sd);
1691 u16 edid_len = edid->blocks * EDID_BLOCK_SIZE;
1692 u32 i, val;
1693
1694 v4l2_dbg(1, debug, sd, "%s, pad %d, start block %d, blocks %d\n",
1695 __func__, edid->pad, edid->start_block, edid->blocks);
1696
1697 memset(edid->reserved, 0, sizeof(edid->reserved));
1698
1699 if (edid->pad != 0)
1700 return -EINVAL;
1701
1702 if (edid->start_block != 0)
1703 return -EINVAL;
1704
1705 if (edid->blocks > EDID_NUM_BLOCKS_MAX) {
1706 edid->blocks = EDID_NUM_BLOCKS_MAX;
1707 return -E2BIG;
1708 }
1709
1710 rk628_hdmirx_hpd_ctrl(sd, false);
1711
1712 if (edid->blocks == 0) {
1713 csi->edid_blocks_written = 0;
1714 return 0;
1715 }
1716
1717 /* edid access by apb when write, i2c slave addr: 0x0 */
1718 rk628_i2c_update_bits(csi->rk628, GRF_SYSTEM_CON0,
1719 SW_ADAPTER_I2CSLADR_MASK |
1720 SW_EDID_MODE_MASK,
1721 SW_ADAPTER_I2CSLADR(0) |
1722 SW_EDID_MODE(1));
1723
1724 for (i = 0; i < edid_len; i++)
1725 rk628_i2c_write(csi->rk628, EDID_BASE + i * 4, edid->edid[i]);
1726
1727 /* read out for debug */
1728 if (debug >= 3) {
1729 pr_info("%s: Read EDID: ======\n", __func__);
1730 for (i = 0; i < edid_len; i++) {
1731 rk628_i2c_read(csi->rk628, EDID_BASE + i * 4, &val);
1732 pr_info("0x%02x ", val);
1733 if ((i + 1) % 8 == 0)
1734 pr_info("\n");
1735 }
1736 pr_info("%s: ======\n", __func__);
1737 }
1738
1739 /* edid access by RX's i2c, i2c slave addr: 0x0 */
1740 rk628_i2c_update_bits(csi->rk628, GRF_SYSTEM_CON0,
1741 SW_ADAPTER_I2CSLADR_MASK |
1742 SW_EDID_MODE_MASK,
1743 SW_ADAPTER_I2CSLADR(0) |
1744 SW_EDID_MODE(0));
1745 csi->edid_blocks_written = edid->blocks;
1746 udelay(100);
1747
1748 if (tx_5v_power_present(sd))
1749 rk628_hdmirx_hpd_ctrl(sd, true);
1750
1751 return 0;
1752 }
1753
rk628_csi_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)1754 static int rk628_csi_g_frame_interval(struct v4l2_subdev *sd,
1755 struct v4l2_subdev_frame_interval *fi)
1756 {
1757 struct rk628_csi *csi = to_csi(sd);
1758 const struct rk628_csi_mode *mode = csi->cur_mode;
1759
1760 mutex_lock(&csi->confctl_mutex);
1761 fi->interval = mode->max_fps;
1762 mutex_unlock(&csi->confctl_mutex);
1763
1764 return 0;
1765 }
1766
rk628_csi_get_module_inf(struct rk628_csi * rk628_csi,struct rkmodule_inf * inf)1767 static void rk628_csi_get_module_inf(struct rk628_csi *rk628_csi,
1768 struct rkmodule_inf *inf)
1769 {
1770 memset(inf, 0, sizeof(*inf));
1771 strscpy(inf->base.sensor, RK628_CSI_NAME, sizeof(inf->base.sensor));
1772 strscpy(inf->base.module, rk628_csi->module_name,
1773 sizeof(inf->base.module));
1774 strscpy(inf->base.lens, rk628_csi->len_name, sizeof(inf->base.lens));
1775 }
1776
rk628_csi_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1777 static long rk628_csi_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1778 {
1779 struct rk628_csi *csi = to_csi(sd);
1780 long ret = 0;
1781
1782 switch (cmd) {
1783 case RKMODULE_GET_MODULE_INFO:
1784 rk628_csi_get_module_inf(csi, (struct rkmodule_inf *)arg);
1785 break;
1786 default:
1787 ret = -ENOIOCTLCMD;
1788 break;
1789 }
1790
1791 return ret;
1792 }
1793
mipi_dphy_power_on(struct rk628_csi * csi)1794 static int mipi_dphy_power_on(struct rk628_csi *csi)
1795 {
1796 unsigned int val;
1797 u32 bus_width, mask;
1798 struct v4l2_subdev *sd = &csi->sd;
1799
1800 if ((csi->timings.bt.width == 3840 && csi->timings.bt.height == 2160) ||
1801 csi->csi_lanes_in_use <= 2) {
1802 csi->lane_mbps = MIPI_DATARATE_MBPS_HIGH;
1803 } else {
1804 csi->lane_mbps = MIPI_DATARATE_MBPS_LOW;
1805 }
1806
1807 bus_width = csi->lane_mbps << 8;
1808 bus_width |= COMBTXPHY_MODULEA_EN;
1809 v4l2_dbg(1, debug, sd, "%s mipi bitrate:%llu mbps\n", __func__,
1810 csi->lane_mbps);
1811 rk628_txphy_set_bus_width(csi->rk628, bus_width);
1812 rk628_txphy_set_mode(csi->rk628, PHY_MODE_VIDEO_MIPI);
1813
1814 mipi_dphy_init_hsfreqrange(csi->rk628, csi->lane_mbps);
1815 usleep_range(1500, 2000);
1816 rk628_txphy_power_on(csi->rk628);
1817
1818 usleep_range(1500, 2000);
1819 mask = DPHY_PLL_LOCK;
1820 rk628_i2c_read(csi->rk628, CSITX_CSITX_STATUS1, &val);
1821 if ((val & mask) != mask) {
1822 dev_err(csi->dev, "PHY is not locked\n");
1823 return -1;
1824 }
1825
1826 udelay(10);
1827
1828 return 0;
1829 }
1830
mipi_dphy_power_off(struct rk628_csi * csi)1831 static void mipi_dphy_power_off(struct rk628_csi *csi)
1832 {
1833 rk628_txphy_power_off(csi->rk628);
1834 }
1835
1836 #ifdef CONFIG_COMPAT
rk628_csi_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)1837 static long rk628_csi_compat_ioctl32(struct v4l2_subdev *sd,
1838 unsigned int cmd, unsigned long arg)
1839 {
1840 void __user *up = compat_ptr(arg);
1841 struct rkmodule_inf *inf;
1842 long ret;
1843
1844 switch (cmd) {
1845 case RKMODULE_GET_MODULE_INFO:
1846 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
1847 if (!inf) {
1848 ret = -ENOMEM;
1849 return ret;
1850 }
1851
1852 ret = rk628_csi_ioctl(sd, cmd, inf);
1853 if (!ret) {
1854 ret = copy_to_user(up, inf, sizeof(*inf));
1855 if (ret)
1856 ret = -EFAULT;
1857 }
1858 kfree(inf);
1859 break;
1860
1861 default:
1862 ret = -ENOIOCTLCMD;
1863 break;
1864 }
1865
1866 return ret;
1867 }
1868 #endif
1869
1870 static const struct v4l2_ctrl_ops rk628_csi_ctrl_ops = {
1871 .g_volatile_ctrl = rk628_csi_get_ctrl,
1872 };
1873
1874 static const struct v4l2_subdev_core_ops rk628_csi_core_ops = {
1875 .interrupt_service_routine = rk628_csi_isr,
1876 .subscribe_event = rk628_csi_subscribe_event,
1877 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1878 .ioctl = rk628_csi_ioctl,
1879 #ifdef CONFIG_COMPAT
1880 .compat_ioctl32 = rk628_csi_compat_ioctl32,
1881 #endif
1882 };
1883
1884 static const struct v4l2_subdev_video_ops rk628_csi_video_ops = {
1885 .g_input_status = rk628_csi_g_input_status,
1886 .s_dv_timings = rk628_csi_s_dv_timings,
1887 .g_dv_timings = rk628_csi_g_dv_timings,
1888 .query_dv_timings = rk628_csi_query_dv_timings,
1889 .s_stream = rk628_csi_s_stream,
1890 .g_frame_interval = rk628_csi_g_frame_interval,
1891 };
1892
1893 static const struct v4l2_subdev_pad_ops rk628_csi_pad_ops = {
1894 .enum_mbus_code = rk628_csi_enum_mbus_code,
1895 .enum_frame_size = rk628_csi_enum_frame_sizes,
1896 .enum_frame_interval = rk628_csi_enum_frame_interval,
1897 .set_fmt = rk628_csi_set_fmt,
1898 .get_fmt = rk628_csi_get_fmt,
1899 .get_edid = rk628_csi_g_edid,
1900 .set_edid = rk628_csi_s_edid,
1901 .enum_dv_timings = rk628_csi_enum_dv_timings,
1902 .dv_timings_cap = rk628_csi_dv_timings_cap,
1903 .get_mbus_config = rk628_csi_g_mbus_config,
1904 };
1905
1906 static const struct v4l2_subdev_ops rk628_csi_ops = {
1907 .core = &rk628_csi_core_ops,
1908 .video = &rk628_csi_video_ops,
1909 .pad = &rk628_csi_pad_ops,
1910 };
1911
rk628_csi_get_custom_ctrl(struct v4l2_ctrl * ctrl)1912 static int rk628_csi_get_custom_ctrl(struct v4l2_ctrl *ctrl)
1913 {
1914 int ret = -EINVAL;
1915 struct rk628_csi *csi = container_of(ctrl->handler, struct rk628_csi,
1916 hdl);
1917 struct v4l2_subdev *sd = &csi->sd;
1918
1919 if (ctrl->id == RK_V4L2_CID_AUDIO_SAMPLING_RATE) {
1920 ret = get_audio_sampling_rate(sd);
1921 *ctrl->p_new.p_s32 = ret;
1922 }
1923
1924 return ret;
1925 }
1926
1927 static const struct v4l2_ctrl_ops rk628_csi_custom_ctrl_ops = {
1928 .g_volatile_ctrl = rk628_csi_get_custom_ctrl,
1929 };
1930
1931 static const struct v4l2_ctrl_config rk628_csi_ctrl_audio_sampling_rate = {
1932 .ops = &rk628_csi_custom_ctrl_ops,
1933 .id = RK_V4L2_CID_AUDIO_SAMPLING_RATE,
1934 .name = "Audio sampling rate",
1935 .type = V4L2_CTRL_TYPE_INTEGER,
1936 .min = 0,
1937 .max = 768000,
1938 .step = 1,
1939 .def = 0,
1940 .flags = V4L2_CTRL_FLAG_READ_ONLY,
1941 };
1942
1943 static const struct v4l2_ctrl_config rk628_csi_ctrl_audio_present = {
1944 .id = RK_V4L2_CID_AUDIO_PRESENT,
1945 .name = "Audio present",
1946 .type = V4L2_CTRL_TYPE_BOOLEAN,
1947 .min = 0,
1948 .max = 1,
1949 .step = 1,
1950 .def = 0,
1951 .flags = V4L2_CTRL_FLAG_READ_ONLY,
1952 };
1953
plugin_detect_irq(int irq,void * dev_id)1954 static irqreturn_t plugin_detect_irq(int irq, void *dev_id)
1955 {
1956 struct rk628_csi *csi = dev_id;
1957 struct v4l2_subdev *sd = &csi->sd;
1958
1959 /* control hpd after 50ms */
1960 schedule_delayed_work(&csi->delayed_work_enable_hotplug, HZ / 20);
1961 tx_5v_power_present(sd);
1962
1963 return IRQ_HANDLED;
1964 }
1965
rk628_csi_probe_of(struct rk628_csi * csi)1966 static int rk628_csi_probe_of(struct rk628_csi *csi)
1967 {
1968 struct device *dev = csi->dev;
1969 struct v4l2_fwnode_endpoint endpoint = { .bus_type = 0 };
1970 struct device_node *ep;
1971 int ret = -EINVAL;
1972 bool hdcp1x_enable = false, i2s_enable_default = false;
1973 bool scaler_en = false;
1974
1975 csi->soc_24M = devm_clk_get(dev, "soc_24M");
1976 if (csi->soc_24M == ERR_PTR(-ENOENT))
1977 csi->soc_24M = NULL;
1978 if (IS_ERR(csi->soc_24M)) {
1979 ret = PTR_ERR(csi->soc_24M);
1980 dev_err(dev, "Unable to get soc_24M: %d\n", ret);
1981 }
1982 clk_prepare_enable(csi->soc_24M);
1983
1984 csi->enable_gpio = devm_gpiod_get_optional(dev, "enable",
1985 GPIOD_OUT_LOW);
1986 if (IS_ERR(csi->enable_gpio)) {
1987 ret = PTR_ERR(csi->enable_gpio);
1988 dev_err(dev, "failed to request enable GPIO: %d\n", ret);
1989 return ret;
1990 }
1991
1992 csi->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1993 if (IS_ERR(csi->reset_gpio)) {
1994 ret = PTR_ERR(csi->reset_gpio);
1995 dev_err(dev, "failed to request reset GPIO: %d\n", ret);
1996 return ret;
1997 }
1998
1999 csi->power_gpio = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_HIGH);
2000 if (IS_ERR(csi->power_gpio)) {
2001 dev_err(dev, "failed to get power gpio\n");
2002 ret = PTR_ERR(csi->power_gpio);
2003 return ret;
2004 }
2005
2006 csi->plugin_det_gpio = devm_gpiod_get_optional(dev, "plugin-det",
2007 GPIOD_IN);
2008 if (IS_ERR(csi->plugin_det_gpio)) {
2009 dev_err(dev, "failed to get hdmirx det gpio\n");
2010 ret = PTR_ERR(csi->plugin_det_gpio);
2011 return ret;
2012 }
2013
2014 if (csi->enable_gpio) {
2015 gpiod_set_value(csi->enable_gpio, 1);
2016 usleep_range(10000, 11000);
2017 }
2018 gpiod_set_value(csi->reset_gpio, 0);
2019 usleep_range(10000, 11000);
2020 gpiod_set_value(csi->reset_gpio, 1);
2021 usleep_range(10000, 11000);
2022 gpiod_set_value(csi->reset_gpio, 0);
2023 usleep_range(10000, 11000);
2024
2025 if (csi->power_gpio) {
2026 gpiod_set_value(csi->power_gpio, 1);
2027 usleep_range(500, 510);
2028 }
2029
2030 if (of_property_read_bool(dev->of_node, "hdcp-enable"))
2031 hdcp1x_enable = true;
2032
2033 if (of_property_read_bool(dev->of_node, "i2s-enable-default"))
2034 i2s_enable_default = true;
2035
2036 if (csi->plat_data->tx_mode == DSI_MODE) {
2037 if (of_property_read_bool(dev->of_node, "dsi-video-mode"))
2038 csi->dsi.vid_mode = VIDEO_MODE;
2039 else
2040 csi->dsi.vid_mode = COMMAND_MODE;
2041 }
2042
2043 if (of_property_read_bool(dev->of_node, "scaler-en"))
2044 scaler_en = true;
2045
2046 ep = of_graph_get_next_endpoint(dev->of_node, NULL);
2047 if (!ep) {
2048 dev_err(dev, "missing endpoint node\n");
2049 return -EINVAL;
2050 }
2051
2052 ret = v4l2_fwnode_endpoint_alloc_parse(of_fwnode_handle(ep), &endpoint);
2053 if (ret) {
2054 dev_err(dev, "failed to parse endpoint\n");
2055 goto put_node;
2056 }
2057
2058 if (endpoint.bus_type != V4L2_MBUS_CSI2_DPHY ||
2059 endpoint.bus.mipi_csi2.num_data_lanes == 0) {
2060 dev_err(dev, "missing CSI-2 properties in endpoint\n");
2061 goto free_endpoint;
2062 }
2063
2064 csi->csi_lanes_in_use = endpoint.bus.mipi_csi2.num_data_lanes;
2065 csi->enable_hdcp = hdcp1x_enable;
2066 csi->i2s_enable_default = i2s_enable_default;
2067 csi->scaler_en = scaler_en;
2068 if (csi->scaler_en)
2069 csi->timings = dst_timing;
2070
2071 csi->rxphy_pwron = false;
2072 csi->txphy_pwron = false;
2073 csi->nosignal = true;
2074 csi->stream_state = 0;
2075 csi->avi_rcv_rdy = false;
2076
2077 ret = 0;
2078
2079 free_endpoint:
2080 v4l2_fwnode_endpoint_free(&endpoint);
2081 put_node:
2082 of_node_put(ep);
2083
2084 return ret;
2085 }
2086
2087 static const struct rk628_plat_data rk628_csi_data = {
2088 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
2089 .tx_mode = CSI_MODE,
2090 };
2091
2092 static const struct rk628_plat_data rk628_dsi_data = {
2093 .bus_fmt = MEDIA_BUS_FMT_RGB888_1X24,
2094 .tx_mode = DSI_MODE,
2095 };
2096
2097 static const struct i2c_device_id rk628_csi_i2c_id[] = {
2098 { "rk628-csi-v4l2", 0 },
2099 { "rk628-dsi-v4l2", 0 },
2100 { }
2101 };
2102
2103 MODULE_DEVICE_TABLE(i2c, rk628_csi_i2c_id);
2104
2105 static const struct of_device_id rk628_csi_of_match[] = {
2106 { .compatible = "rockchip,rk628-csi-v4l2", .data = &rk628_csi_data },
2107 { .compatible = "rockchip,rk628-dsi-v4l2", .data = &rk628_dsi_data },
2108 {}
2109 };
2110 MODULE_DEVICE_TABLE(of, rk628_csi_of_match);
2111
rk628_csi_probe(struct i2c_client * client,const struct i2c_device_id * id)2112 static int rk628_csi_probe(struct i2c_client *client,
2113 const struct i2c_device_id *id)
2114 {
2115 struct rk628_csi *csi;
2116 struct v4l2_subdev *sd;
2117 struct device *dev = &client->dev;
2118 struct device_node *node = dev->of_node;
2119 char facing[2];
2120 int err;
2121 u32 val;
2122 struct rk628 *rk628;
2123 unsigned long irq_flags;
2124 const struct of_device_id *match;
2125
2126 dev_info(dev, "RK628 I2C driver version: %02x.%02x.%02x",
2127 DRIVER_VERSION >> 16,
2128 (DRIVER_VERSION & 0xff00) >> 8,
2129 DRIVER_VERSION & 0x00ff);
2130
2131 if (!of_device_is_available(dev->of_node))
2132 return -ENODEV;
2133
2134 csi = devm_kzalloc(dev, sizeof(*csi), GFP_KERNEL);
2135 if (!csi)
2136 return -ENOMEM;
2137
2138 csi->dev = dev;
2139 csi->i2c_client = client;
2140 rk628 = rk628_i2c_register(client);
2141 if (!rk628)
2142 return -ENOMEM;
2143
2144 match = of_match_node(rk628_csi_of_match, dev->of_node);
2145 csi->plat_data = match->data;
2146
2147 csi->rk628 = rk628;
2148 csi->dsi.rk628 = rk628;
2149 csi->cur_mode = &supported_modes[0];
2150 csi->hdmirx_irq = client->irq;
2151 sd = &csi->sd;
2152 sd->dev = dev;
2153
2154 csi->hpd_output_inverted = of_property_read_bool(node,
2155 "hpd-output-inverted");
2156 err = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
2157 &csi->module_index);
2158 err |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
2159 &csi->module_facing);
2160 err |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
2161 &csi->module_name);
2162 err |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
2163 &csi->len_name);
2164 if (err) {
2165 dev_err(dev, "could not get module information!\n");
2166 return -EINVAL;
2167 }
2168
2169 err = rk628_csi_probe_of(csi);
2170 if (err) {
2171 v4l2_err(sd, "rk628_csi_probe_of failed! err:%d\n", err);
2172 return err;
2173 }
2174
2175 rk628_cru_initialize(csi->rk628);
2176
2177 v4l2_subdev_init(sd, &rk628_csi_ops);
2178 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
2179
2180 /* i2c access, read chip id*/
2181 err = rk628_i2c_read(csi->rk628, CSITX_CSITX_VERSION, &val);
2182 if (err) {
2183 v4l2_err(sd, "i2c access failed! err:%d\n", err);
2184 return -ENODEV;
2185 }
2186 v4l2_dbg(1, debug, sd, "CSITX VERSION: %#x\n", val);
2187
2188 mutex_init(&csi->confctl_mutex);
2189
2190 csi->txphy = rk628_txphy_register(rk628);
2191 if (!csi->txphy) {
2192 v4l2_err(sd, "register txphy failed\n");
2193 return -ENOMEM;
2194 }
2195
2196 /* control handlers */
2197 v4l2_ctrl_handler_init(&csi->hdl, 4);
2198 csi->link_freq = v4l2_ctrl_new_int_menu(&csi->hdl, NULL,
2199 V4L2_CID_LINK_FREQ,
2200 ARRAY_SIZE(link_freq_menu_items) - 1,
2201 0, link_freq_menu_items);
2202 csi->pixel_rate = v4l2_ctrl_new_std(&csi->hdl, NULL,
2203 V4L2_CID_PIXEL_RATE, 0, RK628_CSI_PIXEL_RATE_HIGH, 1,
2204 RK628_CSI_PIXEL_RATE_HIGH);
2205 csi->detect_tx_5v_ctrl = v4l2_ctrl_new_std(&csi->hdl,
2206 &rk628_csi_ctrl_ops, V4L2_CID_DV_RX_POWER_PRESENT,
2207 0, 1, 0, 0);
2208 if (csi->detect_tx_5v_ctrl)
2209 csi->detect_tx_5v_ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
2210
2211 /* custom controls */
2212 csi->audio_sampling_rate_ctrl = v4l2_ctrl_new_custom(&csi->hdl,
2213 &rk628_csi_ctrl_audio_sampling_rate, NULL);
2214 csi->audio_present_ctrl = v4l2_ctrl_new_custom(&csi->hdl,
2215 &rk628_csi_ctrl_audio_present, NULL);
2216
2217 sd->ctrl_handler = &csi->hdl;
2218 if (csi->hdl.error) {
2219 err = csi->hdl.error;
2220 v4l2_err(sd, "cfg v4l2 ctrls failed! err:%d\n", err);
2221 goto err_hdl;
2222 }
2223
2224 if (rk628_csi_update_controls(sd)) {
2225 err = -ENODEV;
2226 v4l2_err(sd, "update v4l2 ctrls failed! err:%d\n", err);
2227 goto err_hdl;
2228 }
2229
2230 csi->pad.flags = MEDIA_PAD_FL_SOURCE;
2231 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
2232 err = media_entity_pads_init(&sd->entity, 1, &csi->pad);
2233 if (err < 0) {
2234 v4l2_err(sd, "media entity init failed! err:%d\n", err);
2235 goto err_hdl;
2236 }
2237
2238 if (csi->plat_data->tx_mode == DSI_MODE)
2239 csi->mbus_fmt_code = MEDIA_BUS_FMT_RGB888_1X24;
2240 else
2241 csi->mbus_fmt_code = MEDIA_BUS_FMT_UYVY8_2X8;
2242
2243 memset(facing, 0, sizeof(facing));
2244 if (strcmp(csi->module_facing, "back") == 0)
2245 facing[0] = 'b';
2246 else
2247 facing[0] = 'f';
2248
2249 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
2250 csi->module_index, facing,
2251 RK628_CSI_NAME, dev_name(sd->dev));
2252 err = v4l2_async_register_subdev(sd);
2253 if (err < 0) {
2254 v4l2_err(sd, "v4l2 register subdev failed! err:%d\n", err);
2255 goto err_hdl;
2256 }
2257
2258 INIT_DELAYED_WORK(&csi->delayed_work_enable_hotplug,
2259 rk628_csi_delayed_work_enable_hotplug);
2260 INIT_DELAYED_WORK(&csi->delayed_work_res_change,
2261 rk628_delayed_work_res_change);
2262 csi->audio_info = rk628_hdmirx_audioinfo_alloc(dev,
2263 &csi->confctl_mutex,
2264 rk628,
2265 csi->i2s_enable_default);
2266 if (!csi->audio_info) {
2267 v4l2_err(sd, "request audio info fail\n");
2268 goto err_work_queues;
2269 }
2270 rk628_csi_initial_setup(sd);
2271
2272 if (csi->hdmirx_irq) {
2273 irq_flags = irqd_get_trigger_type(irq_get_irq_data(csi->hdmirx_irq));
2274 v4l2_dbg(1, debug, sd, "cfg hdmirx irq, flags: %lu!\n", irq_flags);
2275 err = devm_request_threaded_irq(dev, csi->hdmirx_irq, NULL,
2276 rk628_csi_irq_handler, irq_flags |
2277 IRQF_ONESHOT, "rk628_csi", csi);
2278 if (err) {
2279 v4l2_err(sd, "request rk628-csi irq failed! err:%d\n",
2280 err);
2281 goto err_work_queues;
2282 }
2283 } else {
2284 v4l2_dbg(1, debug, sd, "no irq, cfg poll!\n");
2285 INIT_WORK(&csi->work_i2c_poll,
2286 rk628_csi_work_i2c_poll);
2287 timer_setup(&csi->timer, rk628_csi_irq_poll_timer, 0);
2288 csi->timer.expires = jiffies +
2289 msecs_to_jiffies(POLL_INTERVAL_MS);
2290 add_timer(&csi->timer);
2291 }
2292
2293 if (csi->plugin_det_gpio) {
2294 csi->plugin_irq = gpiod_to_irq(csi->plugin_det_gpio);
2295 if (csi->plugin_irq < 0) {
2296 dev_err(csi->dev, "failed to get plugin det irq\n");
2297 err = csi->plugin_irq;
2298 goto err_work_queues;
2299 }
2300
2301 err = devm_request_threaded_irq(dev, csi->plugin_irq, NULL,
2302 plugin_detect_irq, IRQF_TRIGGER_FALLING |
2303 IRQF_TRIGGER_RISING | IRQF_ONESHOT, "rk628_csi", csi);
2304 if (err) {
2305 dev_err(csi->dev, "failed to register plugin det irq (%d)\n", err);
2306 goto err_work_queues;
2307 }
2308 }
2309
2310 err = v4l2_ctrl_handler_setup(sd->ctrl_handler);
2311 if (err) {
2312 v4l2_err(sd, "v4l2 ctrl handler setup failed! err:%d\n", err);
2313 goto err_work_queues;
2314 }
2315
2316 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
2317 client->addr << 1, client->adapter->name);
2318
2319 return 0;
2320
2321 err_work_queues:
2322 if (!csi->hdmirx_irq)
2323 flush_work(&csi->work_i2c_poll);
2324 cancel_delayed_work(&csi->delayed_work_enable_hotplug);
2325 cancel_delayed_work(&csi->delayed_work_res_change);
2326 rk628_hdmirx_audio_destroy(csi->audio_info);
2327 err_hdl:
2328 mutex_destroy(&csi->confctl_mutex);
2329 media_entity_cleanup(&sd->entity);
2330 v4l2_ctrl_handler_free(&csi->hdl);
2331 return err;
2332 }
2333
rk628_csi_remove(struct i2c_client * client)2334 static int rk628_csi_remove(struct i2c_client *client)
2335 {
2336 struct rk628_csi *csi = i2c_get_clientdata(client);
2337
2338 if (!csi->hdmirx_irq) {
2339 del_timer_sync(&csi->timer);
2340 flush_work(&csi->work_i2c_poll);
2341 }
2342 rk628_hdmirx_audio_cancel_work_audio(csi->audio_info, true);
2343 rk628_hdmirx_audio_cancel_work_rate_change(csi->audio_info, true);
2344 cancel_delayed_work_sync(&csi->delayed_work_enable_hotplug);
2345 cancel_delayed_work_sync(&csi->delayed_work_res_change);
2346
2347 if (csi->rxphy_pwron)
2348 rk628_rxphy_power_off(csi->rk628);
2349 if (csi->txphy_pwron)
2350 mipi_dphy_power_off(csi);
2351
2352 mutex_destroy(&csi->confctl_mutex);
2353
2354 rk628_control_assert(csi->rk628, RGU_HDMIRX);
2355 rk628_control_assert(csi->rk628, RGU_HDMIRX_PON);
2356 rk628_control_assert(csi->rk628, RGU_DECODER);
2357 rk628_control_assert(csi->rk628, RGU_CLK_RX);
2358 rk628_control_assert(csi->rk628, RGU_VOP);
2359 rk628_control_assert(csi->rk628, RGU_CSI);
2360
2361 return 0;
2362 }
2363
2364 static struct i2c_driver rk628_csi_i2c_driver = {
2365 .driver = {
2366 .name = "rk628-csi-v4l2",
2367 .of_match_table = of_match_ptr(rk628_csi_of_match),
2368 },
2369 .id_table = rk628_csi_i2c_id,
2370 .probe = rk628_csi_probe,
2371 .remove = rk628_csi_remove,
2372 };
2373
2374 module_i2c_driver(rk628_csi_i2c_driver);
2375
2376 MODULE_DESCRIPTION("Rockchip RK628 HDMI to MIPI CSI-2 bridge I2C driver");
2377 MODULE_AUTHOR("Dingxian Wen <shawn.wen@rock-chips.com>");
2378 MODULE_AUTHOR("Shunqing Chen <csq@rock-chips.com>");
2379 MODULE_LICENSE("GPL");
2380