Home
last modified time | relevance | path

Searched full:refclock (Results 1 – 25 of 42) sorted by relevance

12

/OK3568_Linux_fs/kernel/drivers/video/fbdev/kyro/
H A DSTG4000InitDevice.c117 u32 ProgramClock(u32 refClock, in ProgramClock() argument
131 refClock *= 1000; /* in Hz */ in ProgramClock()
153 F = (u32)(ulTmp / (refClock >> STG4K3_PLL_SCALER)); in ProgramClock()
168 ulVCO = refClock / R; in ProgramClock()
186 …ulPhaseScore = (((refClock / R) - (refClock / STG4K3_PLL_MAX_R))) / ((refClock - (refClock / STG4K… in ProgramClock()
H A DSTG4000Interface.h37 extern u32 ProgramClock(u32 refClock, u32 coreClock, u32 *FOut, u32 *ROut, u32 *POut);
/OK3568_Linux_fs/external/xserver/hw/xfree86/ramdac/
H A DIBM.c43 IBMramdac640CalculateMNPCForClock(unsigned long RefClock, /* In 100Hz units */ in IBMramdac640CalculateMNPCForClock() argument
60 IntRef = RefClock / (N + 1); in IBMramdac640CalculateMNPCForClock()
69 Clock = (RefClock * (M + 1)) / ((N + 1) * 2 * P); in IBMramdac640CalculateMNPCForClock()
71 Clock = (RefClock * (M + 1)) / (N + 1); in IBMramdac640CalculateMNPCForClock()
103 IBMramdac526CalculateMNPCForClock(unsigned long RefClock, /* In 100Hz units */ in IBMramdac526CalculateMNPCForClock() argument
120 IntRef = RefClock / (N + 1); in IBMramdac526CalculateMNPCForClock()
129 Clock = (RefClock * (M + 1)) / ((N + 1) * 2 * P); in IBMramdac526CalculateMNPCForClock()
H A DIBM.h17 RefClock,
35 RefClock,
H A DTI.h5 RefClock,
H A DTI.c46 TIramdacCalculateMNPForClock(unsigned long RefClock, /* In 100Hz units */ in TIramdacCalculateMNPForClock() argument
58 double VCO, IntRef = (double) RefClock; in TIramdacCalculateMNPForClock()
/OK3568_Linux_fs/u-boot/include/linux/
H A Dmc146818rtc.h48 * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
53 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
/OK3568_Linux_fs/kernel/include/linux/
H A Dmc146818rtc.h77 * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
82 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
/OK3568_Linux_fs/kernel/drivers/media/tuners/
H A Dmt2063.h9 u32 refclock; member
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/rtc/
H A Dcdns,rtc.txt21 clocks = <&sysclock>, <&refclock>;
/OK3568_Linux_fs/yocto/meta-openembedded/meta-networking/recipes-support/chrony/chrony/
H A Dchrony.conf12 #refclock PPS /dev/pps0 poll 0 prefer
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Dstb6100.h68 u32 refclock; member
H A Dstv6110x.c231 static int stv6110x_set_refclock(struct dvb_frontend *fe, u32 refclock) in stv6110x_set_refclock() argument
236 switch (refclock) { in stv6110x_set_refclock()
H A Dstb6100.c544 state->reference = config->refclock / 1000; /* kHz */ in stb6100_attach()
/OK3568_Linux_fs/yocto/meta-openembedded/meta-networking/recipes-support/ntpsec/
H A Dntpsec_1.2.1.bb46 PACKAGECONFIG[refclocks] = "--refclock=all,,pps-tools"
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dti,phy-j721e-wiz.yaml105 WIZ node should have subnodes for each of the PMA common refclock
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/
H A Dspl_pcie_ep_boot.c585 printep("RefClock in SRNS clock mode\n"); in pcie_ep_init()
587 printep("RefClock in common clock_mode\n"); in pcie_ep_init()
/OK3568_Linux_fs/kernel/drivers/phy/cadence/
H A Dphy-cadence-torrent.c1036 /* refclock registers - assumes 19.2 MHz refclock */ in cdns_torrent_dp_pma_cmn_cfg_19_2mhz()
1101 /* Assumes 19.2 MHz refclock */ in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
1261 /* refclock registers - assumes 25 MHz refclock */ in cdns_torrent_dp_pma_cmn_cfg_25mhz()
1325 /* Assumes 25 MHz refclock */ in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
1473 /* Per lane, refclock-dependent receiver detection setting */ in cdns_torrent_dp_pma_lane_cfg()
/OK3568_Linux_fs/kernel/drivers/phy/qualcomm/
H A Dphy-qcom-pcie2.c81 /* Don't use PAD for refclock */ in qcom_pcie2_phy_power_on()
/OK3568_Linux_fs/kernel/drivers/media/pci/mantis/
H A Dmantis_vp1041.c293 .refclock = 27000000,
/OK3568_Linux_fs/kernel/drivers/usb/dwc3/
H A Ddwc3-pci.c178 /* On BYT the FW does not always enable the refclock */ in dwc3_pci_quirks()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c906 int refclock = mode->clock; in cdv_intel_dp_mode_fixup() local
911 refclock = intel_dp->panel_fixed_mode->clock; in cdv_intel_dp_mode_fixup()
919 if (cdv_intel_dp_link_required(refclock, bpp) <= link_avail) { in cdv_intel_dp_mode_fixup()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dsmu_v11_0_i2c.c101 * that refclock is 100MHz in smu_v11_0_i2c_set_clock()
/OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c387 /* Determine refclock from XAUI ratio */ in p4080_erratum_serdes8()
H A Dspeed.c93 * are driven by separate DDR Refclock or single source in get_sys_info()

12