1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 1998 by Alan Hourihane, Wigan, England.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission to use, copy, modify, distribute, and sell this software and its
5*4882a593Smuzhiyun * documentation for any purpose is hereby granted without fee, provided that
6*4882a593Smuzhiyun * the above copyright notice appear in all copies and that both that
7*4882a593Smuzhiyun * copyright notice and this permission notice appear in supporting
8*4882a593Smuzhiyun * documentation, and that the name of Alan Hourihane not be used in
9*4882a593Smuzhiyun * advertising or publicity pertaining to distribution of the software without
10*4882a593Smuzhiyun * specific, written prior permission. Alan Hourihane makes no representations
11*4882a593Smuzhiyun * about the suitability of this software for any purpose. It is provided
12*4882a593Smuzhiyun * "as is" without express or implied warranty.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15*4882a593Smuzhiyun * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16*4882a593Smuzhiyun * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17*4882a593Smuzhiyun * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18*4882a593Smuzhiyun * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19*4882a593Smuzhiyun * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20*4882a593Smuzhiyun * PERFORMANCE OF THIS SOFTWARE.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Authors: Alan Hourihane, <alanh@fairlite.demon.co.uk>
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * IBM RAMDAC routines.
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #ifdef HAVE_XORG_CONFIG_H
28*4882a593Smuzhiyun #include <xorg-config.h>
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include "xf86.h"
32*4882a593Smuzhiyun #include "xf86_OSproc.h"
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include "xf86Cursor.h"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define INIT_IBM_RAMDAC_INFO
37*4882a593Smuzhiyun #include "IBMPriv.h"
38*4882a593Smuzhiyun #include "xf86RamDacPriv.h"
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define INITIALFREQERR 100000
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun unsigned long
IBMramdac640CalculateMNPCForClock(unsigned long RefClock,unsigned long ReqClock,char IsPixClock,unsigned long MinClock,unsigned long MaxClock,unsigned long * rM,unsigned long * rN,unsigned long * rP,unsigned long * rC)43*4882a593Smuzhiyun IBMramdac640CalculateMNPCForClock(unsigned long RefClock, /* In 100Hz units */
44*4882a593Smuzhiyun unsigned long ReqClock, /* In 100Hz units */
45*4882a593Smuzhiyun char IsPixClock, /* boolean, is this the pixel or the sys clock */
46*4882a593Smuzhiyun unsigned long MinClock, /* Min VCO rating */
47*4882a593Smuzhiyun unsigned long MaxClock, /* Max VCO rating */
48*4882a593Smuzhiyun unsigned long *rM, /* M Out */
49*4882a593Smuzhiyun unsigned long *rN, /* N Out */
50*4882a593Smuzhiyun unsigned long *rP, /* Min P In, P Out */
51*4882a593Smuzhiyun unsigned long *rC /* C Out */
52*4882a593Smuzhiyun )
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun unsigned long M, N, P, iP = *rP;
55*4882a593Smuzhiyun unsigned long IntRef, VCO, Clock;
56*4882a593Smuzhiyun long freqErr, lowestFreqErr = INITIALFREQERR;
57*4882a593Smuzhiyun unsigned long ActualClock = 0;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun for (N = 0; N <= 63; N++) {
60*4882a593Smuzhiyun IntRef = RefClock / (N + 1);
61*4882a593Smuzhiyun if (IntRef < 10000)
62*4882a593Smuzhiyun break; /* IntRef needs to be >= 1MHz */
63*4882a593Smuzhiyun for (M = 2; M <= 127; M++) {
64*4882a593Smuzhiyun VCO = IntRef * (M + 1);
65*4882a593Smuzhiyun if ((VCO < MinClock) || (VCO > MaxClock))
66*4882a593Smuzhiyun continue;
67*4882a593Smuzhiyun for (P = iP; P <= 4; P++) {
68*4882a593Smuzhiyun if (P != 0)
69*4882a593Smuzhiyun Clock = (RefClock * (M + 1)) / ((N + 1) * 2 * P);
70*4882a593Smuzhiyun else
71*4882a593Smuzhiyun Clock = (RefClock * (M + 1)) / (N + 1);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun freqErr = (Clock - ReqClock);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (freqErr < 0) {
76*4882a593Smuzhiyun /* PixelClock gets rounded up always so monitor reports
77*4882a593Smuzhiyun correct frequency. */
78*4882a593Smuzhiyun if (IsPixClock)
79*4882a593Smuzhiyun continue;
80*4882a593Smuzhiyun freqErr = -freqErr;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (freqErr < lowestFreqErr) {
84*4882a593Smuzhiyun *rM = M;
85*4882a593Smuzhiyun *rN = N;
86*4882a593Smuzhiyun *rP = P;
87*4882a593Smuzhiyun *rC = (VCO <= 1280000 ? 1 : 2);
88*4882a593Smuzhiyun ActualClock = Clock;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun lowestFreqErr = freqErr;
91*4882a593Smuzhiyun /* Return if we found an exact match */
92*4882a593Smuzhiyun if (freqErr == 0)
93*4882a593Smuzhiyun return ActualClock;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun return ActualClock;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun unsigned long
IBMramdac526CalculateMNPCForClock(unsigned long RefClock,unsigned long ReqClock,char IsPixClock,unsigned long MinClock,unsigned long MaxClock,unsigned long * rM,unsigned long * rN,unsigned long * rP,unsigned long * rC)103*4882a593Smuzhiyun IBMramdac526CalculateMNPCForClock(unsigned long RefClock, /* In 100Hz units */
104*4882a593Smuzhiyun unsigned long ReqClock, /* In 100Hz units */
105*4882a593Smuzhiyun char IsPixClock, /* boolean, is this the pixel or the sys clock */
106*4882a593Smuzhiyun unsigned long MinClock, /* Min VCO rating */
107*4882a593Smuzhiyun unsigned long MaxClock, /* Max VCO rating */
108*4882a593Smuzhiyun unsigned long *rM, /* M Out */
109*4882a593Smuzhiyun unsigned long *rN, /* N Out */
110*4882a593Smuzhiyun unsigned long *rP, /* Min P In, P Out */
111*4882a593Smuzhiyun unsigned long *rC /* C Out */
112*4882a593Smuzhiyun )
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun unsigned long M, N, P, iP = *rP;
115*4882a593Smuzhiyun unsigned long IntRef, VCO, Clock;
116*4882a593Smuzhiyun long freqErr, lowestFreqErr = INITIALFREQERR;
117*4882a593Smuzhiyun unsigned long ActualClock = 0;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun for (N = 0; N <= 63; N++) {
120*4882a593Smuzhiyun IntRef = RefClock / (N + 1);
121*4882a593Smuzhiyun if (IntRef < 10000)
122*4882a593Smuzhiyun break; /* IntRef needs to be >= 1MHz */
123*4882a593Smuzhiyun for (M = 0; M <= 63; M++) {
124*4882a593Smuzhiyun VCO = IntRef * (M + 1);
125*4882a593Smuzhiyun if ((VCO < MinClock) || (VCO > MaxClock))
126*4882a593Smuzhiyun continue;
127*4882a593Smuzhiyun for (P = iP; P <= 4; P++) {
128*4882a593Smuzhiyun if (P)
129*4882a593Smuzhiyun Clock = (RefClock * (M + 1)) / ((N + 1) * 2 * P);
130*4882a593Smuzhiyun else
131*4882a593Smuzhiyun Clock = VCO;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun freqErr = (Clock - ReqClock);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun if (freqErr < 0) {
136*4882a593Smuzhiyun /* PixelClock gets rounded up always so monitor reports
137*4882a593Smuzhiyun correct frequency. */
138*4882a593Smuzhiyun if (IsPixClock)
139*4882a593Smuzhiyun continue;
140*4882a593Smuzhiyun freqErr = -freqErr;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun if (freqErr < lowestFreqErr) {
144*4882a593Smuzhiyun *rM = M;
145*4882a593Smuzhiyun *rN = N;
146*4882a593Smuzhiyun *rP = P;
147*4882a593Smuzhiyun *rC = (VCO <= 1280000 ? 1 : 2);
148*4882a593Smuzhiyun ActualClock = Clock;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun lowestFreqErr = freqErr;
151*4882a593Smuzhiyun /* Return if we found an exact match */
152*4882a593Smuzhiyun if (freqErr == 0)
153*4882a593Smuzhiyun return ActualClock;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun return ActualClock;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun void
IBMramdacRestore(ScrnInfoPtr pScrn,RamDacRecPtr ramdacPtr,RamDacRegRecPtr ramdacReg)163*4882a593Smuzhiyun IBMramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr ramdacPtr,
164*4882a593Smuzhiyun RamDacRegRecPtr ramdacReg)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun int i, maxreg, dacreg;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun switch (ramdacPtr->RamDacType) {
169*4882a593Smuzhiyun case IBM640_RAMDAC:
170*4882a593Smuzhiyun maxreg = 0x300;
171*4882a593Smuzhiyun dacreg = 1024;
172*4882a593Smuzhiyun break;
173*4882a593Smuzhiyun default:
174*4882a593Smuzhiyun maxreg = 0x100;
175*4882a593Smuzhiyun dacreg = 768;
176*4882a593Smuzhiyun break;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* Here we pass a short, so that we can evaluate a mask too */
180*4882a593Smuzhiyun /* So that the mask is the high byte and the data the low byte */
181*4882a593Smuzhiyun for (i = 0; i < maxreg; i++)
182*4882a593Smuzhiyun (*ramdacPtr->WriteDAC)
183*4882a593Smuzhiyun (pScrn, i, (ramdacReg->DacRegs[i] & 0xFF00) >> 8,
184*4882a593Smuzhiyun ramdacReg->DacRegs[i]);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun (*ramdacPtr->WriteAddress) (pScrn, 0);
187*4882a593Smuzhiyun for (i = 0; i < dacreg; i++)
188*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, ramdacReg->DAC[i]);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun void
IBMramdacSave(ScrnInfoPtr pScrn,RamDacRecPtr ramdacPtr,RamDacRegRecPtr ramdacReg)192*4882a593Smuzhiyun IBMramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr ramdacPtr,
193*4882a593Smuzhiyun RamDacRegRecPtr ramdacReg)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun int i, maxreg, dacreg;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun switch (ramdacPtr->RamDacType) {
198*4882a593Smuzhiyun case IBM640_RAMDAC:
199*4882a593Smuzhiyun maxreg = 0x300;
200*4882a593Smuzhiyun dacreg = 1024;
201*4882a593Smuzhiyun break;
202*4882a593Smuzhiyun default:
203*4882a593Smuzhiyun maxreg = 0x100;
204*4882a593Smuzhiyun dacreg = 768;
205*4882a593Smuzhiyun break;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun (*ramdacPtr->ReadAddress) (pScrn, 0);
209*4882a593Smuzhiyun for (i = 0; i < dacreg; i++)
210*4882a593Smuzhiyun ramdacReg->DAC[i] = (*ramdacPtr->ReadData) (pScrn);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun for (i = 0; i < maxreg; i++)
213*4882a593Smuzhiyun ramdacReg->DacRegs[i] = (*ramdacPtr->ReadDAC) (pScrn, i);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun RamDacHelperRecPtr
IBMramdacProbe(ScrnInfoPtr pScrn,RamDacSupportedInfoRecPtr ramdacs)217*4882a593Smuzhiyun IBMramdacProbe(ScrnInfoPtr pScrn,
218*4882a593Smuzhiyun RamDacSupportedInfoRecPtr ramdacs /* , RamDacRecPtr ramdacPtr */
219*4882a593Smuzhiyun )
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
222*4882a593Smuzhiyun RamDacHelperRecPtr ramdacHelperPtr = NULL;
223*4882a593Smuzhiyun Bool RamDacIsSupported = FALSE;
224*4882a593Smuzhiyun int IBMramdac_ID = -1;
225*4882a593Smuzhiyun int i;
226*4882a593Smuzhiyun unsigned char id, rev, id2, rev2;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* read ID and revision */
229*4882a593Smuzhiyun rev = (*ramdacPtr->ReadDAC) (pScrn, IBMRGB_rev);
230*4882a593Smuzhiyun id = (*ramdacPtr->ReadDAC) (pScrn, IBMRGB_id);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun /* check if ID and revision are read only */
233*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, ~rev, 0, IBMRGB_rev);
234*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, ~id, 0, IBMRGB_id);
235*4882a593Smuzhiyun rev2 = (*ramdacPtr->ReadDAC) (pScrn, IBMRGB_rev);
236*4882a593Smuzhiyun id2 = (*ramdacPtr->ReadDAC) (pScrn, IBMRGB_id);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun switch (id) {
239*4882a593Smuzhiyun case 0x30:
240*4882a593Smuzhiyun if (rev == 0xc0)
241*4882a593Smuzhiyun IBMramdac_ID = IBM624_RAMDAC;
242*4882a593Smuzhiyun if (rev == 0x80)
243*4882a593Smuzhiyun IBMramdac_ID = IBM624DB_RAMDAC;
244*4882a593Smuzhiyun break;
245*4882a593Smuzhiyun case 0x12:
246*4882a593Smuzhiyun if (rev == 0x1c)
247*4882a593Smuzhiyun IBMramdac_ID = IBM640_RAMDAC;
248*4882a593Smuzhiyun break;
249*4882a593Smuzhiyun case 0x01:
250*4882a593Smuzhiyun IBMramdac_ID = IBM525_RAMDAC;
251*4882a593Smuzhiyun break;
252*4882a593Smuzhiyun case 0x02:
253*4882a593Smuzhiyun if (rev == 0xf0)
254*4882a593Smuzhiyun IBMramdac_ID = IBM524_RAMDAC;
255*4882a593Smuzhiyun if (rev == 0xe0)
256*4882a593Smuzhiyun IBMramdac_ID = IBM524A_RAMDAC;
257*4882a593Smuzhiyun if (rev == 0xc0)
258*4882a593Smuzhiyun IBMramdac_ID = IBM526_RAMDAC;
259*4882a593Smuzhiyun if (rev == 0x80)
260*4882a593Smuzhiyun IBMramdac_ID = IBM526DB_RAMDAC;
261*4882a593Smuzhiyun break;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun if (id == 1 || id == 2) {
265*4882a593Smuzhiyun if (id == id2 && rev == rev2) { /* IBM RGB52x found */
266*4882a593Smuzhiyun /* check for 128bit VRAM -> RGB528 */
267*4882a593Smuzhiyun if (((*ramdacPtr->ReadDAC) (pScrn, IBMRGB_misc1) & 0x03) == 0x03) {
268*4882a593Smuzhiyun IBMramdac_ID = IBM528_RAMDAC; /* 128bit DAC found */
269*4882a593Smuzhiyun if (rev == 0xe0)
270*4882a593Smuzhiyun IBMramdac_ID = IBM528A_RAMDAC;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, rev, 0, IBMRGB_rev);
276*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, id, 0, IBMRGB_id);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun if (IBMramdac_ID == -1) {
279*4882a593Smuzhiyun xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
280*4882a593Smuzhiyun "Cannot determine IBM RAMDAC type, aborting\n");
281*4882a593Smuzhiyun return NULL;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun else {
284*4882a593Smuzhiyun xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
285*4882a593Smuzhiyun "Attached RAMDAC is %s\n",
286*4882a593Smuzhiyun IBMramdacDeviceInfo[IBMramdac_ID & 0xFFFF].DeviceName);
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun for (i = 0; ramdacs[i].token != -1; i++) {
290*4882a593Smuzhiyun if (ramdacs[i].token == IBMramdac_ID)
291*4882a593Smuzhiyun RamDacIsSupported = TRUE;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun if (!RamDacIsSupported) {
295*4882a593Smuzhiyun xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
296*4882a593Smuzhiyun "This IBM RAMDAC is NOT supported by this driver, aborting\n");
297*4882a593Smuzhiyun return NULL;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun ramdacHelperPtr = RamDacHelperCreateInfoRec();
301*4882a593Smuzhiyun switch (IBMramdac_ID) {
302*4882a593Smuzhiyun case IBM526_RAMDAC:
303*4882a593Smuzhiyun case IBM526DB_RAMDAC:
304*4882a593Smuzhiyun ramdacHelperPtr->SetBpp = IBMramdac526SetBpp;
305*4882a593Smuzhiyun ramdacHelperPtr->HWCursorInit = IBMramdac526HWCursorInit;
306*4882a593Smuzhiyun break;
307*4882a593Smuzhiyun case IBM640_RAMDAC:
308*4882a593Smuzhiyun ramdacHelperPtr->SetBpp = IBMramdac640SetBpp;
309*4882a593Smuzhiyun ramdacHelperPtr->HWCursorInit = IBMramdac640HWCursorInit;
310*4882a593Smuzhiyun break;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun ramdacPtr->RamDacType = IBMramdac_ID;
313*4882a593Smuzhiyun ramdacHelperPtr->RamDacType = IBMramdac_ID;
314*4882a593Smuzhiyun ramdacHelperPtr->Save = IBMramdacSave;
315*4882a593Smuzhiyun ramdacHelperPtr->Restore = IBMramdacRestore;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun return ramdacHelperPtr;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun void
IBMramdac526SetBpp(ScrnInfoPtr pScrn,RamDacRegRecPtr ramdacReg)321*4882a593Smuzhiyun IBMramdac526SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_key_control] = 0x00; /* Disable Chroma Key */
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun switch (pScrn->bitsPerPixel) {
326*4882a593Smuzhiyun case 32:
327*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_32BPP;
328*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_32bpp] = B32_DCOL_DIRECT;
329*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
330*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
331*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
332*4882a593Smuzhiyun if (pScrn->overlayFlags & OVERLAY_8_32_PLANAR) {
333*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_key_control] = 0x01; /* Enable Key */
334*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_key] = 0xFF;
335*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_key_mask] = 0xFF;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun break;
338*4882a593Smuzhiyun case 24:
339*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_24BPP;
340*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
341*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_24bpp] = B24_DCOL_DIRECT;
342*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
343*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
344*4882a593Smuzhiyun break;
345*4882a593Smuzhiyun case 16:
346*4882a593Smuzhiyun if (pScrn->depth == 16) {
347*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_16BPP;
348*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
349*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
350*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_16bpp] = B16_DCOL_DIRECT | B16_LINEAR |
351*4882a593Smuzhiyun B16_CONTIGUOUS | B16_565;
352*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun else {
355*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_16BPP;
356*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
357*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
358*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_16bpp] = B16_DCOL_DIRECT | B16_LINEAR |
359*4882a593Smuzhiyun B16_CONTIGUOUS | B16_555;
360*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun break;
363*4882a593Smuzhiyun case 8:
364*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_8BPP;
365*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
366*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
367*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
368*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_8bpp] = B8_DCOL_INDIRECT;
369*4882a593Smuzhiyun break;
370*4882a593Smuzhiyun case 4:
371*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_4BPP;
372*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
373*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
374*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
375*4882a593Smuzhiyun ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun IBMramdac526SetBppProc *
IBMramdac526SetBppWeak(void)380*4882a593Smuzhiyun IBMramdac526SetBppWeak(void)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun return IBMramdac526SetBpp;
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun void
IBMramdac640SetBpp(ScrnInfoPtr pScrn,RamDacRegRecPtr ramdacReg)386*4882a593Smuzhiyun IBMramdac640SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun unsigned char bpp = 0x00;
389*4882a593Smuzhiyun unsigned char overlaybpp = 0x00;
390*4882a593Smuzhiyun unsigned char offset = 0x00;
391*4882a593Smuzhiyun unsigned char dispcont = 0x44;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_WID_03_00] = 0x00;
394*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_WID_07_04] = 0x00;
395*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_DIAGS] = 0x07;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun switch (pScrn->depth) {
398*4882a593Smuzhiyun case 8:
399*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_07_00] = 0x00;
400*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_15_08] = 0x00;
401*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
402*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
403*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_16_1; /*16:1 Mux */
404*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
405*4882a593Smuzhiyun bpp = 0x03;
406*4882a593Smuzhiyun break;
407*4882a593Smuzhiyun case 15:
408*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_07_00] = 0x10;
409*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_15_08] = 0x11;
410*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
411*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
412*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_8_1; /* 8:1 Mux */
413*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
414*4882a593Smuzhiyun bpp = 0x0E;
415*4882a593Smuzhiyun break;
416*4882a593Smuzhiyun case 16:
417*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_07_00] = 0x10;
418*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_15_08] = 0x11;
419*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
420*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
421*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_8_1; /* 8:1 Mux */
422*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
423*4882a593Smuzhiyun bpp = 0x05;
424*4882a593Smuzhiyun break;
425*4882a593Smuzhiyun case 24:
426*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_07_00] = 0x30;
427*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_15_08] = 0x31;
428*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_23_16] = 0x32;
429*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_31_24] = 0x33;
430*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_4_1; /* 4:1 Mux */
431*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
432*4882a593Smuzhiyun bpp = 0x09;
433*4882a593Smuzhiyun if (pScrn->overlayFlags & OVERLAY_8_32_PLANAR) {
434*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_WID_07_04] = 0x04;
435*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_CHROMA_KEY0] = 0xFF;
436*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_CHROMA_MASK0] = 0xFF;
437*4882a593Smuzhiyun offset = 0x04;
438*4882a593Smuzhiyun overlaybpp = 0x04;
439*4882a593Smuzhiyun dispcont = 0x48;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun break;
442*4882a593Smuzhiyun case 30: /* 10 bit dac */
443*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_07_00] = 0x30;
444*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_15_08] = 0x31;
445*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_23_16] = 0x32;
446*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_31_24] = 0x33;
447*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_4_1; /* 4:1 Mux */
448*4882a593Smuzhiyun ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PSIZE10 | IBM640_PCLK_8; /* pll / 8 */
449*4882a593Smuzhiyun bpp = 0x0D;
450*4882a593Smuzhiyun break;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun int i;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun for (i = 0x100; i < 0x140; i += 4) {
457*4882a593Smuzhiyun /* Initialize FrameBuffer Window Attribute Table */
458*4882a593Smuzhiyun ramdacReg->DacRegs[i + 0] = bpp;
459*4882a593Smuzhiyun ramdacReg->DacRegs[i + 1] = offset;
460*4882a593Smuzhiyun ramdacReg->DacRegs[i + 2] = 0x00;
461*4882a593Smuzhiyun ramdacReg->DacRegs[i + 3] = 0x00;
462*4882a593Smuzhiyun /* Initialize Overlay Window Attribute Table */
463*4882a593Smuzhiyun ramdacReg->DacRegs[i + 0x100] = overlaybpp;
464*4882a593Smuzhiyun ramdacReg->DacRegs[i + 0x101] = 0x00;
465*4882a593Smuzhiyun ramdacReg->DacRegs[i + 0x102] = 0x00;
466*4882a593Smuzhiyun ramdacReg->DacRegs[i + 0x103] = dispcont;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun static void
IBMramdac526ShowCursor(ScrnInfoPtr pScrn)472*4882a593Smuzhiyun IBMramdac526ShowCursor(ScrnInfoPtr pScrn)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun /* Enable cursor - X11 mode */
477*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs, 0x00, 0x07);
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun static void
IBMramdac640ShowCursor(ScrnInfoPtr pScrn)481*4882a593Smuzhiyun IBMramdac640ShowCursor(ScrnInfoPtr pScrn)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun /* Enable cursor - mode2 (x11 mode) */
486*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURSOR_CONTROL, 0x00, 0x0B);
487*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CROSSHAIR_CONTROL, 0x00, 0x00);
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun static void
IBMramdac526HideCursor(ScrnInfoPtr pScrn)491*4882a593Smuzhiyun IBMramdac526HideCursor(ScrnInfoPtr pScrn)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun /* Disable cursor - X11 mode */
496*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs, 0x00, 0x24);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun static void
IBMramdac640HideCursor(ScrnInfoPtr pScrn)500*4882a593Smuzhiyun IBMramdac640HideCursor(ScrnInfoPtr pScrn)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun /* Disable cursor - mode2 (x11 mode) */
505*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURSOR_CONTROL, 0x00, 0x08);
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun static void
IBMramdac526SetCursorPosition(ScrnInfoPtr pScrn,int x,int y)509*4882a593Smuzhiyun IBMramdac526SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun x += 64;
514*4882a593Smuzhiyun y += 64;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_hot_x, 0x00, 0x3f);
517*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_hot_y, 0x00, 0x3f);
518*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_xl, 0x00, x & 0xff);
519*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_xh, 0x00, (x >> 8) & 0xf);
520*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_yl, 0x00, y & 0xff);
521*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_yh, 0x00, (y >> 8) & 0xf);
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun static void
IBMramdac640SetCursorPosition(ScrnInfoPtr pScrn,int x,int y)525*4882a593Smuzhiyun IBMramdac640SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
526*4882a593Smuzhiyun {
527*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun x += 64;
530*4882a593Smuzhiyun y += 64;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_OFFSETX, 0x00, 0x3f);
533*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_OFFSETY, 0x00, 0x3f);
534*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_X_LOW, 0x00, x & 0xff);
535*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_X_HIGH, 0x00, (x >> 8) & 0xf);
536*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_Y_LOW, 0x00, y & 0xff);
537*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_Y_HIGH, 0x00, (y >> 8) & 0xf);
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun static void
IBMramdac526SetCursorColors(ScrnInfoPtr pScrn,int bg,int fg)541*4882a593Smuzhiyun IBMramdac526SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
542*4882a593Smuzhiyun {
543*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col1_r, 0x00, bg >> 16);
546*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col1_g, 0x00, bg >> 8);
547*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col1_b, 0x00, bg);
548*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col2_r, 0x00, fg >> 16);
549*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col2_g, 0x00, fg >> 8);
550*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col2_b, 0x00, fg);
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun static void
IBMramdac640SetCursorColors(ScrnInfoPtr pScrn,int bg,int fg)554*4882a593Smuzhiyun IBMramdac640SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_COL0, 0x00, 0);
559*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, fg >> 16);
560*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, fg >> 8);
561*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, fg);
562*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, bg >> 16);
563*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, bg >> 8);
564*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, bg);
565*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, fg >> 16);
566*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, fg >> 8);
567*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, fg);
568*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, bg >> 16);
569*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, bg >> 8);
570*4882a593Smuzhiyun (*ramdacPtr->WriteData) (pScrn, bg);
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun static Bool
IBMramdac526LoadCursorImage(ScrnInfoPtr pScrn,unsigned char * src)574*4882a593Smuzhiyun IBMramdac526LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
575*4882a593Smuzhiyun {
576*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
577*4882a593Smuzhiyun int i;
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun /*
580*4882a593Smuzhiyun * Output the cursor data. The realize function has put the planes into
581*4882a593Smuzhiyun * their correct order, so we can just blast this out.
582*4882a593Smuzhiyun */
583*4882a593Smuzhiyun for (i = 0; i < 1024; i++)
584*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_array + i, 0x00, (*src++));
585*4882a593Smuzhiyun return TRUE;
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun static Bool
IBMramdac640LoadCursorImage(ScrnInfoPtr pScrn,unsigned char * src)589*4882a593Smuzhiyun IBMramdac640LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
590*4882a593Smuzhiyun {
591*4882a593Smuzhiyun RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
592*4882a593Smuzhiyun int i;
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun /*
595*4882a593Smuzhiyun * Output the cursor data. The realize function has put the planes into
596*4882a593Smuzhiyun * their correct order, so we can just blast this out.
597*4882a593Smuzhiyun */
598*4882a593Smuzhiyun for (i = 0; i < 1024; i++)
599*4882a593Smuzhiyun (*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_WRITE + i, 0x00, (*src++));
600*4882a593Smuzhiyun return TRUE;
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun static Bool
IBMramdac526UseHWCursor(ScreenPtr pScr,CursorPtr pCurs)604*4882a593Smuzhiyun IBMramdac526UseHWCursor(ScreenPtr pScr, CursorPtr pCurs)
605*4882a593Smuzhiyun {
606*4882a593Smuzhiyun return TRUE;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun static Bool
IBMramdac640UseHWCursor(ScreenPtr pScr,CursorPtr pCurs)610*4882a593Smuzhiyun IBMramdac640UseHWCursor(ScreenPtr pScr, CursorPtr pCurs)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun return TRUE;
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun void
IBMramdac526HWCursorInit(xf86CursorInfoPtr infoPtr)616*4882a593Smuzhiyun IBMramdac526HWCursorInit(xf86CursorInfoPtr infoPtr)
617*4882a593Smuzhiyun {
618*4882a593Smuzhiyun infoPtr->MaxWidth = 64;
619*4882a593Smuzhiyun infoPtr->MaxHeight = 64;
620*4882a593Smuzhiyun infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
621*4882a593Smuzhiyun HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
622*4882a593Smuzhiyun HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1;
623*4882a593Smuzhiyun infoPtr->SetCursorColors = IBMramdac526SetCursorColors;
624*4882a593Smuzhiyun infoPtr->SetCursorPosition = IBMramdac526SetCursorPosition;
625*4882a593Smuzhiyun infoPtr->LoadCursorImageCheck = IBMramdac526LoadCursorImage;
626*4882a593Smuzhiyun infoPtr->HideCursor = IBMramdac526HideCursor;
627*4882a593Smuzhiyun infoPtr->ShowCursor = IBMramdac526ShowCursor;
628*4882a593Smuzhiyun infoPtr->UseHWCursor = IBMramdac526UseHWCursor;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun void
IBMramdac640HWCursorInit(xf86CursorInfoPtr infoPtr)632*4882a593Smuzhiyun IBMramdac640HWCursorInit(xf86CursorInfoPtr infoPtr)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun infoPtr->MaxWidth = 64;
635*4882a593Smuzhiyun infoPtr->MaxHeight = 64;
636*4882a593Smuzhiyun infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
637*4882a593Smuzhiyun HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
638*4882a593Smuzhiyun HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1;
639*4882a593Smuzhiyun infoPtr->SetCursorColors = IBMramdac640SetCursorColors;
640*4882a593Smuzhiyun infoPtr->SetCursorPosition = IBMramdac640SetCursorPosition;
641*4882a593Smuzhiyun infoPtr->LoadCursorImageCheck = IBMramdac640LoadCursorImage;
642*4882a593Smuzhiyun infoPtr->HideCursor = IBMramdac640HideCursor;
643*4882a593Smuzhiyun infoPtr->ShowCursor = IBMramdac640ShowCursor;
644*4882a593Smuzhiyun infoPtr->UseHWCursor = IBMramdac640UseHWCursor;
645*4882a593Smuzhiyun }
646