xref: /OK3568_Linux_fs/kernel/drivers/media/pci/mantis/mantis_vp1041.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun 	Mantis VP-1041 driver
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun 	Copyright (C) Manu Abraham (abraham.manu@gmail.com)
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/signal.h>
10*4882a593Smuzhiyun #include <linux/sched.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <media/dmxdev.h>
14*4882a593Smuzhiyun #include <media/dvbdev.h>
15*4882a593Smuzhiyun #include <media/dvb_demux.h>
16*4882a593Smuzhiyun #include <media/dvb_frontend.h>
17*4882a593Smuzhiyun #include <media/dvb_net.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include "mantis_common.h"
20*4882a593Smuzhiyun #include "mantis_ioc.h"
21*4882a593Smuzhiyun #include "mantis_dvb.h"
22*4882a593Smuzhiyun #include "mantis_vp1041.h"
23*4882a593Smuzhiyun #include "stb0899_reg.h"
24*4882a593Smuzhiyun #include "stb0899_drv.h"
25*4882a593Smuzhiyun #include "stb0899_cfg.h"
26*4882a593Smuzhiyun #include "stb6100_cfg.h"
27*4882a593Smuzhiyun #include "stb6100.h"
28*4882a593Smuzhiyun #include "lnbp21.h"
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define MANTIS_MODEL_NAME	"VP-1041"
31*4882a593Smuzhiyun #define MANTIS_DEV_TYPE		"DSS/DVB-S/DVB-S2"
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static const struct stb0899_s1_reg vp1041_stb0899_s1_init_1[] = {
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	/* 0x0000000b, *//* SYSREG */
36*4882a593Smuzhiyun 	{ STB0899_DEV_ID		, 0x30 },
37*4882a593Smuzhiyun 	{ STB0899_DISCNTRL1		, 0x32 },
38*4882a593Smuzhiyun 	{ STB0899_DISCNTRL2		, 0x80 },
39*4882a593Smuzhiyun 	{ STB0899_DISRX_ST0		, 0x04 },
40*4882a593Smuzhiyun 	{ STB0899_DISRX_ST1		, 0x00 },
41*4882a593Smuzhiyun 	{ STB0899_DISPARITY		, 0x00 },
42*4882a593Smuzhiyun 	{ STB0899_DISSTATUS		, 0x20 },
43*4882a593Smuzhiyun 	{ STB0899_DISF22		, 0x99 },
44*4882a593Smuzhiyun 	{ STB0899_DISF22RX		, 0xa8 },
45*4882a593Smuzhiyun 	/* SYSREG ? */
46*4882a593Smuzhiyun 	{ STB0899_ACRPRESC		, 0x11 },
47*4882a593Smuzhiyun 	{ STB0899_ACRDIV1		, 0x0a },
48*4882a593Smuzhiyun 	{ STB0899_ACRDIV2		, 0x05 },
49*4882a593Smuzhiyun 	{ STB0899_DACR1			, 0x00 },
50*4882a593Smuzhiyun 	{ STB0899_DACR2			, 0x00 },
51*4882a593Smuzhiyun 	{ STB0899_OUTCFG		, 0x00 },
52*4882a593Smuzhiyun 	{ STB0899_MODECFG		, 0x00 },
53*4882a593Smuzhiyun 	{ STB0899_IRQSTATUS_3		, 0xfe },
54*4882a593Smuzhiyun 	{ STB0899_IRQSTATUS_2		, 0x03 },
55*4882a593Smuzhiyun 	{ STB0899_IRQSTATUS_1		, 0x7c },
56*4882a593Smuzhiyun 	{ STB0899_IRQSTATUS_0		, 0xf4 },
57*4882a593Smuzhiyun 	{ STB0899_IRQMSK_3		, 0xf3 },
58*4882a593Smuzhiyun 	{ STB0899_IRQMSK_2		, 0xfc },
59*4882a593Smuzhiyun 	{ STB0899_IRQMSK_1		, 0xff },
60*4882a593Smuzhiyun 	{ STB0899_IRQMSK_0		, 0xff },
61*4882a593Smuzhiyun 	{ STB0899_IRQCFG		, 0x00 },
62*4882a593Smuzhiyun 	{ STB0899_I2CCFG		, 0x88 },
63*4882a593Smuzhiyun 	{ STB0899_I2CRPT		, 0x58 },
64*4882a593Smuzhiyun 	{ STB0899_IOPVALUE5		, 0x00 },
65*4882a593Smuzhiyun 	{ STB0899_IOPVALUE4		, 0x33 },
66*4882a593Smuzhiyun 	{ STB0899_IOPVALUE3		, 0x6d },
67*4882a593Smuzhiyun 	{ STB0899_IOPVALUE2		, 0x90 },
68*4882a593Smuzhiyun 	{ STB0899_IOPVALUE1		, 0x60 },
69*4882a593Smuzhiyun 	{ STB0899_IOPVALUE0		, 0x00 },
70*4882a593Smuzhiyun 	{ STB0899_GPIO00CFG		, 0x82 },
71*4882a593Smuzhiyun 	{ STB0899_GPIO01CFG		, 0x82 },
72*4882a593Smuzhiyun 	{ STB0899_GPIO02CFG		, 0x82 },
73*4882a593Smuzhiyun 	{ STB0899_GPIO03CFG		, 0x82 },
74*4882a593Smuzhiyun 	{ STB0899_GPIO04CFG		, 0x82 },
75*4882a593Smuzhiyun 	{ STB0899_GPIO05CFG		, 0x82 },
76*4882a593Smuzhiyun 	{ STB0899_GPIO06CFG		, 0x82 },
77*4882a593Smuzhiyun 	{ STB0899_GPIO07CFG		, 0x82 },
78*4882a593Smuzhiyun 	{ STB0899_GPIO08CFG		, 0x82 },
79*4882a593Smuzhiyun 	{ STB0899_GPIO09CFG		, 0x82 },
80*4882a593Smuzhiyun 	{ STB0899_GPIO10CFG		, 0x82 },
81*4882a593Smuzhiyun 	{ STB0899_GPIO11CFG		, 0x82 },
82*4882a593Smuzhiyun 	{ STB0899_GPIO12CFG		, 0x82 },
83*4882a593Smuzhiyun 	{ STB0899_GPIO13CFG		, 0x82 },
84*4882a593Smuzhiyun 	{ STB0899_GPIO14CFG		, 0x82 },
85*4882a593Smuzhiyun 	{ STB0899_GPIO15CFG		, 0x82 },
86*4882a593Smuzhiyun 	{ STB0899_GPIO16CFG		, 0x82 },
87*4882a593Smuzhiyun 	{ STB0899_GPIO17CFG		, 0x82 },
88*4882a593Smuzhiyun 	{ STB0899_GPIO18CFG		, 0x82 },
89*4882a593Smuzhiyun 	{ STB0899_GPIO19CFG		, 0x82 },
90*4882a593Smuzhiyun 	{ STB0899_GPIO20CFG		, 0x82 },
91*4882a593Smuzhiyun 	{ STB0899_SDATCFG		, 0xb8 },
92*4882a593Smuzhiyun 	{ STB0899_SCLTCFG		, 0xba },
93*4882a593Smuzhiyun 	{ STB0899_AGCRFCFG		, 0x1c }, /* 0x11 */
94*4882a593Smuzhiyun 	{ STB0899_GPIO22		, 0x82 }, /* AGCBB2CFG */
95*4882a593Smuzhiyun 	{ STB0899_GPIO21		, 0x91 }, /* AGCBB1CFG */
96*4882a593Smuzhiyun 	{ STB0899_DIRCLKCFG		, 0x82 },
97*4882a593Smuzhiyun 	{ STB0899_CLKOUT27CFG		, 0x7e },
98*4882a593Smuzhiyun 	{ STB0899_STDBYCFG		, 0x82 },
99*4882a593Smuzhiyun 	{ STB0899_CS0CFG		, 0x82 },
100*4882a593Smuzhiyun 	{ STB0899_CS1CFG		, 0x82 },
101*4882a593Smuzhiyun 	{ STB0899_DISEQCOCFG		, 0x20 },
102*4882a593Smuzhiyun 	{ STB0899_GPIO32CFG		, 0x82 },
103*4882a593Smuzhiyun 	{ STB0899_GPIO33CFG		, 0x82 },
104*4882a593Smuzhiyun 	{ STB0899_GPIO34CFG		, 0x82 },
105*4882a593Smuzhiyun 	{ STB0899_GPIO35CFG		, 0x82 },
106*4882a593Smuzhiyun 	{ STB0899_GPIO36CFG		, 0x82 },
107*4882a593Smuzhiyun 	{ STB0899_GPIO37CFG		, 0x82 },
108*4882a593Smuzhiyun 	{ STB0899_GPIO38CFG		, 0x82 },
109*4882a593Smuzhiyun 	{ STB0899_GPIO39CFG		, 0x82 },
110*4882a593Smuzhiyun 	{ STB0899_NCOARSE		, 0x17 }, /* 0x15 = 27 Mhz Clock, F/3 = 198MHz, F/6 = 99MHz */
111*4882a593Smuzhiyun 	{ STB0899_SYNTCTRL		, 0x02 }, /* 0x00 = CLK from CLKI, 0x02 = CLK from XTALI */
112*4882a593Smuzhiyun 	{ STB0899_FILTCTRL		, 0x00 },
113*4882a593Smuzhiyun 	{ STB0899_SYSCTRL		, 0x01 },
114*4882a593Smuzhiyun 	{ STB0899_STOPCLK1		, 0x20 },
115*4882a593Smuzhiyun 	{ STB0899_STOPCLK2		, 0x00 },
116*4882a593Smuzhiyun 	{ STB0899_INTBUFSTATUS		, 0x00 },
117*4882a593Smuzhiyun 	{ STB0899_INTBUFCTRL		, 0x0a },
118*4882a593Smuzhiyun 	{ 0xffff			, 0xff },
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
122*4882a593Smuzhiyun 	{ STB0899_DEMOD			, 0x00 },
123*4882a593Smuzhiyun 	{ STB0899_RCOMPC		, 0xc9 },
124*4882a593Smuzhiyun 	{ STB0899_AGC1CN		, 0x01 },
125*4882a593Smuzhiyun 	{ STB0899_AGC1REF		, 0x10 },
126*4882a593Smuzhiyun 	{ STB0899_RTC			, 0x23 },
127*4882a593Smuzhiyun 	{ STB0899_TMGCFG		, 0x4e },
128*4882a593Smuzhiyun 	{ STB0899_AGC2REF		, 0x34 },
129*4882a593Smuzhiyun 	{ STB0899_TLSR			, 0x84 },
130*4882a593Smuzhiyun 	{ STB0899_CFD			, 0xf7 },
131*4882a593Smuzhiyun 	{ STB0899_ACLC			, 0x87 },
132*4882a593Smuzhiyun 	{ STB0899_BCLC			, 0x94 },
133*4882a593Smuzhiyun 	{ STB0899_EQON			, 0x41 },
134*4882a593Smuzhiyun 	{ STB0899_LDT			, 0xf1 },
135*4882a593Smuzhiyun 	{ STB0899_LDT2			, 0xe3 },
136*4882a593Smuzhiyun 	{ STB0899_EQUALREF		, 0xb4 },
137*4882a593Smuzhiyun 	{ STB0899_TMGRAMP		, 0x10 },
138*4882a593Smuzhiyun 	{ STB0899_TMGTHD		, 0x30 },
139*4882a593Smuzhiyun 	{ STB0899_IDCCOMP		, 0xfd },
140*4882a593Smuzhiyun 	{ STB0899_QDCCOMP		, 0xff },
141*4882a593Smuzhiyun 	{ STB0899_POWERI		, 0x0c },
142*4882a593Smuzhiyun 	{ STB0899_POWERQ		, 0x0f },
143*4882a593Smuzhiyun 	{ STB0899_RCOMP			, 0x6c },
144*4882a593Smuzhiyun 	{ STB0899_AGCIQIN		, 0x80 },
145*4882a593Smuzhiyun 	{ STB0899_AGC2I1		, 0x06 },
146*4882a593Smuzhiyun 	{ STB0899_AGC2I2		, 0x00 },
147*4882a593Smuzhiyun 	{ STB0899_TLIR			, 0x30 },
148*4882a593Smuzhiyun 	{ STB0899_RTF			, 0x7f },
149*4882a593Smuzhiyun 	{ STB0899_DSTATUS		, 0x00 },
150*4882a593Smuzhiyun 	{ STB0899_LDI			, 0xbc },
151*4882a593Smuzhiyun 	{ STB0899_CFRM			, 0xea },
152*4882a593Smuzhiyun 	{ STB0899_CFRL			, 0x31 },
153*4882a593Smuzhiyun 	{ STB0899_NIRM			, 0x2b },
154*4882a593Smuzhiyun 	{ STB0899_NIRL			, 0x80 },
155*4882a593Smuzhiyun 	{ STB0899_ISYMB			, 0x1d },
156*4882a593Smuzhiyun 	{ STB0899_QSYMB			, 0xa6 },
157*4882a593Smuzhiyun 	{ STB0899_SFRH			, 0x2f },
158*4882a593Smuzhiyun 	{ STB0899_SFRM			, 0x68 },
159*4882a593Smuzhiyun 	{ STB0899_SFRL			, 0x40 },
160*4882a593Smuzhiyun 	{ STB0899_SFRUPH		, 0x2f },
161*4882a593Smuzhiyun 	{ STB0899_SFRUPM		, 0x68 },
162*4882a593Smuzhiyun 	{ STB0899_SFRUPL		, 0x40 },
163*4882a593Smuzhiyun 	{ STB0899_EQUAI1		, 0x02 },
164*4882a593Smuzhiyun 	{ STB0899_EQUAQ1		, 0xff },
165*4882a593Smuzhiyun 	{ STB0899_EQUAI2		, 0x04 },
166*4882a593Smuzhiyun 	{ STB0899_EQUAQ2		, 0x05 },
167*4882a593Smuzhiyun 	{ STB0899_EQUAI3		, 0x02 },
168*4882a593Smuzhiyun 	{ STB0899_EQUAQ3		, 0xfd },
169*4882a593Smuzhiyun 	{ STB0899_EQUAI4		, 0x03 },
170*4882a593Smuzhiyun 	{ STB0899_EQUAQ4		, 0x07 },
171*4882a593Smuzhiyun 	{ STB0899_EQUAI5		, 0x08 },
172*4882a593Smuzhiyun 	{ STB0899_EQUAQ5		, 0xf5 },
173*4882a593Smuzhiyun 	{ STB0899_DSTATUS2		, 0x00 },
174*4882a593Smuzhiyun 	{ STB0899_VSTATUS		, 0x00 },
175*4882a593Smuzhiyun 	{ STB0899_VERROR		, 0x86 },
176*4882a593Smuzhiyun 	{ STB0899_IQSWAP		, 0x2a },
177*4882a593Smuzhiyun 	{ STB0899_ECNT1M		, 0x00 },
178*4882a593Smuzhiyun 	{ STB0899_ECNT1L		, 0x00 },
179*4882a593Smuzhiyun 	{ STB0899_ECNT2M		, 0x00 },
180*4882a593Smuzhiyun 	{ STB0899_ECNT2L		, 0x00 },
181*4882a593Smuzhiyun 	{ STB0899_ECNT3M		, 0x0a },
182*4882a593Smuzhiyun 	{ STB0899_ECNT3L		, 0xad },
183*4882a593Smuzhiyun 	{ STB0899_FECAUTO1		, 0x06 },
184*4882a593Smuzhiyun 	{ STB0899_FECM			, 0x01 },
185*4882a593Smuzhiyun 	{ STB0899_VTH12			, 0xb0 },
186*4882a593Smuzhiyun 	{ STB0899_VTH23			, 0x7a },
187*4882a593Smuzhiyun 	{ STB0899_VTH34			, 0x58 },
188*4882a593Smuzhiyun 	{ STB0899_VTH56			, 0x38 },
189*4882a593Smuzhiyun 	{ STB0899_VTH67			, 0x34 },
190*4882a593Smuzhiyun 	{ STB0899_VTH78			, 0x24 },
191*4882a593Smuzhiyun 	{ STB0899_PRVIT			, 0xff },
192*4882a593Smuzhiyun 	{ STB0899_VITSYNC		, 0x19 },
193*4882a593Smuzhiyun 	{ STB0899_RSULC			, 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
194*4882a593Smuzhiyun 	{ STB0899_TSULC			, 0x42 },
195*4882a593Smuzhiyun 	{ STB0899_RSLLC			, 0x41 },
196*4882a593Smuzhiyun 	{ STB0899_TSLPL			, 0x12 },
197*4882a593Smuzhiyun 	{ STB0899_TSCFGH		, 0x0c },
198*4882a593Smuzhiyun 	{ STB0899_TSCFGM		, 0x00 },
199*4882a593Smuzhiyun 	{ STB0899_TSCFGL		, 0x00 },
200*4882a593Smuzhiyun 	{ STB0899_TSOUT			, 0x69 }, /* 0x0d for CAM */
201*4882a593Smuzhiyun 	{ STB0899_RSSYNCDEL		, 0x00 },
202*4882a593Smuzhiyun 	{ STB0899_TSINHDELH		, 0x02 },
203*4882a593Smuzhiyun 	{ STB0899_TSINHDELM		, 0x00 },
204*4882a593Smuzhiyun 	{ STB0899_TSINHDELL		, 0x00 },
205*4882a593Smuzhiyun 	{ STB0899_TSLLSTKM		, 0x1b },
206*4882a593Smuzhiyun 	{ STB0899_TSLLSTKL		, 0xb3 },
207*4882a593Smuzhiyun 	{ STB0899_TSULSTKM		, 0x00 },
208*4882a593Smuzhiyun 	{ STB0899_TSULSTKL		, 0x00 },
209*4882a593Smuzhiyun 	{ STB0899_PCKLENUL		, 0xbc },
210*4882a593Smuzhiyun 	{ STB0899_PCKLENLL		, 0xcc },
211*4882a593Smuzhiyun 	{ STB0899_RSPCKLEN		, 0xbd },
212*4882a593Smuzhiyun 	{ STB0899_TSSTATUS		, 0x90 },
213*4882a593Smuzhiyun 	{ STB0899_ERRCTRL1		, 0xb6 },
214*4882a593Smuzhiyun 	{ STB0899_ERRCTRL2		, 0x95 },
215*4882a593Smuzhiyun 	{ STB0899_ERRCTRL3		, 0x8d },
216*4882a593Smuzhiyun 	{ STB0899_DMONMSK1		, 0x27 },
217*4882a593Smuzhiyun 	{ STB0899_DMONMSK0		, 0x03 },
218*4882a593Smuzhiyun 	{ STB0899_DEMAPVIT		, 0x5c },
219*4882a593Smuzhiyun 	{ STB0899_PLPARM		, 0x19 },
220*4882a593Smuzhiyun 	{ STB0899_PDELCTRL		, 0x48 },
221*4882a593Smuzhiyun 	{ STB0899_PDELCTRL2		, 0x00 },
222*4882a593Smuzhiyun 	{ STB0899_BBHCTRL1		, 0x00 },
223*4882a593Smuzhiyun 	{ STB0899_BBHCTRL2		, 0x00 },
224*4882a593Smuzhiyun 	{ STB0899_HYSTTHRESH		, 0x77 },
225*4882a593Smuzhiyun 	{ STB0899_MATCSTM		, 0x00 },
226*4882a593Smuzhiyun 	{ STB0899_MATCSTL		, 0x00 },
227*4882a593Smuzhiyun 	{ STB0899_UPLCSTM		, 0x00 },
228*4882a593Smuzhiyun 	{ STB0899_UPLCSTL		, 0x00 },
229*4882a593Smuzhiyun 	{ STB0899_DFLCSTM		, 0x00 },
230*4882a593Smuzhiyun 	{ STB0899_DFLCSTL		, 0x00 },
231*4882a593Smuzhiyun 	{ STB0899_SYNCCST		, 0x00 },
232*4882a593Smuzhiyun 	{ STB0899_SYNCDCSTM		, 0x00 },
233*4882a593Smuzhiyun 	{ STB0899_SYNCDCSTL		, 0x00 },
234*4882a593Smuzhiyun 	{ STB0899_ISI_ENTRY		, 0x00 },
235*4882a593Smuzhiyun 	{ STB0899_ISI_BIT_EN		, 0x00 },
236*4882a593Smuzhiyun 	{ STB0899_MATSTRM		, 0xf0 },
237*4882a593Smuzhiyun 	{ STB0899_MATSTRL		, 0x02 },
238*4882a593Smuzhiyun 	{ STB0899_UPLSTRM		, 0x45 },
239*4882a593Smuzhiyun 	{ STB0899_UPLSTRL		, 0x60 },
240*4882a593Smuzhiyun 	{ STB0899_DFLSTRM		, 0xe3 },
241*4882a593Smuzhiyun 	{ STB0899_DFLSTRL		, 0x00 },
242*4882a593Smuzhiyun 	{ STB0899_SYNCSTR		, 0x47 },
243*4882a593Smuzhiyun 	{ STB0899_SYNCDSTRM		, 0x05 },
244*4882a593Smuzhiyun 	{ STB0899_SYNCDSTRL		, 0x18 },
245*4882a593Smuzhiyun 	{ STB0899_CFGPDELSTATUS1	, 0x19 },
246*4882a593Smuzhiyun 	{ STB0899_CFGPDELSTATUS2	, 0x2b },
247*4882a593Smuzhiyun 	{ STB0899_BBFERRORM		, 0x00 },
248*4882a593Smuzhiyun 	{ STB0899_BBFERRORL		, 0x01 },
249*4882a593Smuzhiyun 	{ STB0899_UPKTERRORM		, 0x00 },
250*4882a593Smuzhiyun 	{ STB0899_UPKTERRORL		, 0x00 },
251*4882a593Smuzhiyun 	{ 0xffff			, 0xff },
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun static struct stb0899_config vp1041_stb0899_config = {
255*4882a593Smuzhiyun 	.init_dev		= vp1041_stb0899_s1_init_1,
256*4882a593Smuzhiyun 	.init_s2_demod		= stb0899_s2_init_2,
257*4882a593Smuzhiyun 	.init_s1_demod		= vp1041_stb0899_s1_init_3,
258*4882a593Smuzhiyun 	.init_s2_fec		= stb0899_s2_init_4,
259*4882a593Smuzhiyun 	.init_tst		= stb0899_s1_init_5,
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	.demod_address		= 0x68, /*  0xd0 >> 1 */
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	.xtal_freq		= 27000000,
264*4882a593Smuzhiyun 	.inversion		= IQ_SWAP_ON,
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	.lo_clk			= 76500000,
267*4882a593Smuzhiyun 	.hi_clk			= 99000000,
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	.esno_ave		= STB0899_DVBS2_ESNO_AVE,
270*4882a593Smuzhiyun 	.esno_quant		= STB0899_DVBS2_ESNO_QUANT,
271*4882a593Smuzhiyun 	.avframes_coarse	= STB0899_DVBS2_AVFRAMES_COARSE,
272*4882a593Smuzhiyun 	.avframes_fine		= STB0899_DVBS2_AVFRAMES_FINE,
273*4882a593Smuzhiyun 	.miss_threshold		= STB0899_DVBS2_MISS_THRESHOLD,
274*4882a593Smuzhiyun 	.uwp_threshold_acq	= STB0899_DVBS2_UWP_THRESHOLD_ACQ,
275*4882a593Smuzhiyun 	.uwp_threshold_track	= STB0899_DVBS2_UWP_THRESHOLD_TRACK,
276*4882a593Smuzhiyun 	.uwp_threshold_sof	= STB0899_DVBS2_UWP_THRESHOLD_SOF,
277*4882a593Smuzhiyun 	.sof_search_timeout	= STB0899_DVBS2_SOF_SEARCH_TIMEOUT,
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	.btr_nco_bits		= STB0899_DVBS2_BTR_NCO_BITS,
280*4882a593Smuzhiyun 	.btr_gain_shift_offset	= STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET,
281*4882a593Smuzhiyun 	.crl_nco_bits		= STB0899_DVBS2_CRL_NCO_BITS,
282*4882a593Smuzhiyun 	.ldpc_max_iter		= STB0899_DVBS2_LDPC_MAX_ITER,
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	.tuner_get_frequency	= stb6100_get_frequency,
285*4882a593Smuzhiyun 	.tuner_set_frequency	= stb6100_set_frequency,
286*4882a593Smuzhiyun 	.tuner_set_bandwidth	= stb6100_set_bandwidth,
287*4882a593Smuzhiyun 	.tuner_get_bandwidth	= stb6100_get_bandwidth,
288*4882a593Smuzhiyun 	.tuner_set_rfsiggain	= NULL,
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun static struct stb6100_config vp1041_stb6100_config = {
292*4882a593Smuzhiyun 	.tuner_address	= 0x60,
293*4882a593Smuzhiyun 	.refclock	= 27000000,
294*4882a593Smuzhiyun };
295*4882a593Smuzhiyun 
vp1041_frontend_init(struct mantis_pci * mantis,struct dvb_frontend * fe)296*4882a593Smuzhiyun static int vp1041_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	struct i2c_adapter *adapter	= &mantis->adapter;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	int err = 0;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	err = mantis_frontend_power(mantis, POWER_ON);
303*4882a593Smuzhiyun 	if (err == 0) {
304*4882a593Smuzhiyun 		mantis_frontend_soft_reset(mantis);
305*4882a593Smuzhiyun 		msleep(250);
306*4882a593Smuzhiyun 		mantis->fe = dvb_attach(stb0899_attach, &vp1041_stb0899_config, adapter);
307*4882a593Smuzhiyun 		if (mantis->fe) {
308*4882a593Smuzhiyun 			dprintk(MANTIS_ERROR, 1,
309*4882a593Smuzhiyun 				"found STB0899 DVB-S/DVB-S2 frontend @0x%02x",
310*4882a593Smuzhiyun 				vp1041_stb0899_config.demod_address);
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 			if (dvb_attach(stb6100_attach, mantis->fe, &vp1041_stb6100_config, adapter)) {
313*4882a593Smuzhiyun 				if (!dvb_attach(lnbp21_attach, mantis->fe, adapter, 0, 0))
314*4882a593Smuzhiyun 					dprintk(MANTIS_ERROR, 1, "No LNBP21 found!");
315*4882a593Smuzhiyun 			}
316*4882a593Smuzhiyun 		} else {
317*4882a593Smuzhiyun 			return -EREMOTEIO;
318*4882a593Smuzhiyun 		}
319*4882a593Smuzhiyun 	} else {
320*4882a593Smuzhiyun 		dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
321*4882a593Smuzhiyun 			adapter->name,
322*4882a593Smuzhiyun 			err);
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 		return -EIO;
325*4882a593Smuzhiyun 	}
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	dprintk(MANTIS_ERROR, 1, "Done!");
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	return 0;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun struct mantis_hwconfig vp1041_config = {
334*4882a593Smuzhiyun 	.model_name	= MANTIS_MODEL_NAME,
335*4882a593Smuzhiyun 	.dev_type	= MANTIS_DEV_TYPE,
336*4882a593Smuzhiyun 	.ts_size	= MANTIS_TS_188,
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	.baud_rate	= MANTIS_BAUD_9600,
339*4882a593Smuzhiyun 	.parity		= MANTIS_PARITY_NONE,
340*4882a593Smuzhiyun 	.bytes		= 0,
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	.frontend_init	= vp1041_frontend_init,
343*4882a593Smuzhiyun 	.power		= GPIF_A12,
344*4882a593Smuzhiyun 	.reset		= GPIF_A13,
345*4882a593Smuzhiyun };
346