| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/pwm/ |
| H A D | pwm.txt | 1 Specifying PWM information for devices 4 1) PWM user nodes 5 ----------------- 7 PWM users should specify a list of PWM devices that they want to use 8 with a property containing a 'pwm-list': 10 pwm-list ::= <single-pwm> [pwm-list] 11 single-pwm ::= <pwm-phandle> <pwm-specifier> 12 pwm-phandle : phandle to PWM controller node 13 pwm-specifier : array of #pwm-cells specifying the given PWM 16 PWM properties should be named "pwms". The exact meaning of each pwms [all …]
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| H A D | tegra20-pwm.txt | 4 - compatible: should be one of: 5 - "nvidia,tegra20-pwm" 6 - "nvidia,tegra30-pwm" 7 - reg: physical base address and length of the controller's registers 8 - #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The 9 first cell specifies the per-chip index of the PWM to use and the second 14 pwm: pwm@7000a000 { 15 compatible = "nvidia,tegra20-pwm"; 17 #pwm-cells = <2>;
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/ |
| H A D | mxs-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mxs-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale MXS PWM controller 10 - Shawn Guo <shawnguo@kernel.org> 11 - Anson Huang <anson.huang@nxp.com> 16 - fsl,imx23-pwm 21 "#pwm-cells": 24 fsl,pwm-number: [all …]
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| H A D | pwm-st.txt | 1 STMicroelectronics PWM driver bindings 2 -------------------------------------- 5 - compatible : "st,pwm" 6 - #pwm-cells : Number of cells used to specify a PWM. First cell 7 specifies the per-chip index of the PWM to use and the 8 second cell is the period in nanoseconds - fixed to 2 10 - reg : Physical base address and length of the controller's 12 - pinctrl-names: Set to "default". 13 - pinctrl-0: List of phandles pointing to pin configuration nodes 14 for PWM module. [all …]
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| H A D | pwm.txt | 1 Specifying PWM information for devices 4 1) PWM user nodes 5 ----------------- 7 PWM users should specify a list of PWM devices that they want to use 8 with a property containing a 'pwm-list': 10 pwm-list ::= <single-pwm> [pwm-list] 11 single-pwm ::= <pwm-phandle> <pwm-specifier> 12 pwm-phandle : phandle to PWM controller node 13 pwm-specifier : array of #pwm-cells specifying the given PWM 16 PWM properties should be named "pwms". The exact meaning of each pwms [all …]
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| H A D | pwm.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pwm/pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: PWM controllers (providers) 10 - Thierry Reding <thierry.reding@gmail.com> 14 pattern: "^pwm(@.*|-[0-9a-f])*$" 16 "#pwm-cells": 18 Number of cells in a PWM specifier. 21 - "#pwm-cells" [all …]
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| H A D | pwm-lp3943.txt | 1 TI/National Semiconductor LP3943 PWM controller 4 - compatible: "ti,lp3943-pwm" 5 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a 9 - ti,pwm0 or ti,pwm1: Output pin number(s) for PWM channel 0 or 1. 17 PWM 0 is for RGB LED brightness control 18 PWM 1 is for brightness control of LP8557 backlight device 26 * PWM 0 : output 8, 9 and 10 27 * PWM 1 : output 15 29 pwm3943: pwm { 30 compatible = "ti,lp3943-pwm"; [all …]
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| /OK3568_Linux_fs/kernel/drivers/video/backlight/ |
| H A D | pwm_bl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Simple PWM based backlight control, board code has to setup 4 * 1) pin configuration so PWM waveforms can output 17 #include <linux/pwm.h> 25 "pwm bl quiescent when reboot quiescent [default=false]"); 28 struct pwm_device *pwm; member 52 pwm_get_state(pb->pwm, &state); in pwm_backlight_power_on() 53 if (pb->enabled) in pwm_backlight_power_on() 56 err = regulator_enable(pb->power_supply); in pwm_backlight_power_on() 58 dev_err(pb->dev, "failed to enable power supply\n"); in pwm_backlight_power_on() [all …]
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| /OK3568_Linux_fs/kernel/Documentation/driver-api/ |
| H A D | pwm.rst | 2 Pulse Width Modulation (PWM) interface 5 This provides an overview about the Linux PWM interface 9 the Linux PWM API (although they could). However, PWMs are often 12 this kind of flexibility the generic PWM API exists. 15 ---------------- 17 Users of the legacy PWM API use unique IDs to refer to PWM devices. 19 Instead of referring to a PWM device via its unique ID, board setup code 20 should instead register a static mapping that can be used to match PWM 24 PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL, 36 ---------- [all …]
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| /OK3568_Linux_fs/kernel/Documentation/ABI/testing/ |
| H A D | sysfs-class-pwm | 1 What: /sys/class/pwm/ 6 The pwm/ class sub-directory belongs to the Generic PWM 7 Framework and provides a sysfs interface for using PWM 10 What: /sys/class/pwm/pwmchipN/ 15 A /sys/class/pwm/pwmchipN directory is created for each 16 probed PWM controller/chip where N is the base of the 17 PWM chip. 19 What: /sys/class/pwm/pwmchipN/npwm 24 The number of PWM channels supported by the PWM chip. 26 What: /sys/class/pwm/pwmchipN/export [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/hwmon/ |
| H A D | npcm750-pwm-fan.txt | 1 Nuvoton NPCM7xx PWM and Fan Tacho controller device 3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM) 6 Required properties for pwm-fan node 7 - #address-cells : should be 1. 8 - #size-cells : should be 0. 9 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX. 10 - reg : specifies physical base address and size of the registers. 11 - reg-names : must contain: 12 * "pwm" for the PWM registers. 14 - clocks : phandle of reference clocks. [all …]
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| H A D | aspeed-pwm-tacho.txt | 1 ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver 3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho 6 There can be upto 8 fans supported. Each fan can have one PWM output and 9 Required properties for pwm-tacho node: 10 - #address-cells : should be 1. 12 - #size-cells : should be 1. 14 - #cooling-cells: should be 2. 16 - reg : address and length of the register set for the device. 18 - pinctrl-names : a pinctrl state named "default" must be defined. 20 - pinctrl-0 : phandle referencing pin configuration of the PWM ports. [all …]
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| /OK3568_Linux_fs/kernel/Documentation/hwmon/ |
| H A D | sysfs-interface.rst | 5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is 6 completely chip-independent. It assumes that all the kernel drivers 10 This is a major improvement compared to lm-sensors 2. 22 For this reason, even if we aim at a chip-independent libsensors, it will 37 Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes 38 in the "physical" device directory. Since lm-sensors 3.0.1, attributes found 47 The common scheme for files naming is: <type><number>_<item>. Usual 52 this). A number is always used for elements that can be present more 55 they have a simple name, and no number. 61 to cause an alarm) is chip-dependent. [all …]
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| H A D | f71882fg.rst | 103 This is the 64-pin variant of the F71889FG, they have the 119 ----------- 125 These chips also have fan controlling features, using either DC or PWM, in 133 ---------- 136 interface as documented in sysfs-interface, without any exceptions. 140 ----------- 142 Both PWM (pulse-width modulation) and DC fan speed control methods are 149 vica versa. So the temperature zone trip points 1-4 (or 1-2) go from high temp 153 There are 2 modes to specify the speed of the fan, PWM duty cycle (or DC 154 voltage) mode, where 0-100% duty cycle (0-100% of 12V) is specified. And RPM [all …]
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| H A D | dme1737.rst | 18 Addresses scanned: none, address read from Super-I/O config space 34 Addresses scanned: none, address read from Super-I/O config space 43 ----------------- 47 and PWM output control functions. Using this parameter 52 Include non-standard LPC addresses 0x162e and 0x164e 55 - VIA EPIA SN18000 59 ----------- 63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors 64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and 65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/ |
| H A D | gpio-mvebu.txt | 5 - compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio", 6 "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio". 8 "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove, 9 Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio" 12 "marvel,armadaxp-gpio" should be used for all Armada XP SoCs 15 "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K 17 Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt 20 - reg: Address and length of the register set for the device. Only one 21 entry is expected, except for the "marvell,armadaxp-gpio" variant 23 one for the per-cpu registers. Not used for marvell,armada-8k-gpio. [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | pptable_v1_0.h | 45 …* To keep the number of these types low we should also use the same code for all ASICs (i.e. do no… 166 UCHAR ucNumEntries; /* Number of entries. */ 181 UCHAR ucNumEntries; /* Number of entries. */ 196 UCHAR ucNumEntries; /* Number of entries. */ 212 UCHAR ucNumEntries; /* Number of entries. */ 224 UCHAR ucNumEntries; /* Number of entries. */ 237 UCHAR ucNumEntries; /* Number of entries. */ 245 ULONG ulDClk; /* UVD D-clock */ 246 ULONG ulVClk; /* UVD V-clock */ 254 UCHAR ucNumEntries; /* Number of entries. */ [all …]
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| /OK3568_Linux_fs/kernel/include/linux/mfd/ |
| H A D | lp8788.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 15 #include <linux/pwm.h> 18 #define LP8788_DEV_BUCK "lp8788-buck" 19 #define LP8788_DEV_DLDO "lp8788-dldo" 20 #define LP8788_DEV_ALDO "lp8788-aldo" 21 #define LP8788_DEV_CHARGER "lp8788-charger" 22 #define LP8788_DEV_RTC "lp8788-rtc" 23 #define LP8788_DEV_BACKLIGHT "lp8788-backlight" 24 #define LP8788_DEV_VIBRATOR "lp8788-vibrator" 25 #define LP8788_DEV_KEYLED "lp8788-keyled" [all …]
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| /OK3568_Linux_fs/kernel/drivers/pwm/ |
| H A D | pwm-mxs.c | 1 // SPDX-License-Identifier: GPL-2.0+ 13 #include <linux/pwm.h> 47 static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, in mxs_pwm_apply() argument 58 * If the PWM channel is disabled, make sure to turn on the in mxs_pwm_apply() 62 if (!pwm_is_enabled(pwm)) { in mxs_pwm_apply() 63 ret = clk_prepare_enable(mxs->clk); in mxs_pwm_apply() 68 if (!state->enabled && pwm_is_enabled(pwm)) in mxs_pwm_apply() 69 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); in mxs_pwm_apply() 71 rate = clk_get_rate(mxs->clk); in mxs_pwm_apply() 74 c = c * state->period; in mxs_pwm_apply() [all …]
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| H A D | pwm-cros-ec.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Expose a PWM controlled by the ChromeOS EC to the host processor. 12 #include <linux/pwm.h> 16 * struct cros_ec_pwm_device - Driver data for EC PWM 20 * @chip: PWM controller chip 29 * struct cros_ec_pwm - per-PWM driver data 41 static int cros_ec_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) in cros_ec_pwm_request() argument 47 return -ENOMEM; in cros_ec_pwm_request() 49 pwm_set_chip_data(pwm, channel); in cros_ec_pwm_request() 54 static void cros_ec_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) in cros_ec_pwm_free() argument [all …]
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| /OK3568_Linux_fs/kernel/include/linux/ |
| H A D | pwm.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 16 * enum pwm_polarity - polarity of a PWM signal 17 * @PWM_POLARITY_NORMAL: a high signal for the duration of the duty- 20 * @PWM_POLARITY_INVERSED: a low signal for the duration of the duty- 30 * struct pwm_args - board-dependent PWM arguments 34 * This structure describes board-dependent arguments attached to a PWM 35 * device. These arguments are usually retrieved from the PWM lookup table or 38 * Do not confuse this with the PWM state: PWM arguments represent the initial 39 * configuration that users want to use on this PWM device rather than the 40 * current PWM hardware state. [all …]
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| /OK3568_Linux_fs/kernel/drivers/staging/greybus/ |
| H A D | pwm.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * PWM Greybus driver. 12 #include <linux/pwm.h> 19 u8 pwm_max; /* max pwm number */ 22 struct pwm_chip *pwm; member 33 ret = gb_operation_sync(pwmc->connection, GB_PWM_TYPE_PWM_COUNT, in gb_pwm_count_operation() 37 pwmc->pwm_max = response.count; in gb_pwm_count_operation() 48 if (which > pwmc->pwm_max) in gb_pwm_activate_operation() 49 return -EINVAL; in gb_pwm_activate_operation() 53 gbphy_dev = to_gbphy_dev(pwmc->chip.dev); in gb_pwm_activate_operation() [all …]
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| /OK3568_Linux_fs/u-boot/arch/sandbox/include/asm/ |
| H A D | test.h | 2 * Test-related constants for sandbox 6 * SPDX-License-Identifier: GPL-2.0+ 31 * sandbox_i2c_set_test_mode() - set test mode for running unit tests 55 * offset: number of milliseconds to advance the system time 60 * sandbox_i2c_rtc_set_offset() - set the time offset from system/base time 64 * @offset: RTC offset from current system/base time (-1 for no 72 * sandbox_i2c_rtc_get_set_base_time() - get and set the base time 75 * @base_time: New base system time (set to -1 for no change) 83 * sandbox_osd_get_mem() - get the internal memory of a sandbox OSD 92 * sandbox_pwm_get_config() - get the PWM config for a channel [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pinctrl-mt7622.txt | 4 - compatible: Should be one of the following 5 "mediatek,mt7622-pinctrl" for MT7622 SoC 6 "mediatek,mt7629-pinctrl" for MT7629 SoC 7 - reg: offset and length of the pinctrl space 9 - gpio-controller: Marks the device node as a GPIO controller. 10 - #gpio-cells: Should be two. The first cell is the pin number and the 14 - interrupt-controller : Marks the device node as an interrupt controller 16 If the property interrupt-controller is defined, following property is required 17 - reg-names: A string describing the "reg" entries. Must contain "eint". 18 - interrupts : The interrupt output from the controller. [all …]
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| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/video/ |
| H A D | tegra20-dc.txt | 2 ------------------ 5 U-Boot, and may change based on Linux activity) 12 - compatible : Should be "nvidia,tegra20-dc" 17 - nvidia,panel : phandle of LCD panel information 24 - nvidia,bits-per-pixel: number of bits per pixel (depth) 25 - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt) 26 - nvidia,panel-timings: 4 cells containing required timings in ms: 28 * delay between panel_vdd-rise and data-rise 29 * delay between data-rise and backlight_vdd-rise 30 * delay between backlight_vdd and pwm-rise [all …]
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