bindings/pinctrl/pinctrl-mt7622.txt

4  - compatible: Should be one of the following
5 	       "mediatek,mt7622-pinctrl" for MT7622 SoC
6 	       "mediatek,mt7629-pinctrl" for MT7629 SoC
7  - reg: offset and length of the pinctrl space
9  - gpio-controller: Marks the device node as a GPIO controller.
10  - #gpio-cells: Should be two. The first cell is the pin number and the
14 - interrupt-controller  : Marks the device node as an interrupt controller
16 If the property interrupt-controller is defined, following property is required
17 - reg-names: A string describing the "reg" entries. Must contain "eint".
18 - interrupts : The interrupt output from the controller.
19 - #interrupt-cells: Should be two.
21 Please refer to pinctrl-bindings.txt in this directory for details of the
25 MT7622 pin configuration nodes act as a container for an arbitrary number of
29 parameters, such as pull-up, slew rate, etc.
40 The following generic properties as defined in pinctrl-bindings.txt are valid
44  - groups: An array of strings. Each string contains the name of a group.
46  - function: A string containing the name of the function to mux to the
51 The following generic properties as defined in pinctrl-bindings.txt are valid
55  - pins: An array of strings. Each string contains the name of a pin.
57  - groups: An array of strings. Each string contains the name of a group.
61  bias-disable, bias-pull, bias-pull-down, input-enable,
62  input-schmitt-enable, input-schmitt-disable, output-enable
63  output-low, output-high, drive-strength, slew-rate
65  Valid arguments for 'slew-rate' are '0' for no slew rate controlled and '1' for
67  Valid arguments for 'drive-strength', 4, 8, 12, or 16 in mA.
73  - mediatek,tdsel: An integer describing the steps for output level shifter duty
76  - mediatek,rdsel: An integer describing the steps for input level shifter duty
84 related physical number is also put ahead of those names which helps cross
89 	-----------------------------
196 	"pmic", "pwm", "sd", "spi", "tdm", "uart", "watchdog"
204 	-------------------------------------------------------------------------
267 	"pwm_ch1_0"			"pwm"		51
268 	"pwm_ch1_1"			"pwm"		73
269 	"pwm_ch1_2"			"pwm"		95
270 	"pwm_ch2_0"			"pwm"		52
271 	"pwm_ch2_1"			"pwm"		74
272 	"pwm_ch2_2"			"pwm"		96
273 	"pwm_ch3_0"			"pwm"		53
274 	"pwm_ch3_1"			"pwm"		75
275 	"pwm_ch3_2"			"pwm"		97
276 	"pwm_ch4_0"			"pwm"		54
277 	"pwm_ch4_1"			"pwm"		67
278 	"pwm_ch4_2"			"pwm"		76
279 	"pwm_ch4_3"			"pwm"		98
280 	"pwm_ch5_0"			"pwm"		68
281 	"pwm_ch5_1"			"pwm"		77
282 	"pwm_ch5_2"			"pwm"		99
283 	"pwm_ch6_0"			"pwm"		69
284 	"pwm_ch6_1"			"pwm"		78
285 	"pwm_ch6_2"			"pwm"		81
286 	"pwm_ch6_3"			"pwm"		100
287 	"pwm_ch7_0"			"pwm"		70
288 	"pwm_ch7_1"			"pwm"		82
289 	"pwm_ch7_2"			"pwm"		101
332 	-----------------------------
414 	"eth", "i2c", "led", "flash", "pcie", "pwm", "spi", "uart",
419 	----------------------------------------------------------------
437 	"pwm_0"				"pwm"		52
438 	"pwm_1"				"pwm"		61
461 		compatible = "mediatek,mt7622-pinctrl";
463 		gpio-controller;
464 		#gpio-cells = <2>;
466 		pinctrl_eth_default: eth-default {
467 			mux-mdio {
470 				drive-strength = <12>;
473 			mux-gmac2 {
476 				drive-strength = <12>;
479 			mux-esw {
482 				drive-strength = <8>;
485 			conf-mdio {
487 				bias-pull-up;