1*4882a593SmuzhiyunTegra SoC PWFM controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: should be one of: 5*4882a593Smuzhiyun - "nvidia,tegra20-pwm" 6*4882a593Smuzhiyun - "nvidia,tegra30-pwm" 7*4882a593Smuzhiyun- reg: physical base address and length of the controller's registers 8*4882a593Smuzhiyun- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The 9*4882a593Smuzhiyun first cell specifies the per-chip index of the PWM to use and the second 10*4882a593Smuzhiyun cell is the period in nanoseconds. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunExample: 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun pwm: pwm@7000a000 { 15*4882a593Smuzhiyun compatible = "nvidia,tegra20-pwm"; 16*4882a593Smuzhiyun reg = <0x7000a000 0x100>; 17*4882a593Smuzhiyun #pwm-cells = <2>; 18*4882a593Smuzhiyun }; 19