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/OK3568_Linux_fs/kernel/drivers/pinctrl/sunxi/
H A Dpinctrl-sunxi.h6 * Maxime Ripard <maxime.ripard@free-electrons.com>
32 #define SUNXI_PINCTRL_PIN(bank, pin) \ argument
33 PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin)
62 #define IRQ_CFG_IRQ_MASK ((1 << IRQ_CFG_IRQ_BITS) - 1)
66 #define IRQ_CTRL_IRQ_MASK ((1 << IRQ_CTRL_IRQ_BITS) - 1)
70 #define IRQ_STATUS_IRQ_MASK ((1 << IRQ_STATUS_IRQ_BITS) - 1)
125 struct pinctrl_pin_desc pin; member
149 unsigned pin; member
177 .pin = _pin, \
184 .pin = _pin, \
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rza1-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/A1 combined Pin and GPIO controller
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis
17 writing configuration values to per-port register sets.
[all …]
H A Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
H A Dbrcm,bcm2835-gpio.txt7 - compatible: "brcm,bcm2835-gpio"
8 - compatible: should be one of:
9 "brcm,bcm2835-gpio" - BCM2835 compatible pinctrl
10 "brcm,bcm7211-gpio" - BCM7211 compatible pinctrl
11 "brcm,bcm2711-gpio" - BCM2711 compatible pinctrl
12 "brcm,bcm7211-gpio" - BCM7211 compatible pinctrl
13 - reg: Should contain the physical address of the GPIO module's registers.
14 - gpio-controller: Marks the device node as a GPIO controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and the
17 - bit 0 specifies polarity (0 for normal, 1 for inverted)
[all …]
H A Dpinctrl-st.txt1 *ST pin controller.
3 Each multi-function pin is controlled, driven and routed through the
4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
6 the pin to different hardware blocks.
8 When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and
12 gpio driver to configure a pin.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/
H A Dpinctrl-coh901.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2012 ST-Ericsson AB
6 * COH 901 571/3 - Used in DB3210 (U365 2.0) and DB3350 (U335 1.0)
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include "pinctrl-coh901.h"
27 * bit 15-9 (mask 0x0000FE00) contains the number of cores. 8*cores
29 * bit 8-2 (mask 0x000001FC) contains the core version ID.
56 /* 8 bits per port, no version has more than 7 ports */
80 u32 per; member
89 * its context. It calculates the port offset from the given pin
[all …]
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Core private header for the pin control subsystem
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
13 #include <linux/radix-tree.h>
20 * struct pinctrl_dev - pin control class device
21 * @node: node to include this pin controller in the global pin controller list
22 * @desc: the pin controller descriptor supplied when initializing this pin
24 * @pin_desc_tree: each pin descriptor for this pin controller is stored in
26 * @pin_group_tree: optionally each pin group can be stored in this radix tree
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/i2c/
H A Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/intel/
H A Dpinctrl-intel.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
32 * @modes: If not %NULL this will hold mode for each pin in @pins
43 * struct intel_function - Description about a function
55 * struct intel_padgroup - Hardware pad group information
57 * @base: Starting pin of this group
74 * enum - Special treatment for GPIO base in pad group
78 * @INTEL_GPIO_BASE_MATCH: matches with starting pin number
81 INTEL_GPIO_BASE_ZERO = -2,
82 INTEL_GPIO_BASE_NOMAP = -1,
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/sound/
H A Dsnd_sst_tokens.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * snd_sst_tokens.h - Intel SST tokens definition
27 * %SKL_TKN_U8_IN_PIN_TYPE: Input pin type,
30 * %SKL_TKN_U8_OUT_PIN_TYPE: Output pin type,
32 * %SKL_TKN_U8_DYN_IN_PIN: Configure Input pin dynamically
35 * %SKL_TKN_U8_DYN_OUT_PIN: Configure Output pin dynamically
75 * %SKL_TKN_U16_PIN_INST_ID: Stores the pin instance id
106 * formats and the pin count.
109 * the pin count value.
128 * %SKL_TKN_U32_FMT_INTERLEAVE: Interleaving style which can be per
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/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/sound/
H A Dsnd_sst_tokens.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * snd_sst_tokens.h - Intel SST tokens definition
27 * %SKL_TKN_U8_IN_PIN_TYPE: Input pin type,
30 * %SKL_TKN_U8_OUT_PIN_TYPE: Output pin type,
32 * %SKL_TKN_U8_DYN_IN_PIN: Configure Input pin dynamically
35 * %SKL_TKN_U8_DYN_OUT_PIN: Configure Output pin dynamically
75 * %SKL_TKN_U16_PIN_INST_ID: Stores the pin instance id
106 * formats and the pin count.
109 * the pin count value.
128 * %SKL_TKN_U32_FMT_INTERLEAVE: Interleaving style which can be per
[all …]
/OK3568_Linux_fs/kernel/include/uapi/sound/
H A Dsnd_sst_tokens.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * snd_sst_tokens.h - Intel SST tokens definition
27 * %SKL_TKN_U8_IN_PIN_TYPE: Input pin type,
30 * %SKL_TKN_U8_OUT_PIN_TYPE: Output pin type,
32 * %SKL_TKN_U8_DYN_IN_PIN: Configure Input pin dynamically
35 * %SKL_TKN_U8_DYN_OUT_PIN: Configure Output pin dynamically
75 * %SKL_TKN_U16_PIN_INST_ID: Stores the pin instance id
106 * formats and the pin count.
109 * the pin count value.
128 * %SKL_TKN_U32_FMT_INTERLEAVE: Interleaving style which can be per
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/zte/
H A Dpinctrl-zx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * struct zx_mux_desc - hardware mux descriptor
21 * struct zx_pin_data - hardware per-pin data
22 * @aon_pin: whether it's an AON pin
31 * arbitrarily, AON pinmux register bits are well organized per pin id, and
32 * each pin occupies two bits, so that we can calculate the AON register offset
33 * and bit position from pin id. Thus, we only need to define TOP pinmux and
34 * AON pinconf register data for the pin.
51 #define TOP_PIN(pin, off, bp, wd, coff, cbp, ...) { \ argument
52 .number = pin, \
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/
H A Dadi,adv7511.txt2 ------------------------------------------------
11 - compatible: Should be one of:
18 - reg: I2C slave addresses
32 - adi,input-depth: Number of bits per color component at the input (8, 10 or
34 - adi,input-colorspace: The input color space, one of "rgb", "yuv422" or
36 - adi,input-clock: The input clock type, one of "1x" (one clock cycle per
37 pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
43 - adi,input-style: The input components arrangement variant (1, 2 or 3), as
45 - adi,input-justification: The input bit justification ("left", "evenly",
48 - avdd-supply: A 1.8V supply that powers up the AVDD pin on the chip.
[all …]
/OK3568_Linux_fs/kernel/include/linux/pinctrl/
H A Dpinconf.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
20 * struct pinconf_ops - pin config operations, to be implemented by
21 * pin configuration capable drivers.
22 * @is_generic: for pin controllers that want to use the generic interface,
24 * @pin_config_get: get the config of a certain pin, if the requested config
25 * is not available on this controller this should return -ENOTSUPP
26 * and if it is available but disabled it should return -EINVAL
27 * @pin_config_set: configure an individual pin
[all …]
H A Dpinctrl.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
14 #include <linux/radix-tree.h>
17 #include <linux/pinctrl/pinctrl-state.h>
30 * struct pinctrl_pin_desc - boards/machines provide information on their
32 * @number: unique pin number from the global pin number space
33 * @name: a name for this pin
34 * @drv_data: driver-defined per-pin data. pinctrl core does not touch this
42 /* Convenience macro to define a single named or anonymous pin descriptor */
[all …]
/OK3568_Linux_fs/u-boot/drivers/gpio/
H A Dat91_gpio.c8 * SPDX-License-Identifier: GPL-2.0+
53 writel(mask, &at91_port->puer); in at91_set_port_pullup()
55 writel(mask, &at91_port->pudr); in at91_set_port_pullup()
56 writel(mask, &at91_port->per); in at91_set_port_pullup()
59 int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup) in at91_set_pio_pullup() argument
63 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_pullup()
64 at91_set_port_pullup(at91_port, pin, use_pullup); in at91_set_pio_pullup()
70 * mux the pin to the "GPIO" peripheral role.
72 int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup) in at91_set_pio_periph() argument
77 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_pio_periph()
[all …]
H A Dadi_gpio2.c5 * Copyright 2008-2013 Analog Devices Inc.
7 * Licensed under the GPL-2 or later
30 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0; in set_label()
42 printf("adi_gpio2: please provide none-null label\n"); in cmp_label()
47 return -EINVAL; in cmp_label()
65 return -EINVAL; in check_gpio()
68 return -EINVAL; in check_gpio()
76 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); in port_setup()
78 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio); in port_setup()
81 gpio_array[gpio_bank(gpio)]->port_fer_clear = gpio_bit(gpio); in port_setup()
[all …]
H A Dmpc83xx_gpio.c4 * SPDX-License-Identifier: GPL-2.0+
40 return -1; in gpio_request()
51 /* set GPIO pin 'gpio' as an input */
59 /* 32-bits per controller */ in gpio_direction_input()
64 line_mask = 1 << (31 - line); in gpio_direction_input()
66 clrbits_be32(&im->gpio[ctrlr].dir, line_mask); in gpio_direction_input()
71 /* set GPIO pin 'gpio' as an output, with polarity 'value' */
81 return -1; in gpio_direction_output()
86 /* 32-bits per controller */ in gpio_direction_output()
91 line_mask = 1 << (31 - line); in gpio_direction_output()
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/meson/
H A Dpinctrl-meson.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Pin controller and GPIO driver for Amlogic Meson SoCs
18 * struct meson_pmx_group - a pinmux group
36 * struct meson_pmx_func - a pinmux function
49 * struct meson_reg_desc - a register descriptor
55 * pull-enable, direction, etc. for a single pin
63 * enum meson_reg_type - type of registers encoded in @meson_reg_desc
76 * enum meson_pinconf_drv - value of drive-strength supported
89 * @first: first pin of the bank
90 * @last: last pin of the bank
[all …]
/OK3568_Linux_fs/kernel/drivers/auxdisplay/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 # see Documentation/kbuild/kconfig-language.rst.
41 and built-in as well (Y).
96 If you have a Crystalfontz 128x64 2-color LCD, cfag12864b Series,
100 check Documentation/admin-guide/auxdisplay/cfag12864b.rst
172 Say Y here if you have an HD44780 or KS-0074 LCD connected to your
173 parallel port. This driver also features 4 and 6-key keypads. The LCD
193 int "Default panel profile (0-5, 0=custom)"
204 2 = 2x16 serial LCD (KS-0074), new keypad
224 2 : new 6 keys keypad, as used on the server at www.ant-computing.com
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/
H A Dgpio-samsung.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
11 // Samsung - GPIOlib support
31 #include "regs-gpio.h"
32 #include "gpio-samsung.h"
35 #include "gpio-core.h"
36 #include "gpio-cfg.h"
37 #include "gpio-cfg-helpers.h"
43 void __iomem *reg = chip->base + 0x08; in samsung_gpio_setpull_updown()
58 void __iomem *reg = chip->base + 0x08; in samsung_gpio_getpull_updown()
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/
H A DKconfig13 to display a command-line console or splash screen. Enabling this
23 to display a command-line console or splash screen. Enabling this
39 This driver can be use with "simple-panel" and
41 (leds/backlight/pwm-backlight.txt)
49 This driver can be used with "simple-panel" and
51 (leds/backlight/gpio-backlight.txt)
54 bool "Support 8-bit-per-pixel displays"
58 Support drawing text and bitmaps onto a 8-bit-per-pixel display.
64 bool "Support 16-bit-per-pixel displays"
68 Support drawing text and bitmaps onto a 16-bit-per-pixel display.
[all …]
/OK3568_Linux_fs/u-boot/drivers/pinctrl/meson/
H A Dpinctrl-meson.h2 * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
46 * struct meson_reg_desc - a register descriptor
52 * pull-enable, direction, etc. for a single pin
60 * enum meson_reg_type - type of registers encoded in @meson_reg_desc
75 * @first: first pin of the bank
76 * @last: last pin of the bank
82 * the @regs array refers to the first pin of the bank.
91 #define PIN(x, b) (b + x) macro
105 .pins = (const unsigned int[]){ PIN(gpio, b) }, \
[all …]
/OK3568_Linux_fs/kernel/include/linux/
H A Dptp_clock_kernel.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 * struct ptp_system_timestamp - system time corresponding to a PHC timestamp
39 * struct ptp_clock_info - describes a PTP hardware clock
45 * @max_adj: The maximum possible frequency adjustment, in parts per billon.
59 * nominal frequency in parts per million, but with a
66 * in parts per billion
99 * @verify: Confirm that a pin can perform a given function. The PTP
102 * assumes that every pin can perform every function. This
105 * zero if the function can be assigned to this pin, and
107 * parameter pin: index of the pin in question.
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