Lines Matching +full:per +full:- +full:pin

1 /* SPDX-License-Identifier: GPL-2.0-only */
11  * struct zx_mux_desc - hardware mux descriptor
21  * struct zx_pin_data - hardware per-pin data
22  * @aon_pin: whether it's an AON pin
31  * arbitrarily, AON pinmux register bits are well organized per pin id, and
32  * each pin occupies two bits, so that we can calculate the AON register offset
33  * and bit position from pin id.  Thus, we only need to define TOP pinmux and
34  * AON pinconf register data for the pin.
51 #define TOP_PIN(pin, off, bp, wd, coff, cbp, ...) {		\  argument
52 	.number = pin,						\
53 	.name = #pin,						\
66 #define AON_PIN(pin, off, bp, wd, coff, cbp, ...) {		\  argument
67 	.number = pin,						\
68 	.name = #pin,						\
81 #define ZX_RESERVED(pin) PINCTRL_PIN(pin, #pin)  argument
89  * When the flag is set, it's a mux configuration for an AON pin that sits in
90  * AON register.  Otherwise, it's one for AON pin but sitting in TOP register.