1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __PINCTRL_MESON_H__ 8*4882a593Smuzhiyun #define __PINCTRL_MESON_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun struct meson_pmx_group { 13*4882a593Smuzhiyun const char *name; 14*4882a593Smuzhiyun const unsigned int *pins; 15*4882a593Smuzhiyun unsigned int num_pins; 16*4882a593Smuzhiyun bool is_gpio; 17*4882a593Smuzhiyun unsigned int reg; 18*4882a593Smuzhiyun unsigned int bit; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun struct meson_pmx_func { 22*4882a593Smuzhiyun const char *name; 23*4882a593Smuzhiyun const char * const *groups; 24*4882a593Smuzhiyun unsigned int num_groups; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun struct meson_pinctrl_data { 28*4882a593Smuzhiyun const char *name; 29*4882a593Smuzhiyun struct meson_pmx_group *groups; 30*4882a593Smuzhiyun struct meson_pmx_func *funcs; 31*4882a593Smuzhiyun struct meson_bank *banks; 32*4882a593Smuzhiyun unsigned int pin_base; 33*4882a593Smuzhiyun unsigned int num_pins; 34*4882a593Smuzhiyun unsigned int num_groups; 35*4882a593Smuzhiyun unsigned int num_funcs; 36*4882a593Smuzhiyun unsigned int num_banks; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun struct meson_pinctrl { 40*4882a593Smuzhiyun struct meson_pinctrl_data *data; 41*4882a593Smuzhiyun void __iomem *reg_mux; 42*4882a593Smuzhiyun void __iomem *reg_gpio; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /** 46*4882a593Smuzhiyun * struct meson_reg_desc - a register descriptor 47*4882a593Smuzhiyun * 48*4882a593Smuzhiyun * @reg: register offset in the regmap 49*4882a593Smuzhiyun * @bit: bit index in register 50*4882a593Smuzhiyun * 51*4882a593Smuzhiyun * The structure describes the information needed to control pull, 52*4882a593Smuzhiyun * pull-enable, direction, etc. for a single pin 53*4882a593Smuzhiyun */ 54*4882a593Smuzhiyun struct meson_reg_desc { 55*4882a593Smuzhiyun unsigned int reg; 56*4882a593Smuzhiyun unsigned int bit; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /** 60*4882a593Smuzhiyun * enum meson_reg_type - type of registers encoded in @meson_reg_desc 61*4882a593Smuzhiyun */ 62*4882a593Smuzhiyun enum meson_reg_type { 63*4882a593Smuzhiyun REG_PULLEN, 64*4882a593Smuzhiyun REG_PULL, 65*4882a593Smuzhiyun REG_DIR, 66*4882a593Smuzhiyun REG_OUT, 67*4882a593Smuzhiyun REG_IN, 68*4882a593Smuzhiyun NUM_REG, 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /** 72*4882a593Smuzhiyun * struct meson bank 73*4882a593Smuzhiyun * 74*4882a593Smuzhiyun * @name: bank name 75*4882a593Smuzhiyun * @first: first pin of the bank 76*4882a593Smuzhiyun * @last: last pin of the bank 77*4882a593Smuzhiyun * @regs: array of register descriptors 78*4882a593Smuzhiyun * 79*4882a593Smuzhiyun * A bank represents a set of pins controlled by a contiguous set of 80*4882a593Smuzhiyun * bits in the domain registers. The structure specifies which bits in 81*4882a593Smuzhiyun * the regmap control the different functionalities. Each member of 82*4882a593Smuzhiyun * the @regs array refers to the first pin of the bank. 83*4882a593Smuzhiyun */ 84*4882a593Smuzhiyun struct meson_bank { 85*4882a593Smuzhiyun const char *name; 86*4882a593Smuzhiyun unsigned int first; 87*4882a593Smuzhiyun unsigned int last; 88*4882a593Smuzhiyun struct meson_reg_desc regs[NUM_REG]; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #define PIN(x, b) (b + x) 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define GROUP(grp, r, b) \ 94*4882a593Smuzhiyun { \ 95*4882a593Smuzhiyun .name = #grp, \ 96*4882a593Smuzhiyun .pins = grp ## _pins, \ 97*4882a593Smuzhiyun .num_pins = ARRAY_SIZE(grp ## _pins), \ 98*4882a593Smuzhiyun .reg = r, \ 99*4882a593Smuzhiyun .bit = b, \ 100*4882a593Smuzhiyun } 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #define GPIO_GROUP(gpio, b) \ 103*4882a593Smuzhiyun { \ 104*4882a593Smuzhiyun .name = #gpio, \ 105*4882a593Smuzhiyun .pins = (const unsigned int[]){ PIN(gpio, b) }, \ 106*4882a593Smuzhiyun .num_pins = 1, \ 107*4882a593Smuzhiyun .is_gpio = true, \ 108*4882a593Smuzhiyun } 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define FUNCTION(fn) \ 111*4882a593Smuzhiyun { \ 112*4882a593Smuzhiyun .name = #fn, \ 113*4882a593Smuzhiyun .groups = fn ## _groups, \ 114*4882a593Smuzhiyun .num_groups = ARRAY_SIZE(fn ## _groups), \ 115*4882a593Smuzhiyun } 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #define BANK(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ 118*4882a593Smuzhiyun { \ 119*4882a593Smuzhiyun .name = n, \ 120*4882a593Smuzhiyun .first = f, \ 121*4882a593Smuzhiyun .last = l, \ 122*4882a593Smuzhiyun .regs = { \ 123*4882a593Smuzhiyun [REG_PULLEN] = { per, peb }, \ 124*4882a593Smuzhiyun [REG_PULL] = { pr, pb }, \ 125*4882a593Smuzhiyun [REG_DIR] = { dr, db }, \ 126*4882a593Smuzhiyun [REG_OUT] = { or, ob }, \ 127*4882a593Smuzhiyun [REG_IN] = { ir, ib }, \ 128*4882a593Smuzhiyun }, \ 129*4882a593Smuzhiyun } 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x) 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun extern const struct pinctrl_ops meson_pinctrl_ops; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun int meson_pinctrl_probe(struct udevice *dev); 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun #endif /* __PINCTRL_MESON_H__ */ 138