xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunAnalog Devices ADV7511(W)/13/33/35 HDMI Encoders
2*4882a593Smuzhiyun------------------------------------------------
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunThe ADV7511, ADV7511W, ADV7513, ADV7533 and ADV7535 are HDMI audio and video
5*4882a593Smuzhiyuntransmitters compatible with HDMI 1.4 and DVI 1.0. They support color space
6*4882a593Smuzhiyunconversion, S/PDIF, CEC and HDCP. ADV7533/5 supports the DSI interface for input
7*4882a593Smuzhiyunpixels, while the others support RGB interface.
8*4882a593Smuzhiyun
9*4882a593SmuzhiyunRequired properties:
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun- compatible: Should be one of:
12*4882a593Smuzhiyun		"adi,adv7511"
13*4882a593Smuzhiyun		"adi,adv7511w"
14*4882a593Smuzhiyun		"adi,adv7513"
15*4882a593Smuzhiyun		"adi,adv7533"
16*4882a593Smuzhiyun		"adi,adv7535"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun- reg: I2C slave addresses
19*4882a593Smuzhiyun  The ADV7511 internal registers are split into four pages exposed through
20*4882a593Smuzhiyun  different I2C addresses, creating four register maps. Each map has it own
21*4882a593Smuzhiyun  I2C address and acts as a standard slave device on the I2C bus. The main
22*4882a593Smuzhiyun  address is mandatory, others are optional and revert to defaults if not
23*4882a593Smuzhiyun  specified.
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun
26*4882a593SmuzhiyunThe ADV7511 supports a large number of input data formats that differ by their
27*4882a593Smuzhiyuncolor depth, color format, clock mode, bit justification and random
28*4882a593Smuzhiyunarrangement of components on the data bus. The combination of the following
29*4882a593Smuzhiyunproperties describe the input and map directly to the video input tables of the
30*4882a593SmuzhiyunADV7511 datasheet that document all the supported combinations.
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun- adi,input-depth: Number of bits per color component at the input (8, 10 or
33*4882a593Smuzhiyun  12).
34*4882a593Smuzhiyun- adi,input-colorspace: The input color space, one of "rgb", "yuv422" or
35*4882a593Smuzhiyun  "yuv444".
36*4882a593Smuzhiyun- adi,input-clock: The input clock type, one of "1x" (one clock cycle per
37*4882a593Smuzhiyun  pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
38*4882a593Smuzhiyun  data driven on both edges).
39*4882a593Smuzhiyun
40*4882a593SmuzhiyunThe following input format properties are required except in "rgb 1x" and
41*4882a593Smuzhiyun"yuv444 1x" modes, in which case they must not be specified.
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun- adi,input-style: The input components arrangement variant (1, 2 or 3), as
44*4882a593Smuzhiyun  listed in the input format tables in the datasheet.
45*4882a593Smuzhiyun- adi,input-justification: The input bit justification ("left", "evenly",
46*4882a593Smuzhiyun  "right").
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun- avdd-supply: A 1.8V supply that powers up the AVDD pin on the chip.
49*4882a593Smuzhiyun- dvdd-supply: A 1.8V supply that powers up the DVDD pin on the chip.
50*4882a593Smuzhiyun- pvdd-supply: A 1.8V supply that powers up the PVDD pin on the chip.
51*4882a593Smuzhiyun- dvdd-3v-supply: A 3.3V supply that powers up the pin called DVDD_3V
52*4882a593Smuzhiyun  on the chip.
53*4882a593Smuzhiyun- bgvdd-supply: A 1.8V supply that powers up the BGVDD pin. This is
54*4882a593Smuzhiyun  needed only for ADV7511.
55*4882a593Smuzhiyun
56*4882a593SmuzhiyunThe following properties are required for ADV7533 and ADV7535:
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun- adi,dsi-lanes: Number of DSI data lanes connected to the DSI host. It should
59*4882a593Smuzhiyun  be one of 1, 2, 3 or 4.
60*4882a593Smuzhiyun- a2vdd-supply: 1.8V supply that powers up the A2VDD pin on the chip.
61*4882a593Smuzhiyun- v3p3-supply: A 3.3V supply that powers up the V3P3 pin on the chip.
62*4882a593Smuzhiyun- v1p2-supply: A supply that powers up the V1P2 pin on the chip. It can be
63*4882a593Smuzhiyun  either 1.2V or 1.8V for ADV7533 but only 1.8V for ADV7535.
64*4882a593Smuzhiyun
65*4882a593SmuzhiyunOptional properties:
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun- interrupts: Specifier for the ADV7511 interrupt
68*4882a593Smuzhiyun- pd-gpios: Specifier for the GPIO connected to the power down signal
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun- adi,clock-delay: Video data clock delay relative to the pixel clock, in ps
71*4882a593Smuzhiyun  (-1200 ps .. 1600 ps). Defaults to no delay.
72*4882a593Smuzhiyun- adi,embedded-sync: The input uses synchronization signals embedded in the
73*4882a593Smuzhiyun  data stream (similar to BT.656). Defaults to separate H/V synchronization
74*4882a593Smuzhiyun  signals.
75*4882a593Smuzhiyun- adi,disable-timing-generator: Only for ADV7533 and ADV7535. Disables the
76*4882a593Smuzhiyun  internal timing generator. The chip will rely on the sync signals in the
77*4882a593Smuzhiyun  DSI data lanes, rather than generate its own timings for HDMI output.
78*4882a593Smuzhiyun- clocks: from common clock binding: reference to the CEC clock.
79*4882a593Smuzhiyun- clock-names: from common clock binding: must be "cec".
80*4882a593Smuzhiyun- reg-names : Names of maps with programmable addresses.
81*4882a593Smuzhiyun	It can contain any map needing a non-default address.
82*4882a593Smuzhiyun	Possible maps names are : "main", "edid", "cec", "packet"
83*4882a593Smuzhiyun
84*4882a593SmuzhiyunRequired nodes:
85*4882a593Smuzhiyun
86*4882a593SmuzhiyunThe ADV7511 has two video ports. Their connections are modelled using the OF
87*4882a593Smuzhiyungraph bindings specified in Documentation/devicetree/bindings/graph.txt.
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533/5, the
90*4882a593Smuzhiyun  remote endpoint phandle should be a reference to a valid mipi_dsi_host device
91*4882a593Smuzhiyun  node.
92*4882a593Smuzhiyun- Video port 1 for the HDMI output
93*4882a593Smuzhiyun- Audio port 2 for the HDMI audio input
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun
96*4882a593SmuzhiyunExample
97*4882a593Smuzhiyun-------
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun	adv7511w: hdmi@39 {
100*4882a593Smuzhiyun		compatible = "adi,adv7511w";
101*4882a593Smuzhiyun		/*
102*4882a593Smuzhiyun		 * The EDID page will be accessible on address 0x66 on the I2C
103*4882a593Smuzhiyun		 * bus. All other maps continue to use their default addresses.
104*4882a593Smuzhiyun		 */
105*4882a593Smuzhiyun		reg = <0x39>, <0x66>;
106*4882a593Smuzhiyun		reg-names = "main", "edid";
107*4882a593Smuzhiyun		interrupt-parent = <&gpio3>;
108*4882a593Smuzhiyun		interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
109*4882a593Smuzhiyun		clocks = <&cec_clock>;
110*4882a593Smuzhiyun		clock-names = "cec";
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		adi,input-depth = <8>;
113*4882a593Smuzhiyun		adi,input-colorspace = "rgb";
114*4882a593Smuzhiyun		adi,input-clock = "1x";
115*4882a593Smuzhiyun		adi,input-style = <1>;
116*4882a593Smuzhiyun		adi,input-justification = "evenly";
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		ports {
119*4882a593Smuzhiyun			#address-cells = <1>;
120*4882a593Smuzhiyun			#size-cells = <0>;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun			port@0 {
123*4882a593Smuzhiyun				reg = <0>;
124*4882a593Smuzhiyun				adv7511w_in: endpoint {
125*4882a593Smuzhiyun					remote-endpoint = <&dpi_out>;
126*4882a593Smuzhiyun				};
127*4882a593Smuzhiyun			};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun			port@1 {
130*4882a593Smuzhiyun				reg = <1>;
131*4882a593Smuzhiyun				adv7511_out: endpoint {
132*4882a593Smuzhiyun					remote-endpoint = <&hdmi_connector_in>;
133*4882a593Smuzhiyun				};
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun			port@2 {
137*4882a593Smuzhiyun				reg = <2>;
138*4882a593Smuzhiyun				codec_endpoint: endpoint {
139*4882a593Smuzhiyun					remote-endpoint = <&i2s0_cpu_endpoint>;
140*4882a593Smuzhiyun				};
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun		};
143*4882a593Smuzhiyun	};
144