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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
11 - Piotr Sroka <piotrs@cadence.com>
14 - $ref: mmc-controller.yaml
19 - enum:
20 - socionext,uniphier-sd4hc
21 - const: cdns,sd4hc
[all …]
H A Dbrcm,sdhci-brcmstb.txt3 This file documents differences between the core properties in mmc.txt
4 and the properties used by the sdhci-brcmstb driver.
11 - compatible: should be one of the following
12 - "brcm,bcm7425-sdhci"
13 - "brcm,bcm7445-sdhci"
14 - "brcm,bcm7216-sdhci"
16 Refer to clocks/clock-bindings.txt for generic clock consumer properties.
21 sd-uhs-sdr50;
22 sd-uhs-ddr50;
23 sd-uhs-sdr104;
[all …]
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Controller Generic Binding
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 These properties are common to multiple MMC host controllers. Any host
17 It is possible to assign a fixed index mmcN to an MMC host controller
23 pattern: "^mmc(@.*)?$"
25 "#address-cells":
[all …]
H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: TI AM654 MMC Controller
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
[all …]
H A Dmarvell,xenon-sdhci.txt2 This file documents differences between the core mmc properties
3 described by mmc.txt and the properties used by the Xenon implementation.
11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
17 - clocks:
22 - clock-names:
27 - reg:
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/sprd,sc9860-clk.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "simple-bus";
18 #address-cells = <2>;
19 #size-cells = <2>;
67 ap-apb {
68 compatible = "simple-bus";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/marvell/
H A Darmada-3720-espressobin-emmc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Romain Perier <romain.perier@free-electrons.com>
11 …* Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schemati…
14 /dts-v1/;
16 #include "armada-3720-espressobin.dtsi"
20 compatible = "globalscale,espressobin-emmc", "globalscale,espressobin",
26 non-removable;
27 bus-width = <8>;
28 mmc-ddr-1_8v;
29 mmc-hs400-1_8v;
[all …]
H A Darmada-3720-espressobin-v7-emmc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Romain Perier <romain.perier@free-electrons.com>
11 * Schematic available at http://wiki.espressobin.net/tiki-download_file.php?fileId=200
14 /dts-v1/;
16 #include "armada-3720-espressobin.dtsi"
20 compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7",
33 switch0port1: port@1 {
34 reg = <1>;
36 phy-handle = <&switch0phy0>;
42 phy-handle = <&switch0phy2>;
[all …]
H A Darmada-3720-uDPU.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include "armada-372x.dtsi"
22 stdout-path = "serial0:115200n8";
31 pinctrl-names = "default";
32 compatible = "gpio-leds";
65 sfp_eth0: sfp-eth0 {
67 i2c-bus = <&i2c0>;
[all …]
H A Darmada-3720-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F3720-DDR3)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
14 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
17 #include "armada-372x.dtsi"
20 model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
21 compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
24 stdout-path = "serial0:115200n8";
32 exp_usb3_vbus: usb3-vbus {
[all …]
/OK3568_Linux_fs/kernel/drivers/mmc/core/
H A Dhost.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/core/host.c
6 * Copyright (C) 2007-2008 Pierre Ossman
9 * MMC host class device management
23 #include <linux/mmc/host.h>
24 #include <linux/mmc/card.h>
25 #include <linux/mmc/slot-gpio.h>
30 #include "slot-gpio.h"
47 if (!host->bus_ops) in mmc_host_class_prepare()
51 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
26 stdout-path = "serial0:921600n8";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
34 compatible = "shared-dma-pool";
36 no-map;
46 pinctrl-names = "default";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399-nanopc-t4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * FriendlyElec NanoPC-T4 board device tree source
11 /dts-v1/;
12 #include "rk3399-nanopi4.dtsi"
15 model = "FriendlyElec NanoPC-T4";
16 compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399";
18 vcc12v0_sys: vcc12v0-sys {
19 compatible = "regulator-fixed";
20 regulator-always-on;
21 regulator-boot-on;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dsdm630-sony-xperia-nile.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/input/gpio-keys.h>
17 qcom,msm-id = <318 0>;
18 qcom,board-id = <8 1>;
19 qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00>;
21 /* This part enables graphical output via bootloader-enabled display */
25 #address-cells = <2>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2160a-cex7.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree file for LX2160A-CEx7
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "solidrun,lx2160a-cex7", "fsl,lx2160a";
19 sb_3v3: regulator-sb3v3 {
20 compatible = "regulator-fixed";
21 regulator-name = "RT7290";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
[all …]
H A Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
21 stdout-path = "serial0:115200n8";
24 sb_3v3: regulator-sb3v3 {
25 compatible = "regulator-fixed";
26 regulator-name = "MC34717-3.3VSB";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
[all …]
H A Dfsl-ls1028a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
12 #include "fsl-ls1028a.dtsi"
16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
25 stdout-path = "serial0:115200n8";
33 sys_mclk: clock-mclk {
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <25000000>;
39 reg_1p8v: regulator-1p8v {
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Darmada-3720-db.dts3 * (DB-88F3720-DDR3)
6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * This file is dual-licensed: you can use it either under the terms
47 /dts-v1/;
49 #include "armada-372x.dtsi"
52 model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
53 compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
56 stdout-path = "serial0:115200n8";
73 phy-type = <PHY_TYPE_PEX0>;
74 phy-speed = <PHY_SPEED_2_5G>;
[all …]
H A Drk3528-u-boot.dtsi4 * SPDX-License-Identifier: GPL-2.0+
14 stdout-path = &uart2;
15 u-boot,spl-boot-order = &sdmmc, &sdhci, &spi_nand, &spi_nor;
18 secure-otp@ffcd0000 {
19 compatible = "rockchip,rk3528-secure-otp";
24 u-boot,dm-spl;
31 u-boot,dm-spl;
36 u-boot,dm-spl;
41 /delete-property/ assigned-clocks;
42 /delete-property/ assigned-clock-rates;
[all …]
H A Drk3562-u-boot.dtsi4 * SPDX-License-Identifier: GPL-2.0+
14 stdout-path = &uart2;
15 u-boot,spl-boot-order = &sdmmc0, &sdhci, &spi_nand, &spi_nor;
18 secure-otp@ff920000 {
19 compatible = "rockchip,rk3562-secure-otp";
24 u-boot,dm-spl;
30 u-boot,dm-spl;
35 u-boot,dm-spl;
40 u-boot,dm-spl;
45 u-boot,dm-pre-reloc;
[all …]
H A Drk3588-u-boot.dtsi4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart2;
17 u-boot,spl-boot-order = &sdmmc, &sdhci, &spi_nand, &spi_nor;
20 secure-otp@fe3a0000 {
21 u-boot,dm-spl;
22 compatible = "rockchip,rk3588-secure-otp";
28 u-boot,dm-spl;
32 u-boot,dm-spl;
36 u-boot,dm-pre-reloc;
[all …]
/OK3568_Linux_fs/u-boot/drivers/mmc/
H A Drockchip_sdhci.c6 * SPDX-License-Identifier: GPL-2.0+
12 #include <dt-structs.h>
45 /* DWC IP vendor area 1 pointer */
57 #define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1)
102 struct mmc mmc; member
125 #define RK_DLL_CMD_OUT BIT(1)
141 writel(RK_CLRSETBITS(7 << 4, 0), &phy->emmcphy_con[6]); in rk3399_emmc_phy_power_on()
142 writel(RK_CLRSETBITS(1 << 11, 1 << 11), &phy->emmcphy_con[0]); in rk3399_emmc_phy_power_on()
143 writel(RK_CLRSETBITS(0xf << 7, 6 << 7), &phy->emmcphy_con[0]); in rk3399_emmc_phy_power_on()
151 writel(RK_CLRSETBITS(1, 1), &phy->emmcphy_con[6]); in rk3399_emmc_phy_power_on()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/
H A Dr8a774e1-hihope-rzg2h.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev4.dtsi"
14 compatible = "hoperun,hihope-rzg2h", "renesas,r8a774e1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;
H A Dr8a774b1-hihope-rzg2n-rev2.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev2.dtsi"
14 compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;
H A Dr8a774b1-hihope-rzg2n.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev4.dtsi"
14 compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;

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