1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Device Tree file for LX2160A-CEx7 4*4882a593Smuzhiyun// 5*4882a593Smuzhiyun// Copyright 2019 SolidRun Ltd. 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include "fsl-lx2160a.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "SolidRun LX2160A COM Express Type 7 module"; 13*4882a593Smuzhiyun compatible = "solidrun,lx2160a-cex7", "fsl,lx2160a"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun aliases { 16*4882a593Smuzhiyun crypto = &crypto; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun sb_3v3: regulator-sb3v3 { 20*4882a593Smuzhiyun compatible = "regulator-fixed"; 21*4882a593Smuzhiyun regulator-name = "RT7290"; 22*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 23*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 24*4882a593Smuzhiyun regulator-boot-on; 25*4882a593Smuzhiyun regulator-always-on; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&crypto { 30*4882a593Smuzhiyun status = "okay"; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&dpmac17 { 34*4882a593Smuzhiyun phy-handle = <&rgmii_phy1>; 35*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun&emdio1 { 39*4882a593Smuzhiyun status = "okay"; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun rgmii_phy1: ethernet-phy@1 { 42*4882a593Smuzhiyun reg = <1>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&esdhc1 { 47*4882a593Smuzhiyun mmc-hs200-1_8v; 48*4882a593Smuzhiyun mmc-hs400-1_8v; 49*4882a593Smuzhiyun bus-width = <8>; 50*4882a593Smuzhiyun status = "okay"; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&i2c0 { 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun i2c-switch@77 { 57*4882a593Smuzhiyun compatible = "nxp,pca9547"; 58*4882a593Smuzhiyun #address-cells = <1>; 59*4882a593Smuzhiyun #size-cells = <0>; 60*4882a593Smuzhiyun reg = <0x77>; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun i2c@0 { 63*4882a593Smuzhiyun #address-cells = <1>; 64*4882a593Smuzhiyun #size-cells = <0>; 65*4882a593Smuzhiyun reg = <0>; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun eeprom@50 { 68*4882a593Smuzhiyun compatible = "atmel,24c512"; 69*4882a593Smuzhiyun reg = <0x50>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun eeprom@51 { 73*4882a593Smuzhiyun compatible = "atmel,spd"; 74*4882a593Smuzhiyun reg = <0x51>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun eeprom@53 { 78*4882a593Smuzhiyun compatible = "atmel,spd"; 79*4882a593Smuzhiyun reg = <0x53>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun eeprom@57 { 83*4882a593Smuzhiyun compatible = "atmel,24c02"; 84*4882a593Smuzhiyun reg = <0x57>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun i2c@1 { 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <0>; 91*4882a593Smuzhiyun reg = <1>; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun fan-temperature-ctrlr@18 { 94*4882a593Smuzhiyun compatible = "ti,amc6821"; 95*4882a593Smuzhiyun reg = <0x18>; 96*4882a593Smuzhiyun cooling-min-state = <0>; 97*4882a593Smuzhiyun cooling-max-state = <9>; 98*4882a593Smuzhiyun #cooling-cells = <2>; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun i2c@2 { 103*4882a593Smuzhiyun #address-cells = <1>; 104*4882a593Smuzhiyun #size-cells = <0>; 105*4882a593Smuzhiyun reg = <2>; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun regulator@5c { 108*4882a593Smuzhiyun compatible = "lltc,ltc3882"; 109*4882a593Smuzhiyun reg = <0x5c>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun i2c@3 { 114*4882a593Smuzhiyun #address-cells = <1>; 115*4882a593Smuzhiyun #size-cells = <0>; 116*4882a593Smuzhiyun reg = <3>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun temperature-sensor@48 { 119*4882a593Smuzhiyun compatible = "nxp,sa56004"; 120*4882a593Smuzhiyun reg = <0x48>; 121*4882a593Smuzhiyun vcc-supply = <&sb_3v3>; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&i2c2 { 128*4882a593Smuzhiyun status = "okay"; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&i2c4 { 132*4882a593Smuzhiyun status = "okay"; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun rtc@51 { 135*4882a593Smuzhiyun compatible = "nxp,pcf2129"; 136*4882a593Smuzhiyun reg = <0x51>; 137*4882a593Smuzhiyun // IRQ10_B 138*4882a593Smuzhiyun interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun}; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun&fspi { 143*4882a593Smuzhiyun status = "okay"; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun flash@0 { 146*4882a593Smuzhiyun #address-cells = <1>; 147*4882a593Smuzhiyun #size-cells = <1>; 148*4882a593Smuzhiyun compatible = "micron,m25p80"; 149*4882a593Smuzhiyun m25p,fast-read; 150*4882a593Smuzhiyun spi-max-frequency = <50000000>; 151*4882a593Smuzhiyun reg = <0>; 152*4882a593Smuzhiyun /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ 153*4882a593Smuzhiyun spi-rx-bus-width = <8>; 154*4882a593Smuzhiyun spi-tx-bus-width = <1>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun}; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun&usb0 { 159*4882a593Smuzhiyun status = "okay"; 160*4882a593Smuzhiyun}; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun&usb1 { 163*4882a593Smuzhiyun status = "okay"; 164*4882a593Smuzhiyun}; 165