xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/armada-3720-db.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree file for Marvell Armada 3720 development board
3*4882a593Smuzhiyun * (DB-88F3720-DDR3)
4*4882a593Smuzhiyun * Copyright (C) 2016 Marvell
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Gregory CLEMENT <gregory.clement@free-electrons.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
9*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
10*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
11*4882a593Smuzhiyun * whole.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
14*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
15*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
16*4882a593Smuzhiyun *     License, or (at your option) any later version.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful
19*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
20*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21*4882a593Smuzhiyun *     GNU General Public License for more details.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * Or, alternatively
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
26*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
27*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
28*4882a593Smuzhiyun *     restriction, including without limitation the rights to use
29*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
30*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
31*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
32*4882a593Smuzhiyun *     conditions:
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
35*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
38*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
42*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun/dts-v1/;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun#include "armada-372x.dtsi"
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun/ {
52*4882a593Smuzhiyun	model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
53*4882a593Smuzhiyun	compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	chosen {
56*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	aliases {
60*4882a593Smuzhiyun		ethernet0 = &eth0;
61*4882a593Smuzhiyun		i2c0 = &i2c0;
62*4882a593Smuzhiyun		spi0 = &spi0;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	memory {
66*4882a593Smuzhiyun		device_type = "memory";
67*4882a593Smuzhiyun		reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
68*4882a593Smuzhiyun	};
69*4882a593Smuzhiyun};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun&comphy {
72*4882a593Smuzhiyun	phy0 {
73*4882a593Smuzhiyun		phy-type = <PHY_TYPE_PEX0>;
74*4882a593Smuzhiyun		phy-speed = <PHY_SPEED_2_5G>;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	phy1 {
78*4882a593Smuzhiyun		phy-type = <PHY_TYPE_USB3_HOST0>;
79*4882a593Smuzhiyun		phy-speed = <PHY_SPEED_5G>;
80*4882a593Smuzhiyun	};
81*4882a593Smuzhiyun};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun&eth0 {
84*4882a593Smuzhiyun	pinctrl-names = "default";
85*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
86*4882a593Smuzhiyun	status = "okay";
87*4882a593Smuzhiyun	phy-mode = "rgmii";
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&i2c0 {
91*4882a593Smuzhiyun	pinctrl-names = "default";
92*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_pins>;
93*4882a593Smuzhiyun	status = "okay";
94*4882a593Smuzhiyun};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun/* CON3 */
97*4882a593Smuzhiyun&sata {
98*4882a593Smuzhiyun	status = "okay";
99*4882a593Smuzhiyun};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun&sdhci0 {
102*4882a593Smuzhiyun	bus-width = <4>;
103*4882a593Smuzhiyun	status = "okay";
104*4882a593Smuzhiyun};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun&sdhci1 {
107*4882a593Smuzhiyun	non-removable;
108*4882a593Smuzhiyun	bus-width = <8>;
109*4882a593Smuzhiyun	mmc-ddr-1_8v;
110*4882a593Smuzhiyun	mmc-hs400-1_8v;
111*4882a593Smuzhiyun	marvell,pad-type = "fixed-1-8v";
112*4882a593Smuzhiyun	status = "okay";
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	#address-cells = <1>;
115*4882a593Smuzhiyun	#size-cells = <0>;
116*4882a593Smuzhiyun	mmccard: mmccard@0 {
117*4882a593Smuzhiyun		compatible = "mmc-card";
118*4882a593Smuzhiyun		reg = <0>;
119*4882a593Smuzhiyun	};
120*4882a593Smuzhiyun};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun&spi0 {
123*4882a593Smuzhiyun	status = "okay";
124*4882a593Smuzhiyun	pinctrl-names = "default";
125*4882a593Smuzhiyun	pinctrl-0 = <&spi_quad_pins>;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun	spi-flash@0 {
128*4882a593Smuzhiyun		#address-cells = <1>;
129*4882a593Smuzhiyun		#size-cells = <1>;
130*4882a593Smuzhiyun		compatible = "st,m25p128", "spi-flash";
131*4882a593Smuzhiyun		reg = <0>; /* Chip select 0 */
132*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
133*4882a593Smuzhiyun		m25p,fast-read;
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun/* Exported on the micro USB connector CON32 through an FTDI */
138*4882a593Smuzhiyun&uart0 {
139*4882a593Smuzhiyun	pinctrl-names = "default";
140*4882a593Smuzhiyun	pinctrl-0 = <&uart1_pins>;
141*4882a593Smuzhiyun	status = "okay";
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun/* CON29 */
145*4882a593Smuzhiyun&usb2 {
146*4882a593Smuzhiyun	status = "okay";
147*4882a593Smuzhiyun};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun/* CON31 */
150*4882a593Smuzhiyun&usb3 {
151*4882a593Smuzhiyun	status = "okay";
152*4882a593Smuzhiyun};
153