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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/
H A Ddma-router.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-router.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DMA Router Generic Binding
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: "dma-common.yaml#"
16 DMA routers are transparent IP blocks used to route DMA request
17 lines from devices to the DMA controller. Some SoCs (like TI DRA7x)
18 have more peripherals integrated with DMA requests than what the DMA
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H A Dst,stm32-dmamux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dmamux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings
10 - Amelie Delaunay <amelie.delaunay@st.com>
13 - $ref: "dma-router.yaml#"
16 "#dma-cells":
20 const: st,stm32h7-dmamux
32 - compatible
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H A Dti-dma-crossbar.txt1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
12 The DMA controller node need to have the following poroperties:
13 - dma-requests: Number of DMA requests the controller can handle
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H A Dlpc1850-dmamux.txt1 NXP LPC18xx/43xx DMA MUX (DMA request router)
4 - compatible: "nxp,lpc1850-dmamux"
5 - reg: Memory map for accessing module
6 - #dma-cells: Should be set to <3>.
7 * 1st cell contain the master dma request signal
8 * 2nd cell contain the mux value (0-3) for the peripheral
11 - dma-requests: Number of DMA requests for the mux
12 - dma-masters: phandle pointing to the DMA controller
14 The DMA controller node need to have the following poroperties:
15 - dma-requests: Number of DMA requests the controller can handle
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/OK3568_Linux_fs/kernel/drivers/dma/
H A Dof-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device tree helpers for DMA request / controller
7 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
24 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list
25 * @dma_spec: pointer to DMA specifier as found in the device tree
27 * Finds a DMA controller with matching device node and number for dma cells
28 * in a list of registered DMA controllers. If a match is found a valid pointer
29 * to the DMA data stored is retuned. A NULL pointer is returned if no match is
37 if (ofdma->of_node == dma_spec->np) in of_dma_find_controller()
40 pr_debug("%s: can't find DMA controller %pOF\n", __func__, in of_dma_find_controller()
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H A Ddmaengine.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
7 * This code implements the DMA subsystem. It provides a HW-neutral interface
9 * if present, and allows different HW DMA drivers to register as providing
29 * See Documentation/driver-api/dmaengine for more details
35 #include <linux/dma-mapping.h>
63 /* --- debugfs implementation --- */
71 dma_dev->dbg_dev_root = debugfs_create_dir(dev_name(dma_dev->dev), in dmaengine_debug_register()
73 if (IS_ERR(dma_dev->dbg_dev_root)) in dmaengine_debug_register()
74 dma_dev->dbg_dev_root = NULL; in dmaengine_debug_register()
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H A Dstm32-dmamux.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Pierre-Yves Mordret <pierre-yves.mordret@st.com>
8 * DMA Router driver for STM32 DMA MUX
10 * Based on TI DMA Crossbar driver
39 u32 dma_requests; /* Number of DMA requests connected to DMAMUX */
40 u32 dmamux_requests; /* Number of DMA requests routed toward DMAs */
42 unsigned long *dma_inuse; /* Used DMA channel */
46 u32 dma_reqs[]; /* Number of DMA Request per DMA masters.
47 * [0] holds number of DMA Masters.
68 /* Clear dma request */ in stm32_dmamux_free()
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H A Dlpc18xx-dmamux.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * DMA Router driver for LPC18xx/43xx DMA MUX
7 * Based on TI DMA Crossbar driver by:
8 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
46 spin_lock_irqsave(&dmamux->lock, flags); in lpc18xx_dmamux_free()
47 mux->busy = false; in lpc18xx_dmamux_free()
48 spin_unlock_irqrestore(&dmamux->lock, flags); in lpc18xx_dmamux_free()
54 struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); in lpc18xx_dmamux_reserve()
59 if (dma_spec->args_count != 3) { in lpc18xx_dmamux_reserve()
60 dev_err(&pdev->dev, "invalid number of dma mux args\n"); in lpc18xx_dmamux_reserve()
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/OK3568_Linux_fs/kernel/sound/pci/ca0106/
H A Dca0106.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
15 * Use separate card based DMA buffer for periods table list.
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
94 #define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
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/OK3568_Linux_fs/kernel/include/linux/
H A Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
19 * typedef dma_cookie_t - an opaque DMA cookie
21 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
32 * enum dma_status - DMA transaction status
47 * enum dma_transaction_type - DMA transaction types/indexes
50 * automatically set as dma devices are registered.
74 * enum dma_transfer_direction - dma transfer mode and direction indicator
90 * ----------------------------
92 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
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/OK3568_Linux_fs/kernel/Documentation/networking/device_drivers/fddi/
H A Dskfp.rst1 .. SPDX-License-Identifier: GPL-2.0
6 SysKonnect driver - SKFP
9 |copy| Copyright 1998-2000 SysKonnect,
11 skfp.txt created 11-May-2000
53 - SK-5521 (SK-NET FDDI-UP)
54 - SK-5522 (SK-NET FDDI-UP DAS)
55 - SK-5541 (SK-NET FDDI-FP)
56 - SK-5543 (SK-NET FDDI-LP)
57 - SK-5544 (SK-NET FDDI-LP DAS)
58 - SK-5821 (SK-NET FDDI-UP64)
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/OK3568_Linux_fs/kernel/drivers/thunderbolt/
H A Dtb.c1 // SPDX-License-Identifier: GPL-2.0
3 * Thunderbolt driver - bus logic (NHI independent)
19 * struct tb_cm - Simple Thunderbolt connection manager
38 return ((void *)tcm - sizeof(struct tb)); in tcm_to_tb()
59 ev->tb = tb; in tb_queue_hotplug()
60 ev->route = route; in tb_queue_hotplug()
61 ev->port = port; in tb_queue_hotplug()
62 ev->unplug = unplug; in tb_queue_hotplug()
63 INIT_WORK(&ev->work, tb_handle_hotplug); in tb_queue_hotplug()
64 queue_work(tb->wq, &ev->work); in tb_queue_hotplug()
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H A Dtb.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt driver - bus logic (NHI independent)
12 #include <linux/nvmem-provider.h>
30 * struct tb_nvm - Structure holding NVM information
36 * @non_active: Non-active portion NVMem device
65 * enum tb_switch_tmu_rate - TMU refresh rate
81 * struct tb_switch_tmu - Structure holding switch TMU configuration
83 * @has_ucap: Does the switch support uni-directional mode
86 * @unidirectional: Is the TMU in uni-directional or bi-directional mode
97 * struct tb_switch - a thunderbolt switch
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H A Dswitch.c1 // SPDX-License-Identifier: GPL-2.0
3 * Thunderbolt driver - switch/port utility functions
11 #include <linux/nvmem-provider.h>
47 if (uuid_equal(&st->uuid, sw->uuid)) in __nvm_get_auth_status()
62 *status = st ? st->status : 0; in nvm_get_auth_status()
69 if (WARN_ON(!sw->uuid)) in nvm_set_auth_status()
80 memcpy(&st->uuid, sw->uuid, sizeof(st->uuid)); in nvm_set_auth_status()
81 INIT_LIST_HEAD(&st->list); in nvm_set_auth_status()
82 list_add_tail(&st->list, &nvm_auth_status_cache); in nvm_set_auth_status()
85 st->status = status; in nvm_set_auth_status()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_display.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
50 schedule_work(&work->flip_work.work); in amdgpu_display_flip_callback()
63 if (!dma_fence_add_callback(fence, &work->cb, in amdgpu_display_flip_handle_fence()
77 struct amdgpu_device *adev = work->adev; in amdgpu_display_flip_work_func()
78 struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[work->crtc_id]; in amdgpu_display_flip_work_func()
80 struct drm_crtc *crtc = &amdgpu_crtc->base; in amdgpu_display_flip_work_func()
85 if (amdgpu_display_flip_handle_fence(work, &work->excl)) in amdgpu_display_flip_work_func()
88 for (i = 0; i < work->shared_count; ++i) in amdgpu_display_flip_work_func()
89 if (amdgpu_display_flip_handle_fence(work, &work->shared[i])) in amdgpu_display_flip_work_func()
95 if (amdgpu_crtc->enabled && in amdgpu_display_flip_work_func()
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/
H A Dhndsoc.h2 * Broadcom HND chip & on-chip-interconnect-related definitions.
6 * Copyright (C) 1999-2017, Broadcom Corporation
27 * <<Broadcom-WL-IPTag/Open:>>
29 * $Id: hndsoc.h 672520 2016-11-28 23:30:55Z $
70 #define SI_ENUM_BASE(sih) ((sih)->enum_base)
75 #define SI_NIC400_GPV_BASE 0x18200000 /* NIC-400 Global Programmers View (GPV) */
76 #define SI_GPV_WR_CAP_ADDR 0x4008 /* WR-CAP offset */
89 #define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */
94 #define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */
104 #define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */
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/OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/
H A Dhndsoc.h2 * Broadcom HND chip & on-chip-interconnect-related definitions.
6 * Copyright (C) 1999-2017, Broadcom Corporation
27 * <<Broadcom-WL-IPTag/Open:>>
29 * $Id: hndsoc.h 672520 2016-11-28 23:30:55Z $
70 #define SI_ENUM_BASE(sih) ((sih)->enum_base)
75 #define SI_NIC400_GPV_BASE 0x18200000 /* NIC-400 Global Programmers View (GPV) */
76 #define SI_GPV_WR_CAP_ADDR 0x4008 /* WR-CAP offset */
89 #define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */
94 #define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */
104 #define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/
H A Dhndsoc.h2 * Broadcom HND chip & on-chip-interconnect-related definitions.
6 * Copyright (C) 1999-2017, Broadcom Corporation
27 * <<Broadcom-WL-IPTag/Open:>>
29 * $Id: hndsoc.h 672520 2016-11-28 23:30:55Z $
70 #define SI_ENUM_BASE(sih) ((sih)->enum_base)
75 #define SI_NIC400_GPV_BASE 0x18200000 /* NIC-400 Global Programmers View (GPV) */
76 #define SI_GPV_WR_CAP_ADDR 0x4008 /* WR-CAP offset */
89 #define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */
94 #define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */
104 #define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */
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/OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/include/
H A Dhndsoc.h2 * Broadcom HND chip & on-chip-interconnect-related definitions.
21 * <<Broadcom-WL-IPTag/Dual:>>
60 #define SI_ENUM_BASE(sih) ((sih)->enum_base)
66 #define SI_NIC400_GPV_BASE 0x18200000 /* NIC-400 Global Programmers View (GPV) */
67 #define SI_GPV_WR_CAP_ADDR 0x4008 /* WR-CAP offset */
71 #define SI_GPV_SL4_BM_ADDR 0x44024 /* NIC-400 Slave interface 4 Bypass merge */
72 #define SI_GPV_SL6_BM_ADDR 0x46024 /* NIC-400 Slave interface 6 Bypass merge */
73 #define SI_GPV_SL8_BM_ADDR 0x4a024 /* NIC-400 Slave interface 8 Bypass merge */
74 #define SI_GPV_SL9_BM_ADDR 0x4b024 /* NIC-400 Slave interface 9 Bypass merge */
95 #define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/include/
H A Dhndsoc.h2 * Broadcom HND chip & on-chip-interconnect-related definitions.
21 * <<Broadcom-WL-IPTag/Dual:>>
60 #define SI_ENUM_BASE(sih) ((sih)->enum_base)
66 #define SI_NIC400_GPV_BASE 0x18200000 /* NIC-400 Global Programmers View (GPV) */
67 #define SI_GPV_WR_CAP_ADDR 0x4008 /* WR-CAP offset */
71 #define SI_GPV_SL4_BM_ADDR 0x44024 /* NIC-400 Slave interface 4 Bypass merge */
72 #define SI_GPV_SL6_BM_ADDR 0x46024 /* NIC-400 Slave interface 6 Bypass merge */
73 #define SI_GPV_SL8_BM_ADDR 0x4a024 /* NIC-400 Slave interface 8 Bypass merge */
74 #define SI_GPV_SL9_BM_ADDR 0x4b024 /* NIC-400 Slave interface 9 Bypass merge */
95 #define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */
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/OK3568_Linux_fs/kernel/drivers/mailbox/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
51 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
53 the Turris Mox router).
77 This driver provides support for inter-processor communication
161 providing an interface for invoking the inter-process communication
174 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
177 An implementation of the APM X-Gene Interprocessor Communication
178 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
179 It is used to send short messages between ARM64-bit cores and
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/OK3568_Linux_fs/kernel/Documentation/admin-guide/
H A Dthunderbolt.rst1 .. SPDX-License-Identifier: GPL-2.0
8 manager is an entity running on the host router (host controller)
22 is expected to be accompanied with an IOMMU based DMA protection.
25 -----------------------------------
27 should be a userspace tool that handles all the low-level details, keeps
31 found in ``Documentation/ABI/testing/sysfs-bus-thunderbolt``.
35 ``/etc/udev/rules.d/99-local.rules``::
41 vulnerable to DMA attacks.
46 be DMA masters and thus read contents of the host memory without CPU and OS
95 -----------------------------------------------------------------
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Ddm814x.dtsi7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm814.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/dm814x.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <1>;
16 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
37 compatible = "arm,cortex-a8";
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_indep_power/include/
H A Dbcmpcie.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Software-specific definitions shared between device and host side
7 * Copyright (C) 1999-2017, Broadcom Corporation
28 * <<Broadcom-WL-IPTag/Open:>>
30 * $Id: bcmpcie.h 678914 2017-01-11 15:34:26Z $
49 /* May be overridden by 43xxxxx-roml.mk */
81 * these techniques have drawbacks on router platforms. For these platforms, it was decided to not
83 * D2H M2M DMA Complete Sync mechanism: Modulo-253-SeqNum or XORCSUM
97 /* Implicit DMA with corerev 19 and after */
129 /* Implicit DMA WAR for 4347B0 PCIe memory retention */
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