1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Thunderbolt driver - bus logic (NHI independent)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
6*4882a593Smuzhiyun * Copyright (C) 2018, Intel Corporation
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #ifndef TB_H_
10*4882a593Smuzhiyun #define TB_H_
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/nvmem-provider.h>
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun #include <linux/thunderbolt.h>
15*4882a593Smuzhiyun #include <linux/uuid.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "tb_regs.h"
18*4882a593Smuzhiyun #include "ctl.h"
19*4882a593Smuzhiyun #include "dma_port.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define NVM_MIN_SIZE SZ_32K
22*4882a593Smuzhiyun #define NVM_MAX_SIZE SZ_512K
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /* Intel specific NVM offsets */
25*4882a593Smuzhiyun #define NVM_DEVID 0x05
26*4882a593Smuzhiyun #define NVM_VERSION 0x08
27*4882a593Smuzhiyun #define NVM_FLASH_SIZE 0x45
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /**
30*4882a593Smuzhiyun * struct tb_nvm - Structure holding NVM information
31*4882a593Smuzhiyun * @dev: Owner of the NVM
32*4882a593Smuzhiyun * @major: Major version number of the active NVM portion
33*4882a593Smuzhiyun * @minor: Minor version number of the active NVM portion
34*4882a593Smuzhiyun * @id: Identifier used with both NVM portions
35*4882a593Smuzhiyun * @active: Active portion NVMem device
36*4882a593Smuzhiyun * @non_active: Non-active portion NVMem device
37*4882a593Smuzhiyun * @buf: Buffer where the NVM image is stored before it is written to
38*4882a593Smuzhiyun * the actual NVM flash device
39*4882a593Smuzhiyun * @buf_data_size: Number of bytes actually consumed by the new NVM
40*4882a593Smuzhiyun * image
41*4882a593Smuzhiyun * @authenticating: The device is authenticating the new NVM
42*4882a593Smuzhiyun * @flushed: The image has been flushed to the storage area
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun * The user of this structure needs to handle serialization of possible
45*4882a593Smuzhiyun * concurrent access.
46*4882a593Smuzhiyun */
47*4882a593Smuzhiyun struct tb_nvm {
48*4882a593Smuzhiyun struct device *dev;
49*4882a593Smuzhiyun u8 major;
50*4882a593Smuzhiyun u8 minor;
51*4882a593Smuzhiyun int id;
52*4882a593Smuzhiyun struct nvmem_device *active;
53*4882a593Smuzhiyun struct nvmem_device *non_active;
54*4882a593Smuzhiyun void *buf;
55*4882a593Smuzhiyun size_t buf_data_size;
56*4882a593Smuzhiyun bool authenticating;
57*4882a593Smuzhiyun bool flushed;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define TB_SWITCH_KEY_SIZE 32
61*4882a593Smuzhiyun #define TB_SWITCH_MAX_DEPTH 6
62*4882a593Smuzhiyun #define USB4_SWITCH_MAX_DEPTH 5
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /**
65*4882a593Smuzhiyun * enum tb_switch_tmu_rate - TMU refresh rate
66*4882a593Smuzhiyun * @TB_SWITCH_TMU_RATE_OFF: %0 (Disable Time Sync handshake)
67*4882a593Smuzhiyun * @TB_SWITCH_TMU_RATE_HIFI: %16 us time interval between successive
68*4882a593Smuzhiyun * transmission of the Delay Request TSNOS
69*4882a593Smuzhiyun * (Time Sync Notification Ordered Set) on a Link
70*4882a593Smuzhiyun * @TB_SWITCH_TMU_RATE_NORMAL: %1 ms time interval between successive
71*4882a593Smuzhiyun * transmission of the Delay Request TSNOS on
72*4882a593Smuzhiyun * a Link
73*4882a593Smuzhiyun */
74*4882a593Smuzhiyun enum tb_switch_tmu_rate {
75*4882a593Smuzhiyun TB_SWITCH_TMU_RATE_OFF = 0,
76*4882a593Smuzhiyun TB_SWITCH_TMU_RATE_HIFI = 16,
77*4882a593Smuzhiyun TB_SWITCH_TMU_RATE_NORMAL = 1000,
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /**
81*4882a593Smuzhiyun * struct tb_switch_tmu - Structure holding switch TMU configuration
82*4882a593Smuzhiyun * @cap: Offset to the TMU capability (%0 if not found)
83*4882a593Smuzhiyun * @has_ucap: Does the switch support uni-directional mode
84*4882a593Smuzhiyun * @rate: TMU refresh rate related to upstream switch. In case of root
85*4882a593Smuzhiyun * switch this holds the domain rate.
86*4882a593Smuzhiyun * @unidirectional: Is the TMU in uni-directional or bi-directional mode
87*4882a593Smuzhiyun * related to upstream switch. Don't case for root switch.
88*4882a593Smuzhiyun */
89*4882a593Smuzhiyun struct tb_switch_tmu {
90*4882a593Smuzhiyun int cap;
91*4882a593Smuzhiyun bool has_ucap;
92*4882a593Smuzhiyun enum tb_switch_tmu_rate rate;
93*4882a593Smuzhiyun bool unidirectional;
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /**
97*4882a593Smuzhiyun * struct tb_switch - a thunderbolt switch
98*4882a593Smuzhiyun * @dev: Device for the switch
99*4882a593Smuzhiyun * @config: Switch configuration
100*4882a593Smuzhiyun * @ports: Ports in this switch
101*4882a593Smuzhiyun * @dma_port: If the switch has port supporting DMA configuration based
102*4882a593Smuzhiyun * mailbox this will hold the pointer to that (%NULL
103*4882a593Smuzhiyun * otherwise). If set it also means the switch has
104*4882a593Smuzhiyun * upgradeable NVM.
105*4882a593Smuzhiyun * @tmu: The switch TMU configuration
106*4882a593Smuzhiyun * @tb: Pointer to the domain the switch belongs to
107*4882a593Smuzhiyun * @uid: Unique ID of the switch
108*4882a593Smuzhiyun * @uuid: UUID of the switch (or %NULL if not supported)
109*4882a593Smuzhiyun * @vendor: Vendor ID of the switch
110*4882a593Smuzhiyun * @device: Device ID of the switch
111*4882a593Smuzhiyun * @vendor_name: Name of the vendor (or %NULL if not known)
112*4882a593Smuzhiyun * @device_name: Name of the device (or %NULL if not known)
113*4882a593Smuzhiyun * @link_speed: Speed of the link in Gb/s
114*4882a593Smuzhiyun * @link_width: Width of the link (1 or 2)
115*4882a593Smuzhiyun * @link_usb4: Upstream link is USB4
116*4882a593Smuzhiyun * @generation: Switch Thunderbolt generation
117*4882a593Smuzhiyun * @cap_plug_events: Offset to the plug events capability (%0 if not found)
118*4882a593Smuzhiyun * @cap_lc: Offset to the link controller capability (%0 if not found)
119*4882a593Smuzhiyun * @is_unplugged: The switch is going away
120*4882a593Smuzhiyun * @drom: DROM of the switch (%NULL if not found)
121*4882a593Smuzhiyun * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
122*4882a593Smuzhiyun * @no_nvm_upgrade: Prevent NVM upgrade of this switch
123*4882a593Smuzhiyun * @safe_mode: The switch is in safe-mode
124*4882a593Smuzhiyun * @boot: Whether the switch was already authorized on boot or not
125*4882a593Smuzhiyun * @rpm: The switch supports runtime PM
126*4882a593Smuzhiyun * @authorized: Whether the switch is authorized by user or policy
127*4882a593Smuzhiyun * @security_level: Switch supported security level
128*4882a593Smuzhiyun * @debugfs_dir: Pointer to the debugfs structure
129*4882a593Smuzhiyun * @key: Contains the key used to challenge the device or %NULL if not
130*4882a593Smuzhiyun * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
131*4882a593Smuzhiyun * @connection_id: Connection ID used with ICM messaging
132*4882a593Smuzhiyun * @connection_key: Connection key used with ICM messaging
133*4882a593Smuzhiyun * @link: Root switch link this switch is connected (ICM only)
134*4882a593Smuzhiyun * @depth: Depth in the chain this switch is connected (ICM only)
135*4882a593Smuzhiyun * @rpm_complete: Completion used to wait for runtime resume to
136*4882a593Smuzhiyun * complete (ICM only)
137*4882a593Smuzhiyun * @quirks: Quirks used for this Thunderbolt switch
138*4882a593Smuzhiyun *
139*4882a593Smuzhiyun * When the switch is being added or removed to the domain (other
140*4882a593Smuzhiyun * switches) you need to have domain lock held.
141*4882a593Smuzhiyun */
142*4882a593Smuzhiyun struct tb_switch {
143*4882a593Smuzhiyun struct device dev;
144*4882a593Smuzhiyun struct tb_regs_switch_header config;
145*4882a593Smuzhiyun struct tb_port *ports;
146*4882a593Smuzhiyun struct tb_dma_port *dma_port;
147*4882a593Smuzhiyun struct tb_switch_tmu tmu;
148*4882a593Smuzhiyun struct tb *tb;
149*4882a593Smuzhiyun u64 uid;
150*4882a593Smuzhiyun uuid_t *uuid;
151*4882a593Smuzhiyun u16 vendor;
152*4882a593Smuzhiyun u16 device;
153*4882a593Smuzhiyun const char *vendor_name;
154*4882a593Smuzhiyun const char *device_name;
155*4882a593Smuzhiyun unsigned int link_speed;
156*4882a593Smuzhiyun unsigned int link_width;
157*4882a593Smuzhiyun bool link_usb4;
158*4882a593Smuzhiyun unsigned int generation;
159*4882a593Smuzhiyun int cap_plug_events;
160*4882a593Smuzhiyun int cap_lc;
161*4882a593Smuzhiyun bool is_unplugged;
162*4882a593Smuzhiyun u8 *drom;
163*4882a593Smuzhiyun struct tb_nvm *nvm;
164*4882a593Smuzhiyun bool no_nvm_upgrade;
165*4882a593Smuzhiyun bool safe_mode;
166*4882a593Smuzhiyun bool boot;
167*4882a593Smuzhiyun bool rpm;
168*4882a593Smuzhiyun unsigned int authorized;
169*4882a593Smuzhiyun enum tb_security_level security_level;
170*4882a593Smuzhiyun struct dentry *debugfs_dir;
171*4882a593Smuzhiyun u8 *key;
172*4882a593Smuzhiyun u8 connection_id;
173*4882a593Smuzhiyun u8 connection_key;
174*4882a593Smuzhiyun u8 link;
175*4882a593Smuzhiyun u8 depth;
176*4882a593Smuzhiyun struct completion rpm_complete;
177*4882a593Smuzhiyun unsigned long quirks;
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /**
181*4882a593Smuzhiyun * struct tb_port - a thunderbolt port, part of a tb_switch
182*4882a593Smuzhiyun * @config: Cached port configuration read from registers
183*4882a593Smuzhiyun * @sw: Switch the port belongs to
184*4882a593Smuzhiyun * @remote: Remote port (%NULL if not connected)
185*4882a593Smuzhiyun * @xdomain: Remote host (%NULL if not connected)
186*4882a593Smuzhiyun * @cap_phy: Offset, zero if not found
187*4882a593Smuzhiyun * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
188*4882a593Smuzhiyun * @cap_adap: Offset of the adapter specific capability (%0 if not present)
189*4882a593Smuzhiyun * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
190*4882a593Smuzhiyun * @port: Port number on switch
191*4882a593Smuzhiyun * @disabled: Disabled by eeprom or enabled but not implemented
192*4882a593Smuzhiyun * @bonded: true if the port is bonded (two lanes combined as one)
193*4882a593Smuzhiyun * @dual_link_port: If the switch is connected using two ports, points
194*4882a593Smuzhiyun * to the other port.
195*4882a593Smuzhiyun * @link_nr: Is this primary or secondary port on the dual_link.
196*4882a593Smuzhiyun * @in_hopids: Currently allocated input HopIDs
197*4882a593Smuzhiyun * @out_hopids: Currently allocated output HopIDs
198*4882a593Smuzhiyun * @list: Used to link ports to DP resources list
199*4882a593Smuzhiyun */
200*4882a593Smuzhiyun struct tb_port {
201*4882a593Smuzhiyun struct tb_regs_port_header config;
202*4882a593Smuzhiyun struct tb_switch *sw;
203*4882a593Smuzhiyun struct tb_port *remote;
204*4882a593Smuzhiyun struct tb_xdomain *xdomain;
205*4882a593Smuzhiyun int cap_phy;
206*4882a593Smuzhiyun int cap_tmu;
207*4882a593Smuzhiyun int cap_adap;
208*4882a593Smuzhiyun int cap_usb4;
209*4882a593Smuzhiyun u8 port;
210*4882a593Smuzhiyun bool disabled;
211*4882a593Smuzhiyun bool bonded;
212*4882a593Smuzhiyun struct tb_port *dual_link_port;
213*4882a593Smuzhiyun u8 link_nr:1;
214*4882a593Smuzhiyun struct ida in_hopids;
215*4882a593Smuzhiyun struct ida out_hopids;
216*4882a593Smuzhiyun struct list_head list;
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /**
220*4882a593Smuzhiyun * tb_retimer: Thunderbolt retimer
221*4882a593Smuzhiyun * @dev: Device for the retimer
222*4882a593Smuzhiyun * @tb: Pointer to the domain the retimer belongs to
223*4882a593Smuzhiyun * @index: Retimer index facing the router USB4 port
224*4882a593Smuzhiyun * @vendor: Vendor ID of the retimer
225*4882a593Smuzhiyun * @device: Device ID of the retimer
226*4882a593Smuzhiyun * @port: Pointer to the lane 0 adapter
227*4882a593Smuzhiyun * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise)
228*4882a593Smuzhiyun * @auth_status: Status of last NVM authentication
229*4882a593Smuzhiyun */
230*4882a593Smuzhiyun struct tb_retimer {
231*4882a593Smuzhiyun struct device dev;
232*4882a593Smuzhiyun struct tb *tb;
233*4882a593Smuzhiyun u8 index;
234*4882a593Smuzhiyun u32 vendor;
235*4882a593Smuzhiyun u32 device;
236*4882a593Smuzhiyun struct tb_port *port;
237*4882a593Smuzhiyun struct tb_nvm *nvm;
238*4882a593Smuzhiyun u32 auth_status;
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun /**
242*4882a593Smuzhiyun * struct tb_path_hop - routing information for a tb_path
243*4882a593Smuzhiyun * @in_port: Ingress port of a switch
244*4882a593Smuzhiyun * @out_port: Egress port of a switch where the packet is routed out
245*4882a593Smuzhiyun * (must be on the same switch than @in_port)
246*4882a593Smuzhiyun * @in_hop_index: HopID where the path configuration entry is placed in
247*4882a593Smuzhiyun * the path config space of @in_port.
248*4882a593Smuzhiyun * @in_counter_index: Used counter index (not used in the driver
249*4882a593Smuzhiyun * currently, %-1 to disable)
250*4882a593Smuzhiyun * @next_hop_index: HopID of the packet when it is routed out from @out_port
251*4882a593Smuzhiyun * @initial_credits: Number of initial flow control credits allocated for
252*4882a593Smuzhiyun * the path
253*4882a593Smuzhiyun *
254*4882a593Smuzhiyun * Hop configuration is always done on the IN port of a switch.
255*4882a593Smuzhiyun * in_port and out_port have to be on the same switch. Packets arriving on
256*4882a593Smuzhiyun * in_port with "hop" = in_hop_index will get routed to through out_port. The
257*4882a593Smuzhiyun * next hop to take (on out_port->remote) is determined by
258*4882a593Smuzhiyun * next_hop_index. When routing packet to another switch (out->remote is
259*4882a593Smuzhiyun * set) the @next_hop_index must match the @in_hop_index of that next
260*4882a593Smuzhiyun * hop to make routing possible.
261*4882a593Smuzhiyun *
262*4882a593Smuzhiyun * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
263*4882a593Smuzhiyun * port.
264*4882a593Smuzhiyun */
265*4882a593Smuzhiyun struct tb_path_hop {
266*4882a593Smuzhiyun struct tb_port *in_port;
267*4882a593Smuzhiyun struct tb_port *out_port;
268*4882a593Smuzhiyun int in_hop_index;
269*4882a593Smuzhiyun int in_counter_index;
270*4882a593Smuzhiyun int next_hop_index;
271*4882a593Smuzhiyun unsigned int initial_credits;
272*4882a593Smuzhiyun };
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /**
275*4882a593Smuzhiyun * enum tb_path_port - path options mask
276*4882a593Smuzhiyun * @TB_PATH_NONE: Do not activate on any hop on path
277*4882a593Smuzhiyun * @TB_PATH_SOURCE: Activate on the first hop (out of src)
278*4882a593Smuzhiyun * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
279*4882a593Smuzhiyun * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
280*4882a593Smuzhiyun * @TB_PATH_ALL: Activate on all hops on the path
281*4882a593Smuzhiyun */
282*4882a593Smuzhiyun enum tb_path_port {
283*4882a593Smuzhiyun TB_PATH_NONE = 0,
284*4882a593Smuzhiyun TB_PATH_SOURCE = 1,
285*4882a593Smuzhiyun TB_PATH_INTERNAL = 2,
286*4882a593Smuzhiyun TB_PATH_DESTINATION = 4,
287*4882a593Smuzhiyun TB_PATH_ALL = 7,
288*4882a593Smuzhiyun };
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun /**
291*4882a593Smuzhiyun * struct tb_path - a unidirectional path between two ports
292*4882a593Smuzhiyun * @tb: Pointer to the domain structure
293*4882a593Smuzhiyun * @name: Name of the path (used for debugging)
294*4882a593Smuzhiyun * @nfc_credits: Number of non flow controlled credits allocated for the path
295*4882a593Smuzhiyun * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
296*4882a593Smuzhiyun * @egress_shared_buffer: Shared buffering used for egress ports on the path
297*4882a593Smuzhiyun * @ingress_fc_enable: Flow control for ingress ports on the path
298*4882a593Smuzhiyun * @egress_fc_enable: Flow control for egress ports on the path
299*4882a593Smuzhiyun * @priority: Priority group if the path
300*4882a593Smuzhiyun * @weight: Weight of the path inside the priority group
301*4882a593Smuzhiyun * @drop_packages: Drop packages from queue tail or head
302*4882a593Smuzhiyun * @activated: Is the path active
303*4882a593Smuzhiyun * @clear_fc: Clear all flow control from the path config space entries
304*4882a593Smuzhiyun * when deactivating this path
305*4882a593Smuzhiyun * @hops: Path hops
306*4882a593Smuzhiyun * @path_length: How many hops the path uses
307*4882a593Smuzhiyun *
308*4882a593Smuzhiyun * A path consists of a number of hops (see &struct tb_path_hop). To
309*4882a593Smuzhiyun * establish a PCIe tunnel two paths have to be created between the two
310*4882a593Smuzhiyun * PCIe ports.
311*4882a593Smuzhiyun */
312*4882a593Smuzhiyun struct tb_path {
313*4882a593Smuzhiyun struct tb *tb;
314*4882a593Smuzhiyun const char *name;
315*4882a593Smuzhiyun int nfc_credits;
316*4882a593Smuzhiyun enum tb_path_port ingress_shared_buffer;
317*4882a593Smuzhiyun enum tb_path_port egress_shared_buffer;
318*4882a593Smuzhiyun enum tb_path_port ingress_fc_enable;
319*4882a593Smuzhiyun enum tb_path_port egress_fc_enable;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun unsigned int priority:3;
322*4882a593Smuzhiyun int weight:4;
323*4882a593Smuzhiyun bool drop_packages;
324*4882a593Smuzhiyun bool activated;
325*4882a593Smuzhiyun bool clear_fc;
326*4882a593Smuzhiyun struct tb_path_hop *hops;
327*4882a593Smuzhiyun int path_length;
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /* HopIDs 0-7 are reserved by the Thunderbolt protocol */
331*4882a593Smuzhiyun #define TB_PATH_MIN_HOPID 8
332*4882a593Smuzhiyun /*
333*4882a593Smuzhiyun * Support paths from the farthest (depth 6) router to the host and back
334*4882a593Smuzhiyun * to the same level (not necessarily to the same router).
335*4882a593Smuzhiyun */
336*4882a593Smuzhiyun #define TB_PATH_MAX_HOPS (7 * 2)
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun /* Possible wake types */
339*4882a593Smuzhiyun #define TB_WAKE_ON_CONNECT BIT(0)
340*4882a593Smuzhiyun #define TB_WAKE_ON_DISCONNECT BIT(1)
341*4882a593Smuzhiyun #define TB_WAKE_ON_USB4 BIT(2)
342*4882a593Smuzhiyun #define TB_WAKE_ON_USB3 BIT(3)
343*4882a593Smuzhiyun #define TB_WAKE_ON_PCIE BIT(4)
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /**
346*4882a593Smuzhiyun * struct tb_cm_ops - Connection manager specific operations vector
347*4882a593Smuzhiyun * @driver_ready: Called right after control channel is started. Used by
348*4882a593Smuzhiyun * ICM to send driver ready message to the firmware.
349*4882a593Smuzhiyun * @start: Starts the domain
350*4882a593Smuzhiyun * @stop: Stops the domain
351*4882a593Smuzhiyun * @suspend_noirq: Connection manager specific suspend_noirq
352*4882a593Smuzhiyun * @resume_noirq: Connection manager specific resume_noirq
353*4882a593Smuzhiyun * @suspend: Connection manager specific suspend
354*4882a593Smuzhiyun * @freeze_noirq: Connection manager specific freeze_noirq
355*4882a593Smuzhiyun * @thaw_noirq: Connection manager specific thaw_noirq
356*4882a593Smuzhiyun * @complete: Connection manager specific complete
357*4882a593Smuzhiyun * @runtime_suspend: Connection manager specific runtime_suspend
358*4882a593Smuzhiyun * @runtime_resume: Connection manager specific runtime_resume
359*4882a593Smuzhiyun * @runtime_suspend_switch: Runtime suspend a switch
360*4882a593Smuzhiyun * @runtime_resume_switch: Runtime resume a switch
361*4882a593Smuzhiyun * @handle_event: Handle thunderbolt event
362*4882a593Smuzhiyun * @get_boot_acl: Get boot ACL list
363*4882a593Smuzhiyun * @set_boot_acl: Set boot ACL list
364*4882a593Smuzhiyun * @approve_switch: Approve switch
365*4882a593Smuzhiyun * @add_switch_key: Add key to switch
366*4882a593Smuzhiyun * @challenge_switch_key: Challenge switch using key
367*4882a593Smuzhiyun * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
368*4882a593Smuzhiyun * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
369*4882a593Smuzhiyun * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
370*4882a593Smuzhiyun */
371*4882a593Smuzhiyun struct tb_cm_ops {
372*4882a593Smuzhiyun int (*driver_ready)(struct tb *tb);
373*4882a593Smuzhiyun int (*start)(struct tb *tb);
374*4882a593Smuzhiyun void (*stop)(struct tb *tb);
375*4882a593Smuzhiyun int (*suspend_noirq)(struct tb *tb);
376*4882a593Smuzhiyun int (*resume_noirq)(struct tb *tb);
377*4882a593Smuzhiyun int (*suspend)(struct tb *tb);
378*4882a593Smuzhiyun int (*freeze_noirq)(struct tb *tb);
379*4882a593Smuzhiyun int (*thaw_noirq)(struct tb *tb);
380*4882a593Smuzhiyun void (*complete)(struct tb *tb);
381*4882a593Smuzhiyun int (*runtime_suspend)(struct tb *tb);
382*4882a593Smuzhiyun int (*runtime_resume)(struct tb *tb);
383*4882a593Smuzhiyun int (*runtime_suspend_switch)(struct tb_switch *sw);
384*4882a593Smuzhiyun int (*runtime_resume_switch)(struct tb_switch *sw);
385*4882a593Smuzhiyun void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
386*4882a593Smuzhiyun const void *buf, size_t size);
387*4882a593Smuzhiyun int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
388*4882a593Smuzhiyun int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
389*4882a593Smuzhiyun int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
390*4882a593Smuzhiyun int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
391*4882a593Smuzhiyun int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
392*4882a593Smuzhiyun const u8 *challenge, u8 *response);
393*4882a593Smuzhiyun int (*disconnect_pcie_paths)(struct tb *tb);
394*4882a593Smuzhiyun int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd);
395*4882a593Smuzhiyun int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd);
396*4882a593Smuzhiyun };
397*4882a593Smuzhiyun
tb_priv(struct tb * tb)398*4882a593Smuzhiyun static inline void *tb_priv(struct tb *tb)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun return (void *)tb->privdata;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun #define TB_AUTOSUSPEND_DELAY 15000 /* ms */
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun /* helper functions & macros */
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun /**
408*4882a593Smuzhiyun * tb_upstream_port() - return the upstream port of a switch
409*4882a593Smuzhiyun *
410*4882a593Smuzhiyun * Every switch has an upstream port (for the root switch it is the NHI).
411*4882a593Smuzhiyun *
412*4882a593Smuzhiyun * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
413*4882a593Smuzhiyun * non root switches (on the NHI port remote is always NULL).
414*4882a593Smuzhiyun *
415*4882a593Smuzhiyun * Return: Returns the upstream port of the switch.
416*4882a593Smuzhiyun */
tb_upstream_port(struct tb_switch * sw)417*4882a593Smuzhiyun static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun return &sw->ports[sw->config.upstream_port_number];
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun /**
423*4882a593Smuzhiyun * tb_is_upstream_port() - Is the port upstream facing
424*4882a593Smuzhiyun * @port: Port to check
425*4882a593Smuzhiyun *
426*4882a593Smuzhiyun * Returns true if @port is upstream facing port. In case of dual link
427*4882a593Smuzhiyun * ports both return true.
428*4882a593Smuzhiyun */
tb_is_upstream_port(const struct tb_port * port)429*4882a593Smuzhiyun static inline bool tb_is_upstream_port(const struct tb_port *port)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun const struct tb_port *upstream_port = tb_upstream_port(port->sw);
432*4882a593Smuzhiyun return port == upstream_port || port->dual_link_port == upstream_port;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
tb_route(const struct tb_switch * sw)435*4882a593Smuzhiyun static inline u64 tb_route(const struct tb_switch *sw)
436*4882a593Smuzhiyun {
437*4882a593Smuzhiyun return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
tb_port_at(u64 route,struct tb_switch * sw)440*4882a593Smuzhiyun static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun u8 port;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun port = route >> (sw->config.depth * 8);
445*4882a593Smuzhiyun if (WARN_ON(port > sw->config.max_port_number))
446*4882a593Smuzhiyun return NULL;
447*4882a593Smuzhiyun return &sw->ports[port];
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun /**
451*4882a593Smuzhiyun * tb_port_has_remote() - Does the port have switch connected downstream
452*4882a593Smuzhiyun * @port: Port to check
453*4882a593Smuzhiyun *
454*4882a593Smuzhiyun * Returns true only when the port is primary port and has remote set.
455*4882a593Smuzhiyun */
tb_port_has_remote(const struct tb_port * port)456*4882a593Smuzhiyun static inline bool tb_port_has_remote(const struct tb_port *port)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun if (tb_is_upstream_port(port))
459*4882a593Smuzhiyun return false;
460*4882a593Smuzhiyun if (!port->remote)
461*4882a593Smuzhiyun return false;
462*4882a593Smuzhiyun if (port->dual_link_port && port->link_nr)
463*4882a593Smuzhiyun return false;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun return true;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
tb_port_is_null(const struct tb_port * port)468*4882a593Smuzhiyun static inline bool tb_port_is_null(const struct tb_port *port)
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun return port && port->port && port->config.type == TB_TYPE_PORT;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
tb_port_is_nhi(const struct tb_port * port)473*4882a593Smuzhiyun static inline bool tb_port_is_nhi(const struct tb_port *port)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun return port && port->config.type == TB_TYPE_NHI;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
tb_port_is_pcie_down(const struct tb_port * port)478*4882a593Smuzhiyun static inline bool tb_port_is_pcie_down(const struct tb_port *port)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun return port && port->config.type == TB_TYPE_PCIE_DOWN;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
tb_port_is_pcie_up(const struct tb_port * port)483*4882a593Smuzhiyun static inline bool tb_port_is_pcie_up(const struct tb_port *port)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun return port && port->config.type == TB_TYPE_PCIE_UP;
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun
tb_port_is_dpin(const struct tb_port * port)488*4882a593Smuzhiyun static inline bool tb_port_is_dpin(const struct tb_port *port)
489*4882a593Smuzhiyun {
490*4882a593Smuzhiyun return port && port->config.type == TB_TYPE_DP_HDMI_IN;
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun
tb_port_is_dpout(const struct tb_port * port)493*4882a593Smuzhiyun static inline bool tb_port_is_dpout(const struct tb_port *port)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun
tb_port_is_usb3_down(const struct tb_port * port)498*4882a593Smuzhiyun static inline bool tb_port_is_usb3_down(const struct tb_port *port)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun return port && port->config.type == TB_TYPE_USB3_DOWN;
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun
tb_port_is_usb3_up(const struct tb_port * port)503*4882a593Smuzhiyun static inline bool tb_port_is_usb3_up(const struct tb_port *port)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun return port && port->config.type == TB_TYPE_USB3_UP;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
tb_sw_read(struct tb_switch * sw,void * buffer,enum tb_cfg_space space,u32 offset,u32 length)508*4882a593Smuzhiyun static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
509*4882a593Smuzhiyun enum tb_cfg_space space, u32 offset, u32 length)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun if (sw->is_unplugged)
512*4882a593Smuzhiyun return -ENODEV;
513*4882a593Smuzhiyun return tb_cfg_read(sw->tb->ctl,
514*4882a593Smuzhiyun buffer,
515*4882a593Smuzhiyun tb_route(sw),
516*4882a593Smuzhiyun 0,
517*4882a593Smuzhiyun space,
518*4882a593Smuzhiyun offset,
519*4882a593Smuzhiyun length);
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun
tb_sw_write(struct tb_switch * sw,const void * buffer,enum tb_cfg_space space,u32 offset,u32 length)522*4882a593Smuzhiyun static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
523*4882a593Smuzhiyun enum tb_cfg_space space, u32 offset, u32 length)
524*4882a593Smuzhiyun {
525*4882a593Smuzhiyun if (sw->is_unplugged)
526*4882a593Smuzhiyun return -ENODEV;
527*4882a593Smuzhiyun return tb_cfg_write(sw->tb->ctl,
528*4882a593Smuzhiyun buffer,
529*4882a593Smuzhiyun tb_route(sw),
530*4882a593Smuzhiyun 0,
531*4882a593Smuzhiyun space,
532*4882a593Smuzhiyun offset,
533*4882a593Smuzhiyun length);
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun
tb_port_read(struct tb_port * port,void * buffer,enum tb_cfg_space space,u32 offset,u32 length)536*4882a593Smuzhiyun static inline int tb_port_read(struct tb_port *port, void *buffer,
537*4882a593Smuzhiyun enum tb_cfg_space space, u32 offset, u32 length)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun if (port->sw->is_unplugged)
540*4882a593Smuzhiyun return -ENODEV;
541*4882a593Smuzhiyun return tb_cfg_read(port->sw->tb->ctl,
542*4882a593Smuzhiyun buffer,
543*4882a593Smuzhiyun tb_route(port->sw),
544*4882a593Smuzhiyun port->port,
545*4882a593Smuzhiyun space,
546*4882a593Smuzhiyun offset,
547*4882a593Smuzhiyun length);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
tb_port_write(struct tb_port * port,const void * buffer,enum tb_cfg_space space,u32 offset,u32 length)550*4882a593Smuzhiyun static inline int tb_port_write(struct tb_port *port, const void *buffer,
551*4882a593Smuzhiyun enum tb_cfg_space space, u32 offset, u32 length)
552*4882a593Smuzhiyun {
553*4882a593Smuzhiyun if (port->sw->is_unplugged)
554*4882a593Smuzhiyun return -ENODEV;
555*4882a593Smuzhiyun return tb_cfg_write(port->sw->tb->ctl,
556*4882a593Smuzhiyun buffer,
557*4882a593Smuzhiyun tb_route(port->sw),
558*4882a593Smuzhiyun port->port,
559*4882a593Smuzhiyun space,
560*4882a593Smuzhiyun offset,
561*4882a593Smuzhiyun length);
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun #define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
565*4882a593Smuzhiyun #define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
566*4882a593Smuzhiyun #define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
567*4882a593Smuzhiyun #define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
568*4882a593Smuzhiyun #define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun #define __TB_SW_PRINT(level, sw, fmt, arg...) \
571*4882a593Smuzhiyun do { \
572*4882a593Smuzhiyun const struct tb_switch *__sw = (sw); \
573*4882a593Smuzhiyun level(__sw->tb, "%llx: " fmt, \
574*4882a593Smuzhiyun tb_route(__sw), ## arg); \
575*4882a593Smuzhiyun } while (0)
576*4882a593Smuzhiyun #define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
577*4882a593Smuzhiyun #define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
578*4882a593Smuzhiyun #define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
579*4882a593Smuzhiyun #define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun #define __TB_PORT_PRINT(level, _port, fmt, arg...) \
582*4882a593Smuzhiyun do { \
583*4882a593Smuzhiyun const struct tb_port *__port = (_port); \
584*4882a593Smuzhiyun level(__port->sw->tb, "%llx:%x: " fmt, \
585*4882a593Smuzhiyun tb_route(__port->sw), __port->port, ## arg); \
586*4882a593Smuzhiyun } while (0)
587*4882a593Smuzhiyun #define tb_port_WARN(port, fmt, arg...) \
588*4882a593Smuzhiyun __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
589*4882a593Smuzhiyun #define tb_port_warn(port, fmt, arg...) \
590*4882a593Smuzhiyun __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
591*4882a593Smuzhiyun #define tb_port_info(port, fmt, arg...) \
592*4882a593Smuzhiyun __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
593*4882a593Smuzhiyun #define tb_port_dbg(port, fmt, arg...) \
594*4882a593Smuzhiyun __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun struct tb *icm_probe(struct tb_nhi *nhi);
597*4882a593Smuzhiyun struct tb *tb_probe(struct tb_nhi *nhi);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun extern struct device_type tb_domain_type;
600*4882a593Smuzhiyun extern struct device_type tb_retimer_type;
601*4882a593Smuzhiyun extern struct device_type tb_switch_type;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun int tb_domain_init(void);
604*4882a593Smuzhiyun void tb_domain_exit(void);
605*4882a593Smuzhiyun int tb_xdomain_init(void);
606*4882a593Smuzhiyun void tb_xdomain_exit(void);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun struct tb *tb_domain_alloc(struct tb_nhi *nhi, size_t privsize);
609*4882a593Smuzhiyun int tb_domain_add(struct tb *tb);
610*4882a593Smuzhiyun void tb_domain_remove(struct tb *tb);
611*4882a593Smuzhiyun int tb_domain_suspend_noirq(struct tb *tb);
612*4882a593Smuzhiyun int tb_domain_resume_noirq(struct tb *tb);
613*4882a593Smuzhiyun int tb_domain_suspend(struct tb *tb);
614*4882a593Smuzhiyun int tb_domain_freeze_noirq(struct tb *tb);
615*4882a593Smuzhiyun int tb_domain_thaw_noirq(struct tb *tb);
616*4882a593Smuzhiyun void tb_domain_complete(struct tb *tb);
617*4882a593Smuzhiyun int tb_domain_runtime_suspend(struct tb *tb);
618*4882a593Smuzhiyun int tb_domain_runtime_resume(struct tb *tb);
619*4882a593Smuzhiyun int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
620*4882a593Smuzhiyun int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
621*4882a593Smuzhiyun int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
622*4882a593Smuzhiyun int tb_domain_disconnect_pcie_paths(struct tb *tb);
623*4882a593Smuzhiyun int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd);
624*4882a593Smuzhiyun int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd);
625*4882a593Smuzhiyun int tb_domain_disconnect_all_paths(struct tb *tb);
626*4882a593Smuzhiyun
tb_domain_get(struct tb * tb)627*4882a593Smuzhiyun static inline struct tb *tb_domain_get(struct tb *tb)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun if (tb)
630*4882a593Smuzhiyun get_device(&tb->dev);
631*4882a593Smuzhiyun return tb;
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
tb_domain_put(struct tb * tb)634*4882a593Smuzhiyun static inline void tb_domain_put(struct tb *tb)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun put_device(&tb->dev);
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun struct tb_nvm *tb_nvm_alloc(struct device *dev);
640*4882a593Smuzhiyun int tb_nvm_add_active(struct tb_nvm *nvm, size_t size, nvmem_reg_read_t reg_read);
641*4882a593Smuzhiyun int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
642*4882a593Smuzhiyun size_t bytes);
643*4882a593Smuzhiyun int tb_nvm_add_non_active(struct tb_nvm *nvm, size_t size,
644*4882a593Smuzhiyun nvmem_reg_write_t reg_write);
645*4882a593Smuzhiyun void tb_nvm_free(struct tb_nvm *nvm);
646*4882a593Smuzhiyun void tb_nvm_exit(void);
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
649*4882a593Smuzhiyun u64 route);
650*4882a593Smuzhiyun struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
651*4882a593Smuzhiyun struct device *parent, u64 route);
652*4882a593Smuzhiyun int tb_switch_configure(struct tb_switch *sw);
653*4882a593Smuzhiyun int tb_switch_add(struct tb_switch *sw);
654*4882a593Smuzhiyun void tb_switch_remove(struct tb_switch *sw);
655*4882a593Smuzhiyun void tb_switch_suspend(struct tb_switch *sw, bool runtime);
656*4882a593Smuzhiyun int tb_switch_resume(struct tb_switch *sw);
657*4882a593Smuzhiyun int tb_switch_reset(struct tb_switch *sw);
658*4882a593Smuzhiyun void tb_sw_set_unplugged(struct tb_switch *sw);
659*4882a593Smuzhiyun struct tb_port *tb_switch_find_port(struct tb_switch *sw,
660*4882a593Smuzhiyun enum tb_port_type type);
661*4882a593Smuzhiyun struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
662*4882a593Smuzhiyun u8 depth);
663*4882a593Smuzhiyun struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
664*4882a593Smuzhiyun struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun /**
667*4882a593Smuzhiyun * tb_switch_for_each_port() - Iterate over each switch port
668*4882a593Smuzhiyun * @sw: Switch whose ports to iterate
669*4882a593Smuzhiyun * @p: Port used as iterator
670*4882a593Smuzhiyun *
671*4882a593Smuzhiyun * Iterates over each switch port skipping the control port (port %0).
672*4882a593Smuzhiyun */
673*4882a593Smuzhiyun #define tb_switch_for_each_port(sw, p) \
674*4882a593Smuzhiyun for ((p) = &(sw)->ports[1]; \
675*4882a593Smuzhiyun (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
676*4882a593Smuzhiyun
tb_switch_get(struct tb_switch * sw)677*4882a593Smuzhiyun static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
678*4882a593Smuzhiyun {
679*4882a593Smuzhiyun if (sw)
680*4882a593Smuzhiyun get_device(&sw->dev);
681*4882a593Smuzhiyun return sw;
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun
tb_switch_put(struct tb_switch * sw)684*4882a593Smuzhiyun static inline void tb_switch_put(struct tb_switch *sw)
685*4882a593Smuzhiyun {
686*4882a593Smuzhiyun put_device(&sw->dev);
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
tb_is_switch(const struct device * dev)689*4882a593Smuzhiyun static inline bool tb_is_switch(const struct device *dev)
690*4882a593Smuzhiyun {
691*4882a593Smuzhiyun return dev->type == &tb_switch_type;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun
tb_to_switch(struct device * dev)694*4882a593Smuzhiyun static inline struct tb_switch *tb_to_switch(struct device *dev)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun if (tb_is_switch(dev))
697*4882a593Smuzhiyun return container_of(dev, struct tb_switch, dev);
698*4882a593Smuzhiyun return NULL;
699*4882a593Smuzhiyun }
700*4882a593Smuzhiyun
tb_switch_parent(struct tb_switch * sw)701*4882a593Smuzhiyun static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
702*4882a593Smuzhiyun {
703*4882a593Smuzhiyun return tb_to_switch(sw->dev.parent);
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun
tb_switch_is_light_ridge(const struct tb_switch * sw)706*4882a593Smuzhiyun static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
707*4882a593Smuzhiyun {
708*4882a593Smuzhiyun return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
709*4882a593Smuzhiyun sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
tb_switch_is_eagle_ridge(const struct tb_switch * sw)712*4882a593Smuzhiyun static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
713*4882a593Smuzhiyun {
714*4882a593Smuzhiyun return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
715*4882a593Smuzhiyun sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun
tb_switch_is_cactus_ridge(const struct tb_switch * sw)718*4882a593Smuzhiyun static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
719*4882a593Smuzhiyun {
720*4882a593Smuzhiyun if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
721*4882a593Smuzhiyun switch (sw->config.device_id) {
722*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
723*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
724*4882a593Smuzhiyun return true;
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun return false;
728*4882a593Smuzhiyun }
729*4882a593Smuzhiyun
tb_switch_is_falcon_ridge(const struct tb_switch * sw)730*4882a593Smuzhiyun static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
731*4882a593Smuzhiyun {
732*4882a593Smuzhiyun if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
733*4882a593Smuzhiyun switch (sw->config.device_id) {
734*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
735*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
736*4882a593Smuzhiyun return true;
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun return false;
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun
tb_switch_is_alpine_ridge(const struct tb_switch * sw)742*4882a593Smuzhiyun static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
743*4882a593Smuzhiyun {
744*4882a593Smuzhiyun if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
745*4882a593Smuzhiyun switch (sw->config.device_id) {
746*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
747*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
748*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
749*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
750*4882a593Smuzhiyun return true;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun return false;
754*4882a593Smuzhiyun }
755*4882a593Smuzhiyun
tb_switch_is_titan_ridge(const struct tb_switch * sw)756*4882a593Smuzhiyun static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
757*4882a593Smuzhiyun {
758*4882a593Smuzhiyun if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
759*4882a593Smuzhiyun switch (sw->config.device_id) {
760*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
761*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
762*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
763*4882a593Smuzhiyun return true;
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun return false;
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun
tb_switch_is_ice_lake(const struct tb_switch * sw)769*4882a593Smuzhiyun static inline bool tb_switch_is_ice_lake(const struct tb_switch *sw)
770*4882a593Smuzhiyun {
771*4882a593Smuzhiyun if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
772*4882a593Smuzhiyun switch (sw->config.device_id) {
773*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_ICL_NHI0:
774*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_ICL_NHI1:
775*4882a593Smuzhiyun return true;
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun }
778*4882a593Smuzhiyun return false;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
tb_switch_is_tiger_lake(const struct tb_switch * sw)781*4882a593Smuzhiyun static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
784*4882a593Smuzhiyun switch (sw->config.device_id) {
785*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_TGL_NHI0:
786*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_TGL_NHI1:
787*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_TGL_H_NHI0:
788*4882a593Smuzhiyun case PCI_DEVICE_ID_INTEL_TGL_H_NHI1:
789*4882a593Smuzhiyun return true;
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun return false;
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun /**
796*4882a593Smuzhiyun * tb_switch_is_usb4() - Is the switch USB4 compliant
797*4882a593Smuzhiyun * @sw: Switch to check
798*4882a593Smuzhiyun *
799*4882a593Smuzhiyun * Returns true if the @sw is USB4 compliant router, false otherwise.
800*4882a593Smuzhiyun */
tb_switch_is_usb4(const struct tb_switch * sw)801*4882a593Smuzhiyun static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
802*4882a593Smuzhiyun {
803*4882a593Smuzhiyun return sw->config.thunderbolt_version == USB4_VERSION_1_0;
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun /**
807*4882a593Smuzhiyun * tb_switch_is_icm() - Is the switch handled by ICM firmware
808*4882a593Smuzhiyun * @sw: Switch to check
809*4882a593Smuzhiyun *
810*4882a593Smuzhiyun * In case there is a need to differentiate whether ICM firmware or SW CM
811*4882a593Smuzhiyun * is handling @sw this function can be called. It is valid to call this
812*4882a593Smuzhiyun * after tb_switch_alloc() and tb_switch_configure() has been called
813*4882a593Smuzhiyun * (latter only for SW CM case).
814*4882a593Smuzhiyun */
tb_switch_is_icm(const struct tb_switch * sw)815*4882a593Smuzhiyun static inline bool tb_switch_is_icm(const struct tb_switch *sw)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun return !sw->config.enabled;
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun int tb_switch_lane_bonding_enable(struct tb_switch *sw);
821*4882a593Smuzhiyun void tb_switch_lane_bonding_disable(struct tb_switch *sw);
822*4882a593Smuzhiyun int tb_switch_configure_link(struct tb_switch *sw);
823*4882a593Smuzhiyun void tb_switch_unconfigure_link(struct tb_switch *sw);
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
826*4882a593Smuzhiyun int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
827*4882a593Smuzhiyun void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun int tb_switch_tmu_init(struct tb_switch *sw);
830*4882a593Smuzhiyun int tb_switch_tmu_post_time(struct tb_switch *sw);
831*4882a593Smuzhiyun int tb_switch_tmu_disable(struct tb_switch *sw);
832*4882a593Smuzhiyun int tb_switch_tmu_enable(struct tb_switch *sw);
833*4882a593Smuzhiyun
tb_switch_tmu_is_enabled(const struct tb_switch * sw)834*4882a593Smuzhiyun static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw)
835*4882a593Smuzhiyun {
836*4882a593Smuzhiyun return sw->tmu.rate == TB_SWITCH_TMU_RATE_HIFI &&
837*4882a593Smuzhiyun !sw->tmu.unidirectional;
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
841*4882a593Smuzhiyun int tb_port_add_nfc_credits(struct tb_port *port, int credits);
842*4882a593Smuzhiyun int tb_port_set_initial_credits(struct tb_port *port, u32 credits);
843*4882a593Smuzhiyun int tb_port_clear_counter(struct tb_port *port, int counter);
844*4882a593Smuzhiyun int tb_port_unlock(struct tb_port *port);
845*4882a593Smuzhiyun int tb_port_enable(struct tb_port *port);
846*4882a593Smuzhiyun int tb_port_disable(struct tb_port *port);
847*4882a593Smuzhiyun int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
848*4882a593Smuzhiyun void tb_port_release_in_hopid(struct tb_port *port, int hopid);
849*4882a593Smuzhiyun int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
850*4882a593Smuzhiyun void tb_port_release_out_hopid(struct tb_port *port, int hopid);
851*4882a593Smuzhiyun struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
852*4882a593Smuzhiyun struct tb_port *prev);
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun /**
855*4882a593Smuzhiyun * tb_for_each_port_on_path() - Iterate over each port on path
856*4882a593Smuzhiyun * @src: Source port
857*4882a593Smuzhiyun * @dst: Destination port
858*4882a593Smuzhiyun * @p: Port used as iterator
859*4882a593Smuzhiyun *
860*4882a593Smuzhiyun * Walks over each port on path from @src to @dst.
861*4882a593Smuzhiyun */
862*4882a593Smuzhiyun #define tb_for_each_port_on_path(src, dst, p) \
863*4882a593Smuzhiyun for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
864*4882a593Smuzhiyun (p) = tb_next_port_on_path((src), (dst), (p)))
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun int tb_port_get_link_speed(struct tb_port *port);
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
869*4882a593Smuzhiyun int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
870*4882a593Smuzhiyun int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
871*4882a593Smuzhiyun int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
872*4882a593Smuzhiyun int tb_port_next_cap(struct tb_port *port, unsigned int offset);
873*4882a593Smuzhiyun bool tb_port_is_enabled(struct tb_port *port);
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun bool tb_usb3_port_is_enabled(struct tb_port *port);
876*4882a593Smuzhiyun int tb_usb3_port_enable(struct tb_port *port, bool enable);
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun bool tb_pci_port_is_enabled(struct tb_port *port);
879*4882a593Smuzhiyun int tb_pci_port_enable(struct tb_port *port, bool enable);
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun int tb_dp_port_hpd_is_active(struct tb_port *port);
882*4882a593Smuzhiyun int tb_dp_port_hpd_clear(struct tb_port *port);
883*4882a593Smuzhiyun int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
884*4882a593Smuzhiyun unsigned int aux_tx, unsigned int aux_rx);
885*4882a593Smuzhiyun bool tb_dp_port_is_enabled(struct tb_port *port);
886*4882a593Smuzhiyun int tb_dp_port_enable(struct tb_port *port, bool enable);
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
889*4882a593Smuzhiyun struct tb_port *dst, int dst_hopid,
890*4882a593Smuzhiyun struct tb_port **last, const char *name);
891*4882a593Smuzhiyun struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
892*4882a593Smuzhiyun struct tb_port *dst, int dst_hopid, int link_nr,
893*4882a593Smuzhiyun const char *name);
894*4882a593Smuzhiyun void tb_path_free(struct tb_path *path);
895*4882a593Smuzhiyun int tb_path_activate(struct tb_path *path);
896*4882a593Smuzhiyun void tb_path_deactivate(struct tb_path *path);
897*4882a593Smuzhiyun bool tb_path_is_invalid(struct tb_path *path);
898*4882a593Smuzhiyun bool tb_path_port_on_path(const struct tb_path *path,
899*4882a593Smuzhiyun const struct tb_port *port);
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun int tb_drom_read(struct tb_switch *sw);
902*4882a593Smuzhiyun int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
905*4882a593Smuzhiyun int tb_lc_configure_port(struct tb_port *port);
906*4882a593Smuzhiyun void tb_lc_unconfigure_port(struct tb_port *port);
907*4882a593Smuzhiyun int tb_lc_configure_xdomain(struct tb_port *port);
908*4882a593Smuzhiyun void tb_lc_unconfigure_xdomain(struct tb_port *port);
909*4882a593Smuzhiyun int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
910*4882a593Smuzhiyun int tb_lc_set_sleep(struct tb_switch *sw);
911*4882a593Smuzhiyun bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
912*4882a593Smuzhiyun bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
913*4882a593Smuzhiyun int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
914*4882a593Smuzhiyun int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
915*4882a593Smuzhiyun int tb_lc_force_power(struct tb_switch *sw);
916*4882a593Smuzhiyun
tb_route_length(u64 route)917*4882a593Smuzhiyun static inline int tb_route_length(u64 route)
918*4882a593Smuzhiyun {
919*4882a593Smuzhiyun return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun /**
923*4882a593Smuzhiyun * tb_downstream_route() - get route to downstream switch
924*4882a593Smuzhiyun *
925*4882a593Smuzhiyun * Port must not be the upstream port (otherwise a loop is created).
926*4882a593Smuzhiyun *
927*4882a593Smuzhiyun * Return: Returns a route to the switch behind @port.
928*4882a593Smuzhiyun */
tb_downstream_route(struct tb_port * port)929*4882a593Smuzhiyun static inline u64 tb_downstream_route(struct tb_port *port)
930*4882a593Smuzhiyun {
931*4882a593Smuzhiyun return tb_route(port->sw)
932*4882a593Smuzhiyun | ((u64) port->port << (port->sw->config.depth * 8));
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
936*4882a593Smuzhiyun const void *buf, size_t size);
937*4882a593Smuzhiyun struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
938*4882a593Smuzhiyun u64 route, const uuid_t *local_uuid,
939*4882a593Smuzhiyun const uuid_t *remote_uuid);
940*4882a593Smuzhiyun void tb_xdomain_add(struct tb_xdomain *xd);
941*4882a593Smuzhiyun void tb_xdomain_remove(struct tb_xdomain *xd);
942*4882a593Smuzhiyun struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
943*4882a593Smuzhiyun u8 depth);
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun int tb_retimer_scan(struct tb_port *port);
946*4882a593Smuzhiyun void tb_retimer_remove_all(struct tb_port *port);
947*4882a593Smuzhiyun
tb_is_retimer(const struct device * dev)948*4882a593Smuzhiyun static inline bool tb_is_retimer(const struct device *dev)
949*4882a593Smuzhiyun {
950*4882a593Smuzhiyun return dev->type == &tb_retimer_type;
951*4882a593Smuzhiyun }
952*4882a593Smuzhiyun
tb_to_retimer(struct device * dev)953*4882a593Smuzhiyun static inline struct tb_retimer *tb_to_retimer(struct device *dev)
954*4882a593Smuzhiyun {
955*4882a593Smuzhiyun if (tb_is_retimer(dev))
956*4882a593Smuzhiyun return container_of(dev, struct tb_retimer, dev);
957*4882a593Smuzhiyun return NULL;
958*4882a593Smuzhiyun }
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun int usb4_switch_setup(struct tb_switch *sw);
961*4882a593Smuzhiyun int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
962*4882a593Smuzhiyun int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
963*4882a593Smuzhiyun size_t size);
964*4882a593Smuzhiyun bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
965*4882a593Smuzhiyun int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
966*4882a593Smuzhiyun int usb4_switch_set_sleep(struct tb_switch *sw);
967*4882a593Smuzhiyun int usb4_switch_nvm_sector_size(struct tb_switch *sw);
968*4882a593Smuzhiyun int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
969*4882a593Smuzhiyun size_t size);
970*4882a593Smuzhiyun int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
971*4882a593Smuzhiyun const void *buf, size_t size);
972*4882a593Smuzhiyun int usb4_switch_nvm_authenticate(struct tb_switch *sw);
973*4882a593Smuzhiyun bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
974*4882a593Smuzhiyun int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
975*4882a593Smuzhiyun int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
976*4882a593Smuzhiyun struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
977*4882a593Smuzhiyun const struct tb_port *port);
978*4882a593Smuzhiyun struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
979*4882a593Smuzhiyun const struct tb_port *port);
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun int usb4_port_unlock(struct tb_port *port);
982*4882a593Smuzhiyun int usb4_port_hotplug_enable(struct tb_port *port);
983*4882a593Smuzhiyun int usb4_port_configure(struct tb_port *port);
984*4882a593Smuzhiyun void usb4_port_unconfigure(struct tb_port *port);
985*4882a593Smuzhiyun int usb4_port_configure_xdomain(struct tb_port *port);
986*4882a593Smuzhiyun void usb4_port_unconfigure_xdomain(struct tb_port *port);
987*4882a593Smuzhiyun int usb4_port_enumerate_retimers(struct tb_port *port);
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
990*4882a593Smuzhiyun u8 size);
991*4882a593Smuzhiyun int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
992*4882a593Smuzhiyun const void *buf, u8 size);
993*4882a593Smuzhiyun int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
994*4882a593Smuzhiyun int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
995*4882a593Smuzhiyun int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
996*4882a593Smuzhiyun unsigned int address, const void *buf,
997*4882a593Smuzhiyun size_t size);
998*4882a593Smuzhiyun int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
999*4882a593Smuzhiyun int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1000*4882a593Smuzhiyun u32 *status);
1001*4882a593Smuzhiyun int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1002*4882a593Smuzhiyun unsigned int address, void *buf, size_t size);
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun int usb4_usb3_port_max_link_rate(struct tb_port *port);
1005*4882a593Smuzhiyun int usb4_usb3_port_actual_link_rate(struct tb_port *port);
1006*4882a593Smuzhiyun int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1007*4882a593Smuzhiyun int *downstream_bw);
1008*4882a593Smuzhiyun int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1009*4882a593Smuzhiyun int *downstream_bw);
1010*4882a593Smuzhiyun int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1011*4882a593Smuzhiyun int *downstream_bw);
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun /* Keep link controller awake during update */
1014*4882a593Smuzhiyun #define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun void tb_check_quirks(struct tb_switch *sw);
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun #ifdef CONFIG_ACPI
1019*4882a593Smuzhiyun void tb_acpi_add_links(struct tb_nhi *nhi);
1020*4882a593Smuzhiyun #else
tb_acpi_add_links(struct tb_nhi * nhi)1021*4882a593Smuzhiyun static inline void tb_acpi_add_links(struct tb_nhi *nhi) { }
1022*4882a593Smuzhiyun #endif
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
1025*4882a593Smuzhiyun void tb_debugfs_init(void);
1026*4882a593Smuzhiyun void tb_debugfs_exit(void);
1027*4882a593Smuzhiyun void tb_switch_debugfs_init(struct tb_switch *sw);
1028*4882a593Smuzhiyun void tb_switch_debugfs_remove(struct tb_switch *sw);
1029*4882a593Smuzhiyun #else
tb_debugfs_init(void)1030*4882a593Smuzhiyun static inline void tb_debugfs_init(void) { }
tb_debugfs_exit(void)1031*4882a593Smuzhiyun static inline void tb_debugfs_exit(void) { }
tb_switch_debugfs_init(struct tb_switch * sw)1032*4882a593Smuzhiyun static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
tb_switch_debugfs_remove(struct tb_switch * sw)1033*4882a593Smuzhiyun static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
1034*4882a593Smuzhiyun #endif
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun #ifdef CONFIG_USB4_KUNIT_TEST
1037*4882a593Smuzhiyun int tb_test_init(void);
1038*4882a593Smuzhiyun void tb_test_exit(void);
1039*4882a593Smuzhiyun #else
tb_test_init(void)1040*4882a593Smuzhiyun static inline int tb_test_init(void) { return 0; }
tb_test_exit(void)1041*4882a593Smuzhiyun static inline void tb_test_exit(void) { }
1042*4882a593Smuzhiyun #endif
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun #endif
1045