1*4882a593SmuzhiyunTexas Instruments DMA Crossbar (DMA request router) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar 5*4882a593Smuzhiyun "ti,am335x-edma-crossbar" for AM335x and AM437x 6*4882a593Smuzhiyun- reg: Memory map for accessing module 7*4882a593Smuzhiyun- #dma-cells: Should be set to to match with the DMA controller's dma-cells 8*4882a593Smuzhiyun for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar. 9*4882a593Smuzhiyun- dma-requests: Number of DMA requests the crossbar can receive 10*4882a593Smuzhiyun- dma-masters: phandle pointing to the DMA controller 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunThe DMA controller node need to have the following poroperties: 13*4882a593Smuzhiyun- dma-requests: Number of DMA requests the controller can handle 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunOptional properties: 16*4882a593Smuzhiyun- ti,dma-safe-map: Safe routing value for unused request lines 17*4882a593Smuzhiyun- ti,reserved-dma-request-ranges: DMA request ranges which should not be used 18*4882a593Smuzhiyun when mapping xbar input to DMA request, they are either 19*4882a593Smuzhiyun allocated to be used by for example the DSP or they are used as 20*4882a593Smuzhiyun memcpy channels in eDMA. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunNotes: 23*4882a593SmuzhiyunWhen requesting channel via ti,dra7-dma-crossbar, the DMA clinet must request 24*4882a593Smuzhiyunthe DMA event number as crossbar ID (input to the DMA crossbar). 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunFor ti,am335x-edma-crossbar: the meaning of parameters of dmas for clients: 27*4882a593Smuzhiyundmas = <&edma_xbar 12 0 1>; where <12> is the DMA request number, <0> is the TC 28*4882a593Smuzhiyunthe event should be assigned and <1> is the mux selection for in the crossbar. 29*4882a593SmuzhiyunWhen mux 0 is used the DMA channel can be requested directly from edma node. 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunExample: 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun/* DMA controller */ 34*4882a593Smuzhiyunsdma: dma-controller@4a056000 { 35*4882a593Smuzhiyun compatible = "ti,omap4430-sdma"; 36*4882a593Smuzhiyun reg = <0x4a056000 0x1000>; 37*4882a593Smuzhiyun interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 38*4882a593Smuzhiyun <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 39*4882a593Smuzhiyun <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 40*4882a593Smuzhiyun <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 41*4882a593Smuzhiyun #dma-cells = <1>; 42*4882a593Smuzhiyun dma-channels = <32>; 43*4882a593Smuzhiyun dma-requests = <127>; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun/* DMA crossbar */ 47*4882a593Smuzhiyunsdma_xbar: dma-router@4a002b78 { 48*4882a593Smuzhiyun compatible = "ti,dra7-dma-crossbar"; 49*4882a593Smuzhiyun reg = <0x4a002b78 0xfc>; 50*4882a593Smuzhiyun #dma-cells = <1>; 51*4882a593Smuzhiyun dma-requests = <205>; 52*4882a593Smuzhiyun ti,dma-safe-map = <0>; 53*4882a593Smuzhiyun /* Protect the sDMA request ranges: 10-14 and 100-126 */ 54*4882a593Smuzhiyun ti,reserved-dma-request-ranges = <10 5>, <100 27>; 55*4882a593Smuzhiyun dma-masters = <&sdma>; 56*4882a593Smuzhiyun}; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun/* DMA client */ 59*4882a593Smuzhiyunuart1: serial@4806a000 { 60*4882a593Smuzhiyun compatible = "ti,omap4-uart"; 61*4882a593Smuzhiyun reg = <0x4806a000 0x100>; 62*4882a593Smuzhiyun interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 63*4882a593Smuzhiyun ti,hwmods = "uart1"; 64*4882a593Smuzhiyun clock-frequency = <48000000>; 65*4882a593Smuzhiyun /* Requesting crossbar input 49 and 50 */ 66*4882a593Smuzhiyun dmas = <&sdma_xbar 49>, <&sdma_xbar 50>; 67*4882a593Smuzhiyun dma-names = "tx", "rx"; 68*4882a593Smuzhiyun}; 69