xref: /OK3568_Linux_fs/kernel/drivers/dma/dmaengine.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun /*
7*4882a593Smuzhiyun  * This code implements the DMA subsystem. It provides a HW-neutral interface
8*4882a593Smuzhiyun  * for other kernel code to use asynchronous memory copy capabilities,
9*4882a593Smuzhiyun  * if present, and allows different HW DMA drivers to register as providing
10*4882a593Smuzhiyun  * this capability.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Due to the fact we are accelerating what is already a relatively fast
13*4882a593Smuzhiyun  * operation, the code goes to great lengths to avoid additional overhead,
14*4882a593Smuzhiyun  * such as locking.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * LOCKING:
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * The subsystem keeps a global list of dma_device structs it is protected by a
19*4882a593Smuzhiyun  * mutex, dma_list_mutex.
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  * A subsystem can get access to a channel by calling dmaengine_get() followed
22*4882a593Smuzhiyun  * by dma_find_channel(), or if it has need for an exclusive channel it can call
23*4882a593Smuzhiyun  * dma_request_channel().  Once a channel is allocated a reference is taken
24*4882a593Smuzhiyun  * against its corresponding driver to disable removal.
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  * Each device has a channels list, which runs unlocked but is never modified
27*4882a593Smuzhiyun  * once the device is registered, it's just setup by the driver.
28*4882a593Smuzhiyun  *
29*4882a593Smuzhiyun  * See Documentation/driver-api/dmaengine for more details
30*4882a593Smuzhiyun  */
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #include <linux/platform_device.h>
35*4882a593Smuzhiyun #include <linux/dma-mapping.h>
36*4882a593Smuzhiyun #include <linux/init.h>
37*4882a593Smuzhiyun #include <linux/module.h>
38*4882a593Smuzhiyun #include <linux/mm.h>
39*4882a593Smuzhiyun #include <linux/device.h>
40*4882a593Smuzhiyun #include <linux/dmaengine.h>
41*4882a593Smuzhiyun #include <linux/hardirq.h>
42*4882a593Smuzhiyun #include <linux/spinlock.h>
43*4882a593Smuzhiyun #include <linux/percpu.h>
44*4882a593Smuzhiyun #include <linux/rcupdate.h>
45*4882a593Smuzhiyun #include <linux/mutex.h>
46*4882a593Smuzhiyun #include <linux/jiffies.h>
47*4882a593Smuzhiyun #include <linux/rculist.h>
48*4882a593Smuzhiyun #include <linux/idr.h>
49*4882a593Smuzhiyun #include <linux/slab.h>
50*4882a593Smuzhiyun #include <linux/acpi.h>
51*4882a593Smuzhiyun #include <linux/acpi_dma.h>
52*4882a593Smuzhiyun #include <linux/of_dma.h>
53*4882a593Smuzhiyun #include <linux/mempool.h>
54*4882a593Smuzhiyun #include <linux/numa.h>
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #include "dmaengine.h"
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun static DEFINE_MUTEX(dma_list_mutex);
59*4882a593Smuzhiyun static DEFINE_IDA(dma_ida);
60*4882a593Smuzhiyun static LIST_HEAD(dma_device_list);
61*4882a593Smuzhiyun static long dmaengine_ref_count;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /* --- debugfs implementation --- */
64*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
65*4882a593Smuzhiyun #include <linux/debugfs.h>
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static struct dentry *rootdir;
68*4882a593Smuzhiyun 
dmaengine_debug_register(struct dma_device * dma_dev)69*4882a593Smuzhiyun static void dmaengine_debug_register(struct dma_device *dma_dev)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	dma_dev->dbg_dev_root = debugfs_create_dir(dev_name(dma_dev->dev),
72*4882a593Smuzhiyun 						   rootdir);
73*4882a593Smuzhiyun 	if (IS_ERR(dma_dev->dbg_dev_root))
74*4882a593Smuzhiyun 		dma_dev->dbg_dev_root = NULL;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
dmaengine_debug_unregister(struct dma_device * dma_dev)77*4882a593Smuzhiyun static void dmaengine_debug_unregister(struct dma_device *dma_dev)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	debugfs_remove_recursive(dma_dev->dbg_dev_root);
80*4882a593Smuzhiyun 	dma_dev->dbg_dev_root = NULL;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
dmaengine_dbg_summary_show(struct seq_file * s,struct dma_device * dma_dev)83*4882a593Smuzhiyun static void dmaengine_dbg_summary_show(struct seq_file *s,
84*4882a593Smuzhiyun 				       struct dma_device *dma_dev)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	struct dma_chan *chan;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	list_for_each_entry(chan, &dma_dev->channels, device_node) {
89*4882a593Smuzhiyun 		if (chan->client_count) {
90*4882a593Smuzhiyun 			seq_printf(s, " %-13s| %s", dma_chan_name(chan),
91*4882a593Smuzhiyun 				   chan->dbg_client_name ?: "in-use");
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 			if (chan->router)
94*4882a593Smuzhiyun 				seq_printf(s, " (via router: %s)\n",
95*4882a593Smuzhiyun 					dev_name(chan->router->dev));
96*4882a593Smuzhiyun 			else
97*4882a593Smuzhiyun 				seq_puts(s, "\n");
98*4882a593Smuzhiyun 		}
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
dmaengine_summary_show(struct seq_file * s,void * data)102*4882a593Smuzhiyun static int dmaengine_summary_show(struct seq_file *s, void *data)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	struct dma_device *dma_dev = NULL;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
107*4882a593Smuzhiyun 	list_for_each_entry(dma_dev, &dma_device_list, global_node) {
108*4882a593Smuzhiyun 		seq_printf(s, "dma%d (%s): number of channels: %u\n",
109*4882a593Smuzhiyun 			   dma_dev->dev_id, dev_name(dma_dev->dev),
110*4882a593Smuzhiyun 			   dma_dev->chancnt);
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 		if (dma_dev->dbg_summary_show)
113*4882a593Smuzhiyun 			dma_dev->dbg_summary_show(s, dma_dev);
114*4882a593Smuzhiyun 		else
115*4882a593Smuzhiyun 			dmaengine_dbg_summary_show(s, dma_dev);
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 		if (!list_is_last(&dma_dev->global_node, &dma_device_list))
118*4882a593Smuzhiyun 			seq_puts(s, "\n");
119*4882a593Smuzhiyun 	}
120*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	return 0;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(dmaengine_summary);
125*4882a593Smuzhiyun 
dmaengine_debugfs_init(void)126*4882a593Smuzhiyun static void __init dmaengine_debugfs_init(void)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	rootdir = debugfs_create_dir("dmaengine", NULL);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	/* /sys/kernel/debug/dmaengine/summary */
131*4882a593Smuzhiyun 	debugfs_create_file("summary", 0444, rootdir, NULL,
132*4882a593Smuzhiyun 			    &dmaengine_summary_fops);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun #else
dmaengine_debugfs_init(void)135*4882a593Smuzhiyun static inline void dmaengine_debugfs_init(void) { }
dmaengine_debug_register(struct dma_device * dma_dev)136*4882a593Smuzhiyun static inline int dmaengine_debug_register(struct dma_device *dma_dev)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	return 0;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
dmaengine_debug_unregister(struct dma_device * dma_dev)141*4882a593Smuzhiyun static inline void dmaengine_debug_unregister(struct dma_device *dma_dev) { }
142*4882a593Smuzhiyun #endif	/* DEBUG_FS */
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun /* --- sysfs implementation --- */
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun #define DMA_SLAVE_NAME	"slave"
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun /**
149*4882a593Smuzhiyun  * dev_to_dma_chan - convert a device pointer to its sysfs container object
150*4882a593Smuzhiyun  * @dev:	device node
151*4882a593Smuzhiyun  *
152*4882a593Smuzhiyun  * Must be called under dma_list_mutex.
153*4882a593Smuzhiyun  */
dev_to_dma_chan(struct device * dev)154*4882a593Smuzhiyun static struct dma_chan *dev_to_dma_chan(struct device *dev)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	struct dma_chan_dev *chan_dev;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	chan_dev = container_of(dev, typeof(*chan_dev), device);
159*4882a593Smuzhiyun 	return chan_dev->chan;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
memcpy_count_show(struct device * dev,struct device_attribute * attr,char * buf)162*4882a593Smuzhiyun static ssize_t memcpy_count_show(struct device *dev,
163*4882a593Smuzhiyun 				 struct device_attribute *attr, char *buf)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun 	struct dma_chan *chan;
166*4882a593Smuzhiyun 	unsigned long count = 0;
167*4882a593Smuzhiyun 	int i;
168*4882a593Smuzhiyun 	int err;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
171*4882a593Smuzhiyun 	chan = dev_to_dma_chan(dev);
172*4882a593Smuzhiyun 	if (chan) {
173*4882a593Smuzhiyun 		for_each_possible_cpu(i)
174*4882a593Smuzhiyun 			count += per_cpu_ptr(chan->local, i)->memcpy_count;
175*4882a593Smuzhiyun 		err = sprintf(buf, "%lu\n", count);
176*4882a593Smuzhiyun 	} else
177*4882a593Smuzhiyun 		err = -ENODEV;
178*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	return err;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun static DEVICE_ATTR_RO(memcpy_count);
183*4882a593Smuzhiyun 
bytes_transferred_show(struct device * dev,struct device_attribute * attr,char * buf)184*4882a593Smuzhiyun static ssize_t bytes_transferred_show(struct device *dev,
185*4882a593Smuzhiyun 				      struct device_attribute *attr, char *buf)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	struct dma_chan *chan;
188*4882a593Smuzhiyun 	unsigned long count = 0;
189*4882a593Smuzhiyun 	int i;
190*4882a593Smuzhiyun 	int err;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
193*4882a593Smuzhiyun 	chan = dev_to_dma_chan(dev);
194*4882a593Smuzhiyun 	if (chan) {
195*4882a593Smuzhiyun 		for_each_possible_cpu(i)
196*4882a593Smuzhiyun 			count += per_cpu_ptr(chan->local, i)->bytes_transferred;
197*4882a593Smuzhiyun 		err = sprintf(buf, "%lu\n", count);
198*4882a593Smuzhiyun 	} else
199*4882a593Smuzhiyun 		err = -ENODEV;
200*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	return err;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun static DEVICE_ATTR_RO(bytes_transferred);
205*4882a593Smuzhiyun 
in_use_show(struct device * dev,struct device_attribute * attr,char * buf)206*4882a593Smuzhiyun static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
207*4882a593Smuzhiyun 			   char *buf)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	struct dma_chan *chan;
210*4882a593Smuzhiyun 	int err;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
213*4882a593Smuzhiyun 	chan = dev_to_dma_chan(dev);
214*4882a593Smuzhiyun 	if (chan)
215*4882a593Smuzhiyun 		err = sprintf(buf, "%d\n", chan->client_count);
216*4882a593Smuzhiyun 	else
217*4882a593Smuzhiyun 		err = -ENODEV;
218*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	return err;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun static DEVICE_ATTR_RO(in_use);
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun static struct attribute *dma_dev_attrs[] = {
225*4882a593Smuzhiyun 	&dev_attr_memcpy_count.attr,
226*4882a593Smuzhiyun 	&dev_attr_bytes_transferred.attr,
227*4882a593Smuzhiyun 	&dev_attr_in_use.attr,
228*4882a593Smuzhiyun 	NULL,
229*4882a593Smuzhiyun };
230*4882a593Smuzhiyun ATTRIBUTE_GROUPS(dma_dev);
231*4882a593Smuzhiyun 
chan_dev_release(struct device * dev)232*4882a593Smuzhiyun static void chan_dev_release(struct device *dev)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun 	struct dma_chan_dev *chan_dev;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	chan_dev = container_of(dev, typeof(*chan_dev), device);
237*4882a593Smuzhiyun 	kfree(chan_dev);
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun static struct class dma_devclass = {
241*4882a593Smuzhiyun 	.name		= "dma",
242*4882a593Smuzhiyun 	.dev_groups	= dma_dev_groups,
243*4882a593Smuzhiyun 	.dev_release	= chan_dev_release,
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun /* --- client and device registration --- */
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun /* enable iteration over all operation types */
249*4882a593Smuzhiyun static dma_cap_mask_t dma_cap_mask_all;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun /**
252*4882a593Smuzhiyun  * struct dma_chan_tbl_ent - tracks channel allocations per core/operation
253*4882a593Smuzhiyun  * @chan:	associated channel for this entry
254*4882a593Smuzhiyun  */
255*4882a593Smuzhiyun struct dma_chan_tbl_ent {
256*4882a593Smuzhiyun 	struct dma_chan *chan;
257*4882a593Smuzhiyun };
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun /* percpu lookup table for memory-to-memory offload providers */
260*4882a593Smuzhiyun static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
261*4882a593Smuzhiyun 
dma_channel_table_init(void)262*4882a593Smuzhiyun static int __init dma_channel_table_init(void)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	enum dma_transaction_type cap;
265*4882a593Smuzhiyun 	int err = 0;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/* 'interrupt', 'private', and 'slave' are channel capabilities,
270*4882a593Smuzhiyun 	 * but are not associated with an operation so they do not need
271*4882a593Smuzhiyun 	 * an entry in the channel_table
272*4882a593Smuzhiyun 	 */
273*4882a593Smuzhiyun 	clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
274*4882a593Smuzhiyun 	clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
275*4882a593Smuzhiyun 	clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	for_each_dma_cap_mask(cap, dma_cap_mask_all) {
278*4882a593Smuzhiyun 		channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
279*4882a593Smuzhiyun 		if (!channel_table[cap]) {
280*4882a593Smuzhiyun 			err = -ENOMEM;
281*4882a593Smuzhiyun 			break;
282*4882a593Smuzhiyun 		}
283*4882a593Smuzhiyun 	}
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	if (err) {
286*4882a593Smuzhiyun 		pr_err("dmaengine dma_channel_table_init failure: %d\n", err);
287*4882a593Smuzhiyun 		for_each_dma_cap_mask(cap, dma_cap_mask_all)
288*4882a593Smuzhiyun 			free_percpu(channel_table[cap]);
289*4882a593Smuzhiyun 	}
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	return err;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun arch_initcall(dma_channel_table_init);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun /**
296*4882a593Smuzhiyun  * dma_chan_is_local - checks if the channel is in the same NUMA-node as the CPU
297*4882a593Smuzhiyun  * @chan:	DMA channel to test
298*4882a593Smuzhiyun  * @cpu:	CPU index which the channel should be close to
299*4882a593Smuzhiyun  *
300*4882a593Smuzhiyun  * Returns true if the channel is in the same NUMA-node as the CPU.
301*4882a593Smuzhiyun  */
dma_chan_is_local(struct dma_chan * chan,int cpu)302*4882a593Smuzhiyun static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun 	int node = dev_to_node(chan->device->dev);
305*4882a593Smuzhiyun 	return node == NUMA_NO_NODE ||
306*4882a593Smuzhiyun 		cpumask_test_cpu(cpu, cpumask_of_node(node));
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun /**
310*4882a593Smuzhiyun  * min_chan - finds the channel with min count and in the same NUMA-node as the CPU
311*4882a593Smuzhiyun  * @cap:	capability to match
312*4882a593Smuzhiyun  * @cpu:	CPU index which the channel should be close to
313*4882a593Smuzhiyun  *
314*4882a593Smuzhiyun  * If some channels are close to the given CPU, the one with the lowest
315*4882a593Smuzhiyun  * reference count is returned. Otherwise, CPU is ignored and only the
316*4882a593Smuzhiyun  * reference count is taken into account.
317*4882a593Smuzhiyun  *
318*4882a593Smuzhiyun  * Must be called under dma_list_mutex.
319*4882a593Smuzhiyun  */
min_chan(enum dma_transaction_type cap,int cpu)320*4882a593Smuzhiyun static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun 	struct dma_device *device;
323*4882a593Smuzhiyun 	struct dma_chan *chan;
324*4882a593Smuzhiyun 	struct dma_chan *min = NULL;
325*4882a593Smuzhiyun 	struct dma_chan *localmin = NULL;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	list_for_each_entry(device, &dma_device_list, global_node) {
328*4882a593Smuzhiyun 		if (!dma_has_cap(cap, device->cap_mask) ||
329*4882a593Smuzhiyun 		    dma_has_cap(DMA_PRIVATE, device->cap_mask))
330*4882a593Smuzhiyun 			continue;
331*4882a593Smuzhiyun 		list_for_each_entry(chan, &device->channels, device_node) {
332*4882a593Smuzhiyun 			if (!chan->client_count)
333*4882a593Smuzhiyun 				continue;
334*4882a593Smuzhiyun 			if (!min || chan->table_count < min->table_count)
335*4882a593Smuzhiyun 				min = chan;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 			if (dma_chan_is_local(chan, cpu))
338*4882a593Smuzhiyun 				if (!localmin ||
339*4882a593Smuzhiyun 				    chan->table_count < localmin->table_count)
340*4882a593Smuzhiyun 					localmin = chan;
341*4882a593Smuzhiyun 		}
342*4882a593Smuzhiyun 	}
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	chan = localmin ? localmin : min;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	if (chan)
347*4882a593Smuzhiyun 		chan->table_count++;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	return chan;
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun /**
353*4882a593Smuzhiyun  * dma_channel_rebalance - redistribute the available channels
354*4882a593Smuzhiyun  *
355*4882a593Smuzhiyun  * Optimize for CPU isolation (each CPU gets a dedicated channel for an
356*4882a593Smuzhiyun  * operation type) in the SMP case, and operation isolation (avoid
357*4882a593Smuzhiyun  * multi-tasking channels) in the non-SMP case.
358*4882a593Smuzhiyun  *
359*4882a593Smuzhiyun  * Must be called under dma_list_mutex.
360*4882a593Smuzhiyun  */
dma_channel_rebalance(void)361*4882a593Smuzhiyun static void dma_channel_rebalance(void)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun 	struct dma_chan *chan;
364*4882a593Smuzhiyun 	struct dma_device *device;
365*4882a593Smuzhiyun 	int cpu;
366*4882a593Smuzhiyun 	int cap;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	/* undo the last distribution */
369*4882a593Smuzhiyun 	for_each_dma_cap_mask(cap, dma_cap_mask_all)
370*4882a593Smuzhiyun 		for_each_possible_cpu(cpu)
371*4882a593Smuzhiyun 			per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	list_for_each_entry(device, &dma_device_list, global_node) {
374*4882a593Smuzhiyun 		if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
375*4882a593Smuzhiyun 			continue;
376*4882a593Smuzhiyun 		list_for_each_entry(chan, &device->channels, device_node)
377*4882a593Smuzhiyun 			chan->table_count = 0;
378*4882a593Smuzhiyun 	}
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	/* don't populate the channel_table if no clients are available */
381*4882a593Smuzhiyun 	if (!dmaengine_ref_count)
382*4882a593Smuzhiyun 		return;
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	/* redistribute available channels */
385*4882a593Smuzhiyun 	for_each_dma_cap_mask(cap, dma_cap_mask_all)
386*4882a593Smuzhiyun 		for_each_online_cpu(cpu) {
387*4882a593Smuzhiyun 			chan = min_chan(cap, cpu);
388*4882a593Smuzhiyun 			per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
389*4882a593Smuzhiyun 		}
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun 
dma_device_satisfies_mask(struct dma_device * device,const dma_cap_mask_t * want)392*4882a593Smuzhiyun static int dma_device_satisfies_mask(struct dma_device *device,
393*4882a593Smuzhiyun 				     const dma_cap_mask_t *want)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun 	dma_cap_mask_t has;
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	bitmap_and(has.bits, want->bits, device->cap_mask.bits,
398*4882a593Smuzhiyun 		DMA_TX_TYPE_END);
399*4882a593Smuzhiyun 	return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun 
dma_chan_to_owner(struct dma_chan * chan)402*4882a593Smuzhiyun static struct module *dma_chan_to_owner(struct dma_chan *chan)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun 	return chan->device->owner;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun /**
408*4882a593Smuzhiyun  * balance_ref_count - catch up the channel reference count
409*4882a593Smuzhiyun  * @chan:	channel to balance ->client_count versus dmaengine_ref_count
410*4882a593Smuzhiyun  *
411*4882a593Smuzhiyun  * Must be called under dma_list_mutex.
412*4882a593Smuzhiyun  */
balance_ref_count(struct dma_chan * chan)413*4882a593Smuzhiyun static void balance_ref_count(struct dma_chan *chan)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun 	struct module *owner = dma_chan_to_owner(chan);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	while (chan->client_count < dmaengine_ref_count) {
418*4882a593Smuzhiyun 		__module_get(owner);
419*4882a593Smuzhiyun 		chan->client_count++;
420*4882a593Smuzhiyun 	}
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun 
dma_device_release(struct kref * ref)423*4882a593Smuzhiyun static void dma_device_release(struct kref *ref)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun 	struct dma_device *device = container_of(ref, struct dma_device, ref);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	list_del_rcu(&device->global_node);
428*4882a593Smuzhiyun 	dma_channel_rebalance();
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	if (device->device_release)
431*4882a593Smuzhiyun 		device->device_release(device);
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun 
dma_device_put(struct dma_device * device)434*4882a593Smuzhiyun static void dma_device_put(struct dma_device *device)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun 	lockdep_assert_held(&dma_list_mutex);
437*4882a593Smuzhiyun 	kref_put(&device->ref, dma_device_release);
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun /**
441*4882a593Smuzhiyun  * dma_chan_get - try to grab a DMA channel's parent driver module
442*4882a593Smuzhiyun  * @chan:	channel to grab
443*4882a593Smuzhiyun  *
444*4882a593Smuzhiyun  * Must be called under dma_list_mutex.
445*4882a593Smuzhiyun  */
dma_chan_get(struct dma_chan * chan)446*4882a593Smuzhiyun static int dma_chan_get(struct dma_chan *chan)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	struct module *owner = dma_chan_to_owner(chan);
449*4882a593Smuzhiyun 	int ret;
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	/* The channel is already in use, update client count */
452*4882a593Smuzhiyun 	if (chan->client_count) {
453*4882a593Smuzhiyun 		__module_get(owner);
454*4882a593Smuzhiyun 		goto out;
455*4882a593Smuzhiyun 	}
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if (!try_module_get(owner))
458*4882a593Smuzhiyun 		return -ENODEV;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	ret = kref_get_unless_zero(&chan->device->ref);
461*4882a593Smuzhiyun 	if (!ret) {
462*4882a593Smuzhiyun 		ret = -ENODEV;
463*4882a593Smuzhiyun 		goto module_put_out;
464*4882a593Smuzhiyun 	}
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	/* allocate upon first client reference */
467*4882a593Smuzhiyun 	if (chan->device->device_alloc_chan_resources) {
468*4882a593Smuzhiyun 		ret = chan->device->device_alloc_chan_resources(chan);
469*4882a593Smuzhiyun 		if (ret < 0)
470*4882a593Smuzhiyun 			goto err_out;
471*4882a593Smuzhiyun 	}
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
474*4882a593Smuzhiyun 		balance_ref_count(chan);
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun out:
477*4882a593Smuzhiyun 	chan->client_count++;
478*4882a593Smuzhiyun 	return 0;
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun err_out:
481*4882a593Smuzhiyun 	dma_device_put(chan->device);
482*4882a593Smuzhiyun module_put_out:
483*4882a593Smuzhiyun 	module_put(owner);
484*4882a593Smuzhiyun 	return ret;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun /**
488*4882a593Smuzhiyun  * dma_chan_put - drop a reference to a DMA channel's parent driver module
489*4882a593Smuzhiyun  * @chan:	channel to release
490*4882a593Smuzhiyun  *
491*4882a593Smuzhiyun  * Must be called under dma_list_mutex.
492*4882a593Smuzhiyun  */
dma_chan_put(struct dma_chan * chan)493*4882a593Smuzhiyun static void dma_chan_put(struct dma_chan *chan)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun 	/* This channel is not in use, bail out */
496*4882a593Smuzhiyun 	if (!chan->client_count)
497*4882a593Smuzhiyun 		return;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	chan->client_count--;
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	/* This channel is not in use anymore, free it */
502*4882a593Smuzhiyun 	if (!chan->client_count && chan->device->device_free_chan_resources) {
503*4882a593Smuzhiyun 		/* Make sure all operations have completed */
504*4882a593Smuzhiyun 		dmaengine_synchronize(chan);
505*4882a593Smuzhiyun 		chan->device->device_free_chan_resources(chan);
506*4882a593Smuzhiyun 	}
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	/* If the channel is used via a DMA request router, free the mapping */
509*4882a593Smuzhiyun 	if (chan->router && chan->router->route_free) {
510*4882a593Smuzhiyun 		chan->router->route_free(chan->router->dev, chan->route_data);
511*4882a593Smuzhiyun 		chan->router = NULL;
512*4882a593Smuzhiyun 		chan->route_data = NULL;
513*4882a593Smuzhiyun 	}
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	dma_device_put(chan->device);
516*4882a593Smuzhiyun 	module_put(dma_chan_to_owner(chan));
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
dma_sync_wait(struct dma_chan * chan,dma_cookie_t cookie)519*4882a593Smuzhiyun enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun 	enum dma_status status;
522*4882a593Smuzhiyun 	unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	dma_async_issue_pending(chan);
525*4882a593Smuzhiyun 	do {
526*4882a593Smuzhiyun 		status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
527*4882a593Smuzhiyun 		if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
528*4882a593Smuzhiyun 			dev_err(chan->device->dev, "%s: timeout!\n", __func__);
529*4882a593Smuzhiyun 			return DMA_ERROR;
530*4882a593Smuzhiyun 		}
531*4882a593Smuzhiyun 		if (status != DMA_IN_PROGRESS)
532*4882a593Smuzhiyun 			break;
533*4882a593Smuzhiyun 		cpu_relax();
534*4882a593Smuzhiyun 	} while (1);
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	return status;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun EXPORT_SYMBOL(dma_sync_wait);
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun /**
541*4882a593Smuzhiyun  * dma_find_channel - find a channel to carry out the operation
542*4882a593Smuzhiyun  * @tx_type:	transaction type
543*4882a593Smuzhiyun  */
dma_find_channel(enum dma_transaction_type tx_type)544*4882a593Smuzhiyun struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
545*4882a593Smuzhiyun {
546*4882a593Smuzhiyun 	return this_cpu_read(channel_table[tx_type]->chan);
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun EXPORT_SYMBOL(dma_find_channel);
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun /**
551*4882a593Smuzhiyun  * dma_issue_pending_all - flush all pending operations across all channels
552*4882a593Smuzhiyun  */
dma_issue_pending_all(void)553*4882a593Smuzhiyun void dma_issue_pending_all(void)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun 	struct dma_device *device;
556*4882a593Smuzhiyun 	struct dma_chan *chan;
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 	rcu_read_lock();
559*4882a593Smuzhiyun 	list_for_each_entry_rcu(device, &dma_device_list, global_node) {
560*4882a593Smuzhiyun 		if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
561*4882a593Smuzhiyun 			continue;
562*4882a593Smuzhiyun 		list_for_each_entry(chan, &device->channels, device_node)
563*4882a593Smuzhiyun 			if (chan->client_count)
564*4882a593Smuzhiyun 				device->device_issue_pending(chan);
565*4882a593Smuzhiyun 	}
566*4882a593Smuzhiyun 	rcu_read_unlock();
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun EXPORT_SYMBOL(dma_issue_pending_all);
569*4882a593Smuzhiyun 
dma_get_slave_caps(struct dma_chan * chan,struct dma_slave_caps * caps)570*4882a593Smuzhiyun int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun 	struct dma_device *device;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	if (!chan || !caps)
575*4882a593Smuzhiyun 		return -EINVAL;
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	device = chan->device;
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 	/* check if the channel supports slave transactions */
580*4882a593Smuzhiyun 	if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) ||
581*4882a593Smuzhiyun 	      test_bit(DMA_CYCLIC, device->cap_mask.bits)))
582*4882a593Smuzhiyun 		return -ENXIO;
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	/*
585*4882a593Smuzhiyun 	 * Check whether it reports it uses the generic slave
586*4882a593Smuzhiyun 	 * capabilities, if not, that means it doesn't support any
587*4882a593Smuzhiyun 	 * kind of slave capabilities reporting.
588*4882a593Smuzhiyun 	 */
589*4882a593Smuzhiyun 	if (!device->directions)
590*4882a593Smuzhiyun 		return -ENXIO;
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	caps->src_addr_widths = device->src_addr_widths;
593*4882a593Smuzhiyun 	caps->dst_addr_widths = device->dst_addr_widths;
594*4882a593Smuzhiyun 	caps->directions = device->directions;
595*4882a593Smuzhiyun 	caps->min_burst = device->min_burst;
596*4882a593Smuzhiyun 	caps->max_burst = device->max_burst;
597*4882a593Smuzhiyun 	caps->max_sg_burst = device->max_sg_burst;
598*4882a593Smuzhiyun 	caps->residue_granularity = device->residue_granularity;
599*4882a593Smuzhiyun 	caps->descriptor_reuse = device->descriptor_reuse;
600*4882a593Smuzhiyun 	caps->cmd_pause = !!device->device_pause;
601*4882a593Smuzhiyun 	caps->cmd_resume = !!device->device_resume;
602*4882a593Smuzhiyun 	caps->cmd_terminate = !!device->device_terminate_all;
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	/*
605*4882a593Smuzhiyun 	 * DMA engine device might be configured with non-uniformly
606*4882a593Smuzhiyun 	 * distributed slave capabilities per device channels. In this
607*4882a593Smuzhiyun 	 * case the corresponding driver may provide the device_caps
608*4882a593Smuzhiyun 	 * callback to override the generic capabilities with
609*4882a593Smuzhiyun 	 * channel-specific ones.
610*4882a593Smuzhiyun 	 */
611*4882a593Smuzhiyun 	if (device->device_caps)
612*4882a593Smuzhiyun 		device->device_caps(chan, caps);
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	return 0;
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_get_slave_caps);
617*4882a593Smuzhiyun 
private_candidate(const dma_cap_mask_t * mask,struct dma_device * dev,dma_filter_fn fn,void * fn_param)618*4882a593Smuzhiyun static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
619*4882a593Smuzhiyun 					  struct dma_device *dev,
620*4882a593Smuzhiyun 					  dma_filter_fn fn, void *fn_param)
621*4882a593Smuzhiyun {
622*4882a593Smuzhiyun 	struct dma_chan *chan;
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	if (mask && !dma_device_satisfies_mask(dev, mask)) {
625*4882a593Smuzhiyun 		dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__);
626*4882a593Smuzhiyun 		return NULL;
627*4882a593Smuzhiyun 	}
628*4882a593Smuzhiyun 	/* devices with multiple channels need special handling as we need to
629*4882a593Smuzhiyun 	 * ensure that all channels are either private or public.
630*4882a593Smuzhiyun 	 */
631*4882a593Smuzhiyun 	if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
632*4882a593Smuzhiyun 		list_for_each_entry(chan, &dev->channels, device_node) {
633*4882a593Smuzhiyun 			/* some channels are already publicly allocated */
634*4882a593Smuzhiyun 			if (chan->client_count)
635*4882a593Smuzhiyun 				return NULL;
636*4882a593Smuzhiyun 		}
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	list_for_each_entry(chan, &dev->channels, device_node) {
639*4882a593Smuzhiyun 		if (chan->client_count) {
640*4882a593Smuzhiyun 			dev_dbg(dev->dev, "%s: %s busy\n",
641*4882a593Smuzhiyun 				 __func__, dma_chan_name(chan));
642*4882a593Smuzhiyun 			continue;
643*4882a593Smuzhiyun 		}
644*4882a593Smuzhiyun 		if (fn && !fn(chan, fn_param)) {
645*4882a593Smuzhiyun 			dev_dbg(dev->dev, "%s: %s filter said false\n",
646*4882a593Smuzhiyun 				 __func__, dma_chan_name(chan));
647*4882a593Smuzhiyun 			continue;
648*4882a593Smuzhiyun 		}
649*4882a593Smuzhiyun 		return chan;
650*4882a593Smuzhiyun 	}
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	return NULL;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun 
find_candidate(struct dma_device * device,const dma_cap_mask_t * mask,dma_filter_fn fn,void * fn_param)655*4882a593Smuzhiyun static struct dma_chan *find_candidate(struct dma_device *device,
656*4882a593Smuzhiyun 				       const dma_cap_mask_t *mask,
657*4882a593Smuzhiyun 				       dma_filter_fn fn, void *fn_param)
658*4882a593Smuzhiyun {
659*4882a593Smuzhiyun 	struct dma_chan *chan = private_candidate(mask, device, fn, fn_param);
660*4882a593Smuzhiyun 	int err;
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	if (chan) {
663*4882a593Smuzhiyun 		/* Found a suitable channel, try to grab, prep, and return it.
664*4882a593Smuzhiyun 		 * We first set DMA_PRIVATE to disable balance_ref_count as this
665*4882a593Smuzhiyun 		 * channel will not be published in the general-purpose
666*4882a593Smuzhiyun 		 * allocator
667*4882a593Smuzhiyun 		 */
668*4882a593Smuzhiyun 		dma_cap_set(DMA_PRIVATE, device->cap_mask);
669*4882a593Smuzhiyun 		device->privatecnt++;
670*4882a593Smuzhiyun 		err = dma_chan_get(chan);
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 		if (err) {
673*4882a593Smuzhiyun 			if (err == -ENODEV) {
674*4882a593Smuzhiyun 				dev_dbg(device->dev, "%s: %s module removed\n",
675*4882a593Smuzhiyun 					__func__, dma_chan_name(chan));
676*4882a593Smuzhiyun 				list_del_rcu(&device->global_node);
677*4882a593Smuzhiyun 			} else
678*4882a593Smuzhiyun 				dev_dbg(device->dev,
679*4882a593Smuzhiyun 					"%s: failed to get %s: (%d)\n",
680*4882a593Smuzhiyun 					 __func__, dma_chan_name(chan), err);
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 			if (--device->privatecnt == 0)
683*4882a593Smuzhiyun 				dma_cap_clear(DMA_PRIVATE, device->cap_mask);
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 			chan = ERR_PTR(err);
686*4882a593Smuzhiyun 		}
687*4882a593Smuzhiyun 	}
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	return chan ? chan : ERR_PTR(-EPROBE_DEFER);
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun /**
693*4882a593Smuzhiyun  * dma_get_slave_channel - try to get specific channel exclusively
694*4882a593Smuzhiyun  * @chan:	target channel
695*4882a593Smuzhiyun  */
dma_get_slave_channel(struct dma_chan * chan)696*4882a593Smuzhiyun struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
697*4882a593Smuzhiyun {
698*4882a593Smuzhiyun 	int err = -EBUSY;
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	/* lock against __dma_request_channel */
701*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
702*4882a593Smuzhiyun 
703*4882a593Smuzhiyun 	if (chan->client_count == 0) {
704*4882a593Smuzhiyun 		struct dma_device *device = chan->device;
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun 		dma_cap_set(DMA_PRIVATE, device->cap_mask);
707*4882a593Smuzhiyun 		device->privatecnt++;
708*4882a593Smuzhiyun 		err = dma_chan_get(chan);
709*4882a593Smuzhiyun 		if (err) {
710*4882a593Smuzhiyun 			dev_dbg(chan->device->dev,
711*4882a593Smuzhiyun 				"%s: failed to get %s: (%d)\n",
712*4882a593Smuzhiyun 				__func__, dma_chan_name(chan), err);
713*4882a593Smuzhiyun 			chan = NULL;
714*4882a593Smuzhiyun 			if (--device->privatecnt == 0)
715*4882a593Smuzhiyun 				dma_cap_clear(DMA_PRIVATE, device->cap_mask);
716*4882a593Smuzhiyun 		}
717*4882a593Smuzhiyun 	} else
718*4882a593Smuzhiyun 		chan = NULL;
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	return chan;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_get_slave_channel);
726*4882a593Smuzhiyun 
dma_get_any_slave_channel(struct dma_device * device)727*4882a593Smuzhiyun struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
728*4882a593Smuzhiyun {
729*4882a593Smuzhiyun 	dma_cap_mask_t mask;
730*4882a593Smuzhiyun 	struct dma_chan *chan;
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 	dma_cap_zero(mask);
733*4882a593Smuzhiyun 	dma_cap_set(DMA_SLAVE, mask);
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	/* lock against __dma_request_channel */
736*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun 	chan = find_candidate(device, &mask, NULL, NULL);
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 	return IS_ERR(chan) ? NULL : chan;
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun /**
747*4882a593Smuzhiyun  * __dma_request_channel - try to allocate an exclusive channel
748*4882a593Smuzhiyun  * @mask:	capabilities that the channel must satisfy
749*4882a593Smuzhiyun  * @fn:		optional callback to disposition available channels
750*4882a593Smuzhiyun  * @fn_param:	opaque parameter to pass to dma_filter_fn()
751*4882a593Smuzhiyun  * @np:		device node to look for DMA channels
752*4882a593Smuzhiyun  *
753*4882a593Smuzhiyun  * Returns pointer to appropriate DMA channel on success or NULL.
754*4882a593Smuzhiyun  */
__dma_request_channel(const dma_cap_mask_t * mask,dma_filter_fn fn,void * fn_param,struct device_node * np)755*4882a593Smuzhiyun struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
756*4882a593Smuzhiyun 				       dma_filter_fn fn, void *fn_param,
757*4882a593Smuzhiyun 				       struct device_node *np)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun 	struct dma_device *device, *_d;
760*4882a593Smuzhiyun 	struct dma_chan *chan = NULL;
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun 	/* Find a channel */
763*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
764*4882a593Smuzhiyun 	list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
765*4882a593Smuzhiyun 		/* Finds a DMA controller with matching device node */
766*4882a593Smuzhiyun 		if (np && device->dev->of_node && np != device->dev->of_node)
767*4882a593Smuzhiyun 			continue;
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 		chan = find_candidate(device, mask, fn, fn_param);
770*4882a593Smuzhiyun 		if (!IS_ERR(chan))
771*4882a593Smuzhiyun 			break;
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 		chan = NULL;
774*4882a593Smuzhiyun 	}
775*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	pr_debug("%s: %s (%s)\n",
778*4882a593Smuzhiyun 		 __func__,
779*4882a593Smuzhiyun 		 chan ? "success" : "fail",
780*4882a593Smuzhiyun 		 chan ? dma_chan_name(chan) : NULL);
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	return chan;
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__dma_request_channel);
785*4882a593Smuzhiyun 
dma_filter_match(struct dma_device * device,const char * name,struct device * dev)786*4882a593Smuzhiyun static const struct dma_slave_map *dma_filter_match(struct dma_device *device,
787*4882a593Smuzhiyun 						    const char *name,
788*4882a593Smuzhiyun 						    struct device *dev)
789*4882a593Smuzhiyun {
790*4882a593Smuzhiyun 	int i;
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun 	if (!device->filter.mapcnt)
793*4882a593Smuzhiyun 		return NULL;
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 	for (i = 0; i < device->filter.mapcnt; i++) {
796*4882a593Smuzhiyun 		const struct dma_slave_map *map = &device->filter.map[i];
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 		if (!strcmp(map->devname, dev_name(dev)) &&
799*4882a593Smuzhiyun 		    !strcmp(map->slave, name))
800*4882a593Smuzhiyun 			return map;
801*4882a593Smuzhiyun 	}
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	return NULL;
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun /**
807*4882a593Smuzhiyun  * dma_request_chan - try to allocate an exclusive slave channel
808*4882a593Smuzhiyun  * @dev:	pointer to client device structure
809*4882a593Smuzhiyun  * @name:	slave channel name
810*4882a593Smuzhiyun  *
811*4882a593Smuzhiyun  * Returns pointer to appropriate DMA channel on success or an error pointer.
812*4882a593Smuzhiyun  */
dma_request_chan(struct device * dev,const char * name)813*4882a593Smuzhiyun struct dma_chan *dma_request_chan(struct device *dev, const char *name)
814*4882a593Smuzhiyun {
815*4882a593Smuzhiyun 	struct dma_device *d, *_d;
816*4882a593Smuzhiyun 	struct dma_chan *chan = NULL;
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 	/* If device-tree is present get slave info from here */
819*4882a593Smuzhiyun 	if (dev->of_node)
820*4882a593Smuzhiyun 		chan = of_dma_request_slave_channel(dev->of_node, name);
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 	/* If device was enumerated by ACPI get slave info from here */
823*4882a593Smuzhiyun 	if (has_acpi_companion(dev) && !chan)
824*4882a593Smuzhiyun 		chan = acpi_dma_request_slave_chan_by_name(dev, name);
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun 	if (PTR_ERR(chan) == -EPROBE_DEFER)
827*4882a593Smuzhiyun 		return chan;
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	if (!IS_ERR_OR_NULL(chan))
830*4882a593Smuzhiyun 		goto found;
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 	/* Try to find the channel via the DMA filter map(s) */
833*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
834*4882a593Smuzhiyun 	list_for_each_entry_safe(d, _d, &dma_device_list, global_node) {
835*4882a593Smuzhiyun 		dma_cap_mask_t mask;
836*4882a593Smuzhiyun 		const struct dma_slave_map *map = dma_filter_match(d, name, dev);
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 		if (!map)
839*4882a593Smuzhiyun 			continue;
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 		dma_cap_zero(mask);
842*4882a593Smuzhiyun 		dma_cap_set(DMA_SLAVE, mask);
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun 		chan = find_candidate(d, &mask, d->filter.fn, map->param);
845*4882a593Smuzhiyun 		if (!IS_ERR(chan))
846*4882a593Smuzhiyun 			break;
847*4882a593Smuzhiyun 	}
848*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun 	if (IS_ERR(chan))
851*4882a593Smuzhiyun 		return chan;
852*4882a593Smuzhiyun 	if (!chan)
853*4882a593Smuzhiyun 		return ERR_PTR(-EPROBE_DEFER);
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun found:
856*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
857*4882a593Smuzhiyun 	chan->dbg_client_name = kasprintf(GFP_KERNEL, "%s:%s", dev_name(dev),
858*4882a593Smuzhiyun 					  name);
859*4882a593Smuzhiyun #endif
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	chan->name = kasprintf(GFP_KERNEL, "dma:%s", name);
862*4882a593Smuzhiyun 	if (!chan->name)
863*4882a593Smuzhiyun 		return chan;
864*4882a593Smuzhiyun 	chan->slave = dev;
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun 	if (sysfs_create_link(&chan->dev->device.kobj, &dev->kobj,
867*4882a593Smuzhiyun 			      DMA_SLAVE_NAME))
868*4882a593Smuzhiyun 		dev_warn(dev, "Cannot create DMA %s symlink\n", DMA_SLAVE_NAME);
869*4882a593Smuzhiyun 	if (sysfs_create_link(&dev->kobj, &chan->dev->device.kobj, chan->name))
870*4882a593Smuzhiyun 		dev_warn(dev, "Cannot create DMA %s symlink\n", chan->name);
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun 	return chan;
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_request_chan);
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun /**
877*4882a593Smuzhiyun  * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities
878*4882a593Smuzhiyun  * @mask:	capabilities that the channel must satisfy
879*4882a593Smuzhiyun  *
880*4882a593Smuzhiyun  * Returns pointer to appropriate DMA channel on success or an error pointer.
881*4882a593Smuzhiyun  */
dma_request_chan_by_mask(const dma_cap_mask_t * mask)882*4882a593Smuzhiyun struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun 	struct dma_chan *chan;
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 	if (!mask)
887*4882a593Smuzhiyun 		return ERR_PTR(-ENODEV);
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun 	chan = __dma_request_channel(mask, NULL, NULL, NULL);
890*4882a593Smuzhiyun 	if (!chan) {
891*4882a593Smuzhiyun 		mutex_lock(&dma_list_mutex);
892*4882a593Smuzhiyun 		if (list_empty(&dma_device_list))
893*4882a593Smuzhiyun 			chan = ERR_PTR(-EPROBE_DEFER);
894*4882a593Smuzhiyun 		else
895*4882a593Smuzhiyun 			chan = ERR_PTR(-ENODEV);
896*4882a593Smuzhiyun 		mutex_unlock(&dma_list_mutex);
897*4882a593Smuzhiyun 	}
898*4882a593Smuzhiyun 
899*4882a593Smuzhiyun 	return chan;
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_request_chan_by_mask);
902*4882a593Smuzhiyun 
dma_release_channel(struct dma_chan * chan)903*4882a593Smuzhiyun void dma_release_channel(struct dma_chan *chan)
904*4882a593Smuzhiyun {
905*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
906*4882a593Smuzhiyun 	WARN_ONCE(chan->client_count != 1,
907*4882a593Smuzhiyun 		  "chan reference count %d != 1\n", chan->client_count);
908*4882a593Smuzhiyun 	dma_chan_put(chan);
909*4882a593Smuzhiyun 	/* drop PRIVATE cap enabled by __dma_request_channel() */
910*4882a593Smuzhiyun 	if (--chan->device->privatecnt == 0)
911*4882a593Smuzhiyun 		dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun 	if (chan->slave) {
914*4882a593Smuzhiyun 		sysfs_remove_link(&chan->dev->device.kobj, DMA_SLAVE_NAME);
915*4882a593Smuzhiyun 		sysfs_remove_link(&chan->slave->kobj, chan->name);
916*4882a593Smuzhiyun 		kfree(chan->name);
917*4882a593Smuzhiyun 		chan->name = NULL;
918*4882a593Smuzhiyun 		chan->slave = NULL;
919*4882a593Smuzhiyun 	}
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
922*4882a593Smuzhiyun 	kfree(chan->dbg_client_name);
923*4882a593Smuzhiyun 	chan->dbg_client_name = NULL;
924*4882a593Smuzhiyun #endif
925*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
926*4882a593Smuzhiyun }
927*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_release_channel);
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun /**
930*4882a593Smuzhiyun  * dmaengine_get - register interest in dma_channels
931*4882a593Smuzhiyun  */
dmaengine_get(void)932*4882a593Smuzhiyun void dmaengine_get(void)
933*4882a593Smuzhiyun {
934*4882a593Smuzhiyun 	struct dma_device *device, *_d;
935*4882a593Smuzhiyun 	struct dma_chan *chan;
936*4882a593Smuzhiyun 	int err;
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
939*4882a593Smuzhiyun 	dmaengine_ref_count++;
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun 	/* try to grab channels */
942*4882a593Smuzhiyun 	list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
943*4882a593Smuzhiyun 		if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
944*4882a593Smuzhiyun 			continue;
945*4882a593Smuzhiyun 		list_for_each_entry(chan, &device->channels, device_node) {
946*4882a593Smuzhiyun 			err = dma_chan_get(chan);
947*4882a593Smuzhiyun 			if (err == -ENODEV) {
948*4882a593Smuzhiyun 				/* module removed before we could use it */
949*4882a593Smuzhiyun 				list_del_rcu(&device->global_node);
950*4882a593Smuzhiyun 				break;
951*4882a593Smuzhiyun 			} else if (err)
952*4882a593Smuzhiyun 				dev_dbg(chan->device->dev,
953*4882a593Smuzhiyun 					"%s: failed to get %s: (%d)\n",
954*4882a593Smuzhiyun 					__func__, dma_chan_name(chan), err);
955*4882a593Smuzhiyun 		}
956*4882a593Smuzhiyun 	}
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun 	/* if this is the first reference and there were channels
959*4882a593Smuzhiyun 	 * waiting we need to rebalance to get those channels
960*4882a593Smuzhiyun 	 * incorporated into the channel table
961*4882a593Smuzhiyun 	 */
962*4882a593Smuzhiyun 	if (dmaengine_ref_count == 1)
963*4882a593Smuzhiyun 		dma_channel_rebalance();
964*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
965*4882a593Smuzhiyun }
966*4882a593Smuzhiyun EXPORT_SYMBOL(dmaengine_get);
967*4882a593Smuzhiyun 
968*4882a593Smuzhiyun /**
969*4882a593Smuzhiyun  * dmaengine_put - let DMA drivers be removed when ref_count == 0
970*4882a593Smuzhiyun  */
dmaengine_put(void)971*4882a593Smuzhiyun void dmaengine_put(void)
972*4882a593Smuzhiyun {
973*4882a593Smuzhiyun 	struct dma_device *device, *_d;
974*4882a593Smuzhiyun 	struct dma_chan *chan;
975*4882a593Smuzhiyun 
976*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
977*4882a593Smuzhiyun 	dmaengine_ref_count--;
978*4882a593Smuzhiyun 	BUG_ON(dmaengine_ref_count < 0);
979*4882a593Smuzhiyun 	/* drop channel references */
980*4882a593Smuzhiyun 	list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
981*4882a593Smuzhiyun 		if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
982*4882a593Smuzhiyun 			continue;
983*4882a593Smuzhiyun 		list_for_each_entry(chan, &device->channels, device_node)
984*4882a593Smuzhiyun 			dma_chan_put(chan);
985*4882a593Smuzhiyun 	}
986*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun EXPORT_SYMBOL(dmaengine_put);
989*4882a593Smuzhiyun 
device_has_all_tx_types(struct dma_device * device)990*4882a593Smuzhiyun static bool device_has_all_tx_types(struct dma_device *device)
991*4882a593Smuzhiyun {
992*4882a593Smuzhiyun 	/* A device that satisfies this test has channels that will never cause
993*4882a593Smuzhiyun 	 * an async_tx channel switch event as all possible operation types can
994*4882a593Smuzhiyun 	 * be handled.
995*4882a593Smuzhiyun 	 */
996*4882a593Smuzhiyun 	#ifdef CONFIG_ASYNC_TX_DMA
997*4882a593Smuzhiyun 	if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
998*4882a593Smuzhiyun 		return false;
999*4882a593Smuzhiyun 	#endif
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun 	#if IS_ENABLED(CONFIG_ASYNC_MEMCPY)
1002*4882a593Smuzhiyun 	if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
1003*4882a593Smuzhiyun 		return false;
1004*4882a593Smuzhiyun 	#endif
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 	#if IS_ENABLED(CONFIG_ASYNC_XOR)
1007*4882a593Smuzhiyun 	if (!dma_has_cap(DMA_XOR, device->cap_mask))
1008*4882a593Smuzhiyun 		return false;
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	#ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
1011*4882a593Smuzhiyun 	if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
1012*4882a593Smuzhiyun 		return false;
1013*4882a593Smuzhiyun 	#endif
1014*4882a593Smuzhiyun 	#endif
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun 	#if IS_ENABLED(CONFIG_ASYNC_PQ)
1017*4882a593Smuzhiyun 	if (!dma_has_cap(DMA_PQ, device->cap_mask))
1018*4882a593Smuzhiyun 		return false;
1019*4882a593Smuzhiyun 
1020*4882a593Smuzhiyun 	#ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
1021*4882a593Smuzhiyun 	if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
1022*4882a593Smuzhiyun 		return false;
1023*4882a593Smuzhiyun 	#endif
1024*4882a593Smuzhiyun 	#endif
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 	return true;
1027*4882a593Smuzhiyun }
1028*4882a593Smuzhiyun 
get_dma_id(struct dma_device * device)1029*4882a593Smuzhiyun static int get_dma_id(struct dma_device *device)
1030*4882a593Smuzhiyun {
1031*4882a593Smuzhiyun 	int rc = ida_alloc(&dma_ida, GFP_KERNEL);
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun 	if (rc < 0)
1034*4882a593Smuzhiyun 		return rc;
1035*4882a593Smuzhiyun 	device->dev_id = rc;
1036*4882a593Smuzhiyun 	return 0;
1037*4882a593Smuzhiyun }
1038*4882a593Smuzhiyun 
__dma_async_device_channel_register(struct dma_device * device,struct dma_chan * chan)1039*4882a593Smuzhiyun static int __dma_async_device_channel_register(struct dma_device *device,
1040*4882a593Smuzhiyun 					       struct dma_chan *chan)
1041*4882a593Smuzhiyun {
1042*4882a593Smuzhiyun 	int rc;
1043*4882a593Smuzhiyun 
1044*4882a593Smuzhiyun 	chan->local = alloc_percpu(typeof(*chan->local));
1045*4882a593Smuzhiyun 	if (!chan->local)
1046*4882a593Smuzhiyun 		return -ENOMEM;
1047*4882a593Smuzhiyun 	chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
1048*4882a593Smuzhiyun 	if (!chan->dev) {
1049*4882a593Smuzhiyun 		rc = -ENOMEM;
1050*4882a593Smuzhiyun 		goto err_free_local;
1051*4882a593Smuzhiyun 	}
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	/*
1054*4882a593Smuzhiyun 	 * When the chan_id is a negative value, we are dynamically adding
1055*4882a593Smuzhiyun 	 * the channel. Otherwise we are static enumerating.
1056*4882a593Smuzhiyun 	 */
1057*4882a593Smuzhiyun 	mutex_lock(&device->chan_mutex);
1058*4882a593Smuzhiyun 	chan->chan_id = ida_alloc(&device->chan_ida, GFP_KERNEL);
1059*4882a593Smuzhiyun 	mutex_unlock(&device->chan_mutex);
1060*4882a593Smuzhiyun 	if (chan->chan_id < 0) {
1061*4882a593Smuzhiyun 		pr_err("%s: unable to alloc ida for chan: %d\n",
1062*4882a593Smuzhiyun 		       __func__, chan->chan_id);
1063*4882a593Smuzhiyun 		rc = chan->chan_id;
1064*4882a593Smuzhiyun 		goto err_free_dev;
1065*4882a593Smuzhiyun 	}
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun 	chan->dev->device.class = &dma_devclass;
1068*4882a593Smuzhiyun 	chan->dev->device.parent = device->dev;
1069*4882a593Smuzhiyun 	chan->dev->chan = chan;
1070*4882a593Smuzhiyun 	chan->dev->dev_id = device->dev_id;
1071*4882a593Smuzhiyun 	dev_set_name(&chan->dev->device, "dma%dchan%d",
1072*4882a593Smuzhiyun 		     device->dev_id, chan->chan_id);
1073*4882a593Smuzhiyun 	rc = device_register(&chan->dev->device);
1074*4882a593Smuzhiyun 	if (rc)
1075*4882a593Smuzhiyun 		goto err_out_ida;
1076*4882a593Smuzhiyun 	chan->client_count = 0;
1077*4882a593Smuzhiyun 	device->chancnt++;
1078*4882a593Smuzhiyun 
1079*4882a593Smuzhiyun 	return 0;
1080*4882a593Smuzhiyun 
1081*4882a593Smuzhiyun  err_out_ida:
1082*4882a593Smuzhiyun 	mutex_lock(&device->chan_mutex);
1083*4882a593Smuzhiyun 	ida_free(&device->chan_ida, chan->chan_id);
1084*4882a593Smuzhiyun 	mutex_unlock(&device->chan_mutex);
1085*4882a593Smuzhiyun  err_free_dev:
1086*4882a593Smuzhiyun 	kfree(chan->dev);
1087*4882a593Smuzhiyun  err_free_local:
1088*4882a593Smuzhiyun 	free_percpu(chan->local);
1089*4882a593Smuzhiyun 	chan->local = NULL;
1090*4882a593Smuzhiyun 	return rc;
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun 
dma_async_device_channel_register(struct dma_device * device,struct dma_chan * chan)1093*4882a593Smuzhiyun int dma_async_device_channel_register(struct dma_device *device,
1094*4882a593Smuzhiyun 				      struct dma_chan *chan)
1095*4882a593Smuzhiyun {
1096*4882a593Smuzhiyun 	int rc;
1097*4882a593Smuzhiyun 
1098*4882a593Smuzhiyun 	rc = __dma_async_device_channel_register(device, chan);
1099*4882a593Smuzhiyun 	if (rc < 0)
1100*4882a593Smuzhiyun 		return rc;
1101*4882a593Smuzhiyun 
1102*4882a593Smuzhiyun 	dma_channel_rebalance();
1103*4882a593Smuzhiyun 	return 0;
1104*4882a593Smuzhiyun }
1105*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_async_device_channel_register);
1106*4882a593Smuzhiyun 
__dma_async_device_channel_unregister(struct dma_device * device,struct dma_chan * chan)1107*4882a593Smuzhiyun static void __dma_async_device_channel_unregister(struct dma_device *device,
1108*4882a593Smuzhiyun 						  struct dma_chan *chan)
1109*4882a593Smuzhiyun {
1110*4882a593Smuzhiyun 	WARN_ONCE(!device->device_release && chan->client_count,
1111*4882a593Smuzhiyun 		  "%s called while %d clients hold a reference\n",
1112*4882a593Smuzhiyun 		  __func__, chan->client_count);
1113*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
1114*4882a593Smuzhiyun 	device->chancnt--;
1115*4882a593Smuzhiyun 	chan->dev->chan = NULL;
1116*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
1117*4882a593Smuzhiyun 	mutex_lock(&device->chan_mutex);
1118*4882a593Smuzhiyun 	ida_free(&device->chan_ida, chan->chan_id);
1119*4882a593Smuzhiyun 	mutex_unlock(&device->chan_mutex);
1120*4882a593Smuzhiyun 	device_unregister(&chan->dev->device);
1121*4882a593Smuzhiyun 	free_percpu(chan->local);
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun 
dma_async_device_channel_unregister(struct dma_device * device,struct dma_chan * chan)1124*4882a593Smuzhiyun void dma_async_device_channel_unregister(struct dma_device *device,
1125*4882a593Smuzhiyun 					 struct dma_chan *chan)
1126*4882a593Smuzhiyun {
1127*4882a593Smuzhiyun 	__dma_async_device_channel_unregister(device, chan);
1128*4882a593Smuzhiyun 	dma_channel_rebalance();
1129*4882a593Smuzhiyun }
1130*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_async_device_channel_unregister);
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun /**
1133*4882a593Smuzhiyun  * dma_async_device_register - registers DMA devices found
1134*4882a593Smuzhiyun  * @device:	pointer to &struct dma_device
1135*4882a593Smuzhiyun  *
1136*4882a593Smuzhiyun  * After calling this routine the structure should not be freed except in the
1137*4882a593Smuzhiyun  * device_release() callback which will be called after
1138*4882a593Smuzhiyun  * dma_async_device_unregister() is called and no further references are taken.
1139*4882a593Smuzhiyun  */
dma_async_device_register(struct dma_device * device)1140*4882a593Smuzhiyun int dma_async_device_register(struct dma_device *device)
1141*4882a593Smuzhiyun {
1142*4882a593Smuzhiyun 	int rc;
1143*4882a593Smuzhiyun 	struct dma_chan* chan;
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun 	if (!device)
1146*4882a593Smuzhiyun 		return -ENODEV;
1147*4882a593Smuzhiyun 
1148*4882a593Smuzhiyun 	/* validate device routines */
1149*4882a593Smuzhiyun 	if (!device->dev) {
1150*4882a593Smuzhiyun 		pr_err("DMAdevice must have dev\n");
1151*4882a593Smuzhiyun 		return -EIO;
1152*4882a593Smuzhiyun 	}
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	device->owner = device->dev->driver->owner;
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) {
1157*4882a593Smuzhiyun 		dev_err(device->dev,
1158*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1159*4882a593Smuzhiyun 			"DMA_MEMCPY");
1160*4882a593Smuzhiyun 		return -EIO;
1161*4882a593Smuzhiyun 	}
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun 	if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) {
1164*4882a593Smuzhiyun 		dev_err(device->dev,
1165*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1166*4882a593Smuzhiyun 			"DMA_XOR");
1167*4882a593Smuzhiyun 		return -EIO;
1168*4882a593Smuzhiyun 	}
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun 	if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) {
1171*4882a593Smuzhiyun 		dev_err(device->dev,
1172*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1173*4882a593Smuzhiyun 			"DMA_XOR_VAL");
1174*4882a593Smuzhiyun 		return -EIO;
1175*4882a593Smuzhiyun 	}
1176*4882a593Smuzhiyun 
1177*4882a593Smuzhiyun 	if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) {
1178*4882a593Smuzhiyun 		dev_err(device->dev,
1179*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1180*4882a593Smuzhiyun 			"DMA_PQ");
1181*4882a593Smuzhiyun 		return -EIO;
1182*4882a593Smuzhiyun 	}
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) {
1185*4882a593Smuzhiyun 		dev_err(device->dev,
1186*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1187*4882a593Smuzhiyun 			"DMA_PQ_VAL");
1188*4882a593Smuzhiyun 		return -EIO;
1189*4882a593Smuzhiyun 	}
1190*4882a593Smuzhiyun 
1191*4882a593Smuzhiyun 	if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) {
1192*4882a593Smuzhiyun 		dev_err(device->dev,
1193*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1194*4882a593Smuzhiyun 			"DMA_MEMSET");
1195*4882a593Smuzhiyun 		return -EIO;
1196*4882a593Smuzhiyun 	}
1197*4882a593Smuzhiyun 
1198*4882a593Smuzhiyun 	if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) {
1199*4882a593Smuzhiyun 		dev_err(device->dev,
1200*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1201*4882a593Smuzhiyun 			"DMA_INTERRUPT");
1202*4882a593Smuzhiyun 		return -EIO;
1203*4882a593Smuzhiyun 	}
1204*4882a593Smuzhiyun 
1205*4882a593Smuzhiyun 	if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) {
1206*4882a593Smuzhiyun 		dev_err(device->dev,
1207*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1208*4882a593Smuzhiyun 			"DMA_CYCLIC");
1209*4882a593Smuzhiyun 		return -EIO;
1210*4882a593Smuzhiyun 	}
1211*4882a593Smuzhiyun 
1212*4882a593Smuzhiyun 	if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) {
1213*4882a593Smuzhiyun 		dev_err(device->dev,
1214*4882a593Smuzhiyun 			"Device claims capability %s, but op is not defined\n",
1215*4882a593Smuzhiyun 			"DMA_INTERLEAVE");
1216*4882a593Smuzhiyun 		return -EIO;
1217*4882a593Smuzhiyun 	}
1218*4882a593Smuzhiyun 
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun 	if (!device->device_tx_status) {
1221*4882a593Smuzhiyun 		dev_err(device->dev, "Device tx_status is not defined\n");
1222*4882a593Smuzhiyun 		return -EIO;
1223*4882a593Smuzhiyun 	}
1224*4882a593Smuzhiyun 
1225*4882a593Smuzhiyun 
1226*4882a593Smuzhiyun 	if (!device->device_issue_pending) {
1227*4882a593Smuzhiyun 		dev_err(device->dev, "Device issue_pending is not defined\n");
1228*4882a593Smuzhiyun 		return -EIO;
1229*4882a593Smuzhiyun 	}
1230*4882a593Smuzhiyun 
1231*4882a593Smuzhiyun 	if (!device->device_release)
1232*4882a593Smuzhiyun 		dev_dbg(device->dev,
1233*4882a593Smuzhiyun 			 "WARN: Device release is not defined so it is not safe to unbind this driver while in use\n");
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun 	kref_init(&device->ref);
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun 	/* note: this only matters in the
1238*4882a593Smuzhiyun 	 * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
1239*4882a593Smuzhiyun 	 */
1240*4882a593Smuzhiyun 	if (device_has_all_tx_types(device))
1241*4882a593Smuzhiyun 		dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun 	rc = get_dma_id(device);
1244*4882a593Smuzhiyun 	if (rc != 0)
1245*4882a593Smuzhiyun 		return rc;
1246*4882a593Smuzhiyun 
1247*4882a593Smuzhiyun 	mutex_init(&device->chan_mutex);
1248*4882a593Smuzhiyun 	ida_init(&device->chan_ida);
1249*4882a593Smuzhiyun 
1250*4882a593Smuzhiyun 	/* represent channels in sysfs. Probably want devs too */
1251*4882a593Smuzhiyun 	list_for_each_entry(chan, &device->channels, device_node) {
1252*4882a593Smuzhiyun 		rc = __dma_async_device_channel_register(device, chan);
1253*4882a593Smuzhiyun 		if (rc < 0)
1254*4882a593Smuzhiyun 			goto err_out;
1255*4882a593Smuzhiyun 	}
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
1258*4882a593Smuzhiyun 	/* take references on public channels */
1259*4882a593Smuzhiyun 	if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
1260*4882a593Smuzhiyun 		list_for_each_entry(chan, &device->channels, device_node) {
1261*4882a593Smuzhiyun 			/* if clients are already waiting for channels we need
1262*4882a593Smuzhiyun 			 * to take references on their behalf
1263*4882a593Smuzhiyun 			 */
1264*4882a593Smuzhiyun 			if (dma_chan_get(chan) == -ENODEV) {
1265*4882a593Smuzhiyun 				/* note we can only get here for the first
1266*4882a593Smuzhiyun 				 * channel as the remaining channels are
1267*4882a593Smuzhiyun 				 * guaranteed to get a reference
1268*4882a593Smuzhiyun 				 */
1269*4882a593Smuzhiyun 				rc = -ENODEV;
1270*4882a593Smuzhiyun 				mutex_unlock(&dma_list_mutex);
1271*4882a593Smuzhiyun 				goto err_out;
1272*4882a593Smuzhiyun 			}
1273*4882a593Smuzhiyun 		}
1274*4882a593Smuzhiyun 	list_add_tail_rcu(&device->global_node, &dma_device_list);
1275*4882a593Smuzhiyun 	if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
1276*4882a593Smuzhiyun 		device->privatecnt++;	/* Always private */
1277*4882a593Smuzhiyun 	dma_channel_rebalance();
1278*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
1279*4882a593Smuzhiyun 
1280*4882a593Smuzhiyun 	dmaengine_debug_register(device);
1281*4882a593Smuzhiyun 
1282*4882a593Smuzhiyun 	return 0;
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun err_out:
1285*4882a593Smuzhiyun 	/* if we never registered a channel just release the idr */
1286*4882a593Smuzhiyun 	if (!device->chancnt) {
1287*4882a593Smuzhiyun 		ida_free(&dma_ida, device->dev_id);
1288*4882a593Smuzhiyun 		return rc;
1289*4882a593Smuzhiyun 	}
1290*4882a593Smuzhiyun 
1291*4882a593Smuzhiyun 	list_for_each_entry(chan, &device->channels, device_node) {
1292*4882a593Smuzhiyun 		if (chan->local == NULL)
1293*4882a593Smuzhiyun 			continue;
1294*4882a593Smuzhiyun 		mutex_lock(&dma_list_mutex);
1295*4882a593Smuzhiyun 		chan->dev->chan = NULL;
1296*4882a593Smuzhiyun 		mutex_unlock(&dma_list_mutex);
1297*4882a593Smuzhiyun 		device_unregister(&chan->dev->device);
1298*4882a593Smuzhiyun 		free_percpu(chan->local);
1299*4882a593Smuzhiyun 	}
1300*4882a593Smuzhiyun 	return rc;
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun EXPORT_SYMBOL(dma_async_device_register);
1303*4882a593Smuzhiyun 
1304*4882a593Smuzhiyun /**
1305*4882a593Smuzhiyun  * dma_async_device_unregister - unregister a DMA device
1306*4882a593Smuzhiyun  * @device:	pointer to &struct dma_device
1307*4882a593Smuzhiyun  *
1308*4882a593Smuzhiyun  * This routine is called by dma driver exit routines, dmaengine holds module
1309*4882a593Smuzhiyun  * references to prevent it being called while channels are in use.
1310*4882a593Smuzhiyun  */
dma_async_device_unregister(struct dma_device * device)1311*4882a593Smuzhiyun void dma_async_device_unregister(struct dma_device *device)
1312*4882a593Smuzhiyun {
1313*4882a593Smuzhiyun 	struct dma_chan *chan, *n;
1314*4882a593Smuzhiyun 
1315*4882a593Smuzhiyun 	dmaengine_debug_unregister(device);
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun 	list_for_each_entry_safe(chan, n, &device->channels, device_node)
1318*4882a593Smuzhiyun 		__dma_async_device_channel_unregister(device, chan);
1319*4882a593Smuzhiyun 
1320*4882a593Smuzhiyun 	mutex_lock(&dma_list_mutex);
1321*4882a593Smuzhiyun 	/*
1322*4882a593Smuzhiyun 	 * setting DMA_PRIVATE ensures the device being torn down will not
1323*4882a593Smuzhiyun 	 * be used in the channel_table
1324*4882a593Smuzhiyun 	 */
1325*4882a593Smuzhiyun 	dma_cap_set(DMA_PRIVATE, device->cap_mask);
1326*4882a593Smuzhiyun 	dma_channel_rebalance();
1327*4882a593Smuzhiyun 	ida_free(&dma_ida, device->dev_id);
1328*4882a593Smuzhiyun 	dma_device_put(device);
1329*4882a593Smuzhiyun 	mutex_unlock(&dma_list_mutex);
1330*4882a593Smuzhiyun }
1331*4882a593Smuzhiyun EXPORT_SYMBOL(dma_async_device_unregister);
1332*4882a593Smuzhiyun 
dmam_device_release(struct device * dev,void * res)1333*4882a593Smuzhiyun static void dmam_device_release(struct device *dev, void *res)
1334*4882a593Smuzhiyun {
1335*4882a593Smuzhiyun 	struct dma_device *device;
1336*4882a593Smuzhiyun 
1337*4882a593Smuzhiyun 	device = *(struct dma_device **)res;
1338*4882a593Smuzhiyun 	dma_async_device_unregister(device);
1339*4882a593Smuzhiyun }
1340*4882a593Smuzhiyun 
1341*4882a593Smuzhiyun /**
1342*4882a593Smuzhiyun  * dmaenginem_async_device_register - registers DMA devices found
1343*4882a593Smuzhiyun  * @device:	pointer to &struct dma_device
1344*4882a593Smuzhiyun  *
1345*4882a593Smuzhiyun  * The operation is managed and will be undone on driver detach.
1346*4882a593Smuzhiyun  */
dmaenginem_async_device_register(struct dma_device * device)1347*4882a593Smuzhiyun int dmaenginem_async_device_register(struct dma_device *device)
1348*4882a593Smuzhiyun {
1349*4882a593Smuzhiyun 	void *p;
1350*4882a593Smuzhiyun 	int ret;
1351*4882a593Smuzhiyun 
1352*4882a593Smuzhiyun 	p = devres_alloc(dmam_device_release, sizeof(void *), GFP_KERNEL);
1353*4882a593Smuzhiyun 	if (!p)
1354*4882a593Smuzhiyun 		return -ENOMEM;
1355*4882a593Smuzhiyun 
1356*4882a593Smuzhiyun 	ret = dma_async_device_register(device);
1357*4882a593Smuzhiyun 	if (!ret) {
1358*4882a593Smuzhiyun 		*(struct dma_device **)p = device;
1359*4882a593Smuzhiyun 		devres_add(device->dev, p);
1360*4882a593Smuzhiyun 	} else {
1361*4882a593Smuzhiyun 		devres_free(p);
1362*4882a593Smuzhiyun 	}
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun 	return ret;
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun EXPORT_SYMBOL(dmaenginem_async_device_register);
1367*4882a593Smuzhiyun 
1368*4882a593Smuzhiyun struct dmaengine_unmap_pool {
1369*4882a593Smuzhiyun 	struct kmem_cache *cache;
1370*4882a593Smuzhiyun 	const char *name;
1371*4882a593Smuzhiyun 	mempool_t *pool;
1372*4882a593Smuzhiyun 	size_t size;
1373*4882a593Smuzhiyun };
1374*4882a593Smuzhiyun 
1375*4882a593Smuzhiyun #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
1376*4882a593Smuzhiyun static struct dmaengine_unmap_pool unmap_pool[] = {
1377*4882a593Smuzhiyun 	__UNMAP_POOL(2),
1378*4882a593Smuzhiyun 	#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
1379*4882a593Smuzhiyun 	__UNMAP_POOL(16),
1380*4882a593Smuzhiyun 	__UNMAP_POOL(128),
1381*4882a593Smuzhiyun 	__UNMAP_POOL(256),
1382*4882a593Smuzhiyun 	#endif
1383*4882a593Smuzhiyun };
1384*4882a593Smuzhiyun 
__get_unmap_pool(int nr)1385*4882a593Smuzhiyun static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
1386*4882a593Smuzhiyun {
1387*4882a593Smuzhiyun 	int order = get_count_order(nr);
1388*4882a593Smuzhiyun 
1389*4882a593Smuzhiyun 	switch (order) {
1390*4882a593Smuzhiyun 	case 0 ... 1:
1391*4882a593Smuzhiyun 		return &unmap_pool[0];
1392*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
1393*4882a593Smuzhiyun 	case 2 ... 4:
1394*4882a593Smuzhiyun 		return &unmap_pool[1];
1395*4882a593Smuzhiyun 	case 5 ... 7:
1396*4882a593Smuzhiyun 		return &unmap_pool[2];
1397*4882a593Smuzhiyun 	case 8:
1398*4882a593Smuzhiyun 		return &unmap_pool[3];
1399*4882a593Smuzhiyun #endif
1400*4882a593Smuzhiyun 	default:
1401*4882a593Smuzhiyun 		BUG();
1402*4882a593Smuzhiyun 		return NULL;
1403*4882a593Smuzhiyun 	}
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun 
dmaengine_unmap(struct kref * kref)1406*4882a593Smuzhiyun static void dmaengine_unmap(struct kref *kref)
1407*4882a593Smuzhiyun {
1408*4882a593Smuzhiyun 	struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
1409*4882a593Smuzhiyun 	struct device *dev = unmap->dev;
1410*4882a593Smuzhiyun 	int cnt, i;
1411*4882a593Smuzhiyun 
1412*4882a593Smuzhiyun 	cnt = unmap->to_cnt;
1413*4882a593Smuzhiyun 	for (i = 0; i < cnt; i++)
1414*4882a593Smuzhiyun 		dma_unmap_page(dev, unmap->addr[i], unmap->len,
1415*4882a593Smuzhiyun 			       DMA_TO_DEVICE);
1416*4882a593Smuzhiyun 	cnt += unmap->from_cnt;
1417*4882a593Smuzhiyun 	for (; i < cnt; i++)
1418*4882a593Smuzhiyun 		dma_unmap_page(dev, unmap->addr[i], unmap->len,
1419*4882a593Smuzhiyun 			       DMA_FROM_DEVICE);
1420*4882a593Smuzhiyun 	cnt += unmap->bidi_cnt;
1421*4882a593Smuzhiyun 	for (; i < cnt; i++) {
1422*4882a593Smuzhiyun 		if (unmap->addr[i] == 0)
1423*4882a593Smuzhiyun 			continue;
1424*4882a593Smuzhiyun 		dma_unmap_page(dev, unmap->addr[i], unmap->len,
1425*4882a593Smuzhiyun 			       DMA_BIDIRECTIONAL);
1426*4882a593Smuzhiyun 	}
1427*4882a593Smuzhiyun 	cnt = unmap->map_cnt;
1428*4882a593Smuzhiyun 	mempool_free(unmap, __get_unmap_pool(cnt)->pool);
1429*4882a593Smuzhiyun }
1430*4882a593Smuzhiyun 
dmaengine_unmap_put(struct dmaengine_unmap_data * unmap)1431*4882a593Smuzhiyun void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
1432*4882a593Smuzhiyun {
1433*4882a593Smuzhiyun 	if (unmap)
1434*4882a593Smuzhiyun 		kref_put(&unmap->kref, dmaengine_unmap);
1435*4882a593Smuzhiyun }
1436*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
1437*4882a593Smuzhiyun 
dmaengine_destroy_unmap_pool(void)1438*4882a593Smuzhiyun static void dmaengine_destroy_unmap_pool(void)
1439*4882a593Smuzhiyun {
1440*4882a593Smuzhiyun 	int i;
1441*4882a593Smuzhiyun 
1442*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
1443*4882a593Smuzhiyun 		struct dmaengine_unmap_pool *p = &unmap_pool[i];
1444*4882a593Smuzhiyun 
1445*4882a593Smuzhiyun 		mempool_destroy(p->pool);
1446*4882a593Smuzhiyun 		p->pool = NULL;
1447*4882a593Smuzhiyun 		kmem_cache_destroy(p->cache);
1448*4882a593Smuzhiyun 		p->cache = NULL;
1449*4882a593Smuzhiyun 	}
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun 
dmaengine_init_unmap_pool(void)1452*4882a593Smuzhiyun static int __init dmaengine_init_unmap_pool(void)
1453*4882a593Smuzhiyun {
1454*4882a593Smuzhiyun 	int i;
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
1457*4882a593Smuzhiyun 		struct dmaengine_unmap_pool *p = &unmap_pool[i];
1458*4882a593Smuzhiyun 		size_t size;
1459*4882a593Smuzhiyun 
1460*4882a593Smuzhiyun 		size = sizeof(struct dmaengine_unmap_data) +
1461*4882a593Smuzhiyun 		       sizeof(dma_addr_t) * p->size;
1462*4882a593Smuzhiyun 
1463*4882a593Smuzhiyun 		p->cache = kmem_cache_create(p->name, size, 0,
1464*4882a593Smuzhiyun 					     SLAB_HWCACHE_ALIGN, NULL);
1465*4882a593Smuzhiyun 		if (!p->cache)
1466*4882a593Smuzhiyun 			break;
1467*4882a593Smuzhiyun 		p->pool = mempool_create_slab_pool(1, p->cache);
1468*4882a593Smuzhiyun 		if (!p->pool)
1469*4882a593Smuzhiyun 			break;
1470*4882a593Smuzhiyun 	}
1471*4882a593Smuzhiyun 
1472*4882a593Smuzhiyun 	if (i == ARRAY_SIZE(unmap_pool))
1473*4882a593Smuzhiyun 		return 0;
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun 	dmaengine_destroy_unmap_pool();
1476*4882a593Smuzhiyun 	return -ENOMEM;
1477*4882a593Smuzhiyun }
1478*4882a593Smuzhiyun 
1479*4882a593Smuzhiyun struct dmaengine_unmap_data *
dmaengine_get_unmap_data(struct device * dev,int nr,gfp_t flags)1480*4882a593Smuzhiyun dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
1481*4882a593Smuzhiyun {
1482*4882a593Smuzhiyun 	struct dmaengine_unmap_data *unmap;
1483*4882a593Smuzhiyun 
1484*4882a593Smuzhiyun 	unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
1485*4882a593Smuzhiyun 	if (!unmap)
1486*4882a593Smuzhiyun 		return NULL;
1487*4882a593Smuzhiyun 
1488*4882a593Smuzhiyun 	memset(unmap, 0, sizeof(*unmap));
1489*4882a593Smuzhiyun 	kref_init(&unmap->kref);
1490*4882a593Smuzhiyun 	unmap->dev = dev;
1491*4882a593Smuzhiyun 	unmap->map_cnt = nr;
1492*4882a593Smuzhiyun 
1493*4882a593Smuzhiyun 	return unmap;
1494*4882a593Smuzhiyun }
1495*4882a593Smuzhiyun EXPORT_SYMBOL(dmaengine_get_unmap_data);
1496*4882a593Smuzhiyun 
dma_async_tx_descriptor_init(struct dma_async_tx_descriptor * tx,struct dma_chan * chan)1497*4882a593Smuzhiyun void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
1498*4882a593Smuzhiyun 	struct dma_chan *chan)
1499*4882a593Smuzhiyun {
1500*4882a593Smuzhiyun 	tx->chan = chan;
1501*4882a593Smuzhiyun 	#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
1502*4882a593Smuzhiyun 	spin_lock_init(&tx->lock);
1503*4882a593Smuzhiyun 	#endif
1504*4882a593Smuzhiyun }
1505*4882a593Smuzhiyun EXPORT_SYMBOL(dma_async_tx_descriptor_init);
1506*4882a593Smuzhiyun 
desc_check_and_set_metadata_mode(struct dma_async_tx_descriptor * desc,enum dma_desc_metadata_mode mode)1507*4882a593Smuzhiyun static inline int desc_check_and_set_metadata_mode(
1508*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *desc, enum dma_desc_metadata_mode mode)
1509*4882a593Smuzhiyun {
1510*4882a593Smuzhiyun 	/* Make sure that the metadata mode is not mixed */
1511*4882a593Smuzhiyun 	if (!desc->desc_metadata_mode) {
1512*4882a593Smuzhiyun 		if (dmaengine_is_metadata_mode_supported(desc->chan, mode))
1513*4882a593Smuzhiyun 			desc->desc_metadata_mode = mode;
1514*4882a593Smuzhiyun 		else
1515*4882a593Smuzhiyun 			return -ENOTSUPP;
1516*4882a593Smuzhiyun 	} else if (desc->desc_metadata_mode != mode) {
1517*4882a593Smuzhiyun 		return -EINVAL;
1518*4882a593Smuzhiyun 	}
1519*4882a593Smuzhiyun 
1520*4882a593Smuzhiyun 	return 0;
1521*4882a593Smuzhiyun }
1522*4882a593Smuzhiyun 
dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor * desc,void * data,size_t len)1523*4882a593Smuzhiyun int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc,
1524*4882a593Smuzhiyun 				   void *data, size_t len)
1525*4882a593Smuzhiyun {
1526*4882a593Smuzhiyun 	int ret;
1527*4882a593Smuzhiyun 
1528*4882a593Smuzhiyun 	if (!desc)
1529*4882a593Smuzhiyun 		return -EINVAL;
1530*4882a593Smuzhiyun 
1531*4882a593Smuzhiyun 	ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_CLIENT);
1532*4882a593Smuzhiyun 	if (ret)
1533*4882a593Smuzhiyun 		return ret;
1534*4882a593Smuzhiyun 
1535*4882a593Smuzhiyun 	if (!desc->metadata_ops || !desc->metadata_ops->attach)
1536*4882a593Smuzhiyun 		return -ENOTSUPP;
1537*4882a593Smuzhiyun 
1538*4882a593Smuzhiyun 	return desc->metadata_ops->attach(desc, data, len);
1539*4882a593Smuzhiyun }
1540*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dmaengine_desc_attach_metadata);
1541*4882a593Smuzhiyun 
dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor * desc,size_t * payload_len,size_t * max_len)1542*4882a593Smuzhiyun void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc,
1543*4882a593Smuzhiyun 				      size_t *payload_len, size_t *max_len)
1544*4882a593Smuzhiyun {
1545*4882a593Smuzhiyun 	int ret;
1546*4882a593Smuzhiyun 
1547*4882a593Smuzhiyun 	if (!desc)
1548*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 	ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE);
1551*4882a593Smuzhiyun 	if (ret)
1552*4882a593Smuzhiyun 		return ERR_PTR(ret);
1553*4882a593Smuzhiyun 
1554*4882a593Smuzhiyun 	if (!desc->metadata_ops || !desc->metadata_ops->get_ptr)
1555*4882a593Smuzhiyun 		return ERR_PTR(-ENOTSUPP);
1556*4882a593Smuzhiyun 
1557*4882a593Smuzhiyun 	return desc->metadata_ops->get_ptr(desc, payload_len, max_len);
1558*4882a593Smuzhiyun }
1559*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dmaengine_desc_get_metadata_ptr);
1560*4882a593Smuzhiyun 
dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor * desc,size_t payload_len)1561*4882a593Smuzhiyun int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc,
1562*4882a593Smuzhiyun 				    size_t payload_len)
1563*4882a593Smuzhiyun {
1564*4882a593Smuzhiyun 	int ret;
1565*4882a593Smuzhiyun 
1566*4882a593Smuzhiyun 	if (!desc)
1567*4882a593Smuzhiyun 		return -EINVAL;
1568*4882a593Smuzhiyun 
1569*4882a593Smuzhiyun 	ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE);
1570*4882a593Smuzhiyun 	if (ret)
1571*4882a593Smuzhiyun 		return ret;
1572*4882a593Smuzhiyun 
1573*4882a593Smuzhiyun 	if (!desc->metadata_ops || !desc->metadata_ops->set_len)
1574*4882a593Smuzhiyun 		return -ENOTSUPP;
1575*4882a593Smuzhiyun 
1576*4882a593Smuzhiyun 	return desc->metadata_ops->set_len(desc, payload_len);
1577*4882a593Smuzhiyun }
1578*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dmaengine_desc_set_metadata_len);
1579*4882a593Smuzhiyun 
1580*4882a593Smuzhiyun /**
1581*4882a593Smuzhiyun  * dma_wait_for_async_tx - spin wait for a transaction to complete
1582*4882a593Smuzhiyun  * @tx:		in-flight transaction to wait on
1583*4882a593Smuzhiyun  */
1584*4882a593Smuzhiyun enum dma_status
dma_wait_for_async_tx(struct dma_async_tx_descriptor * tx)1585*4882a593Smuzhiyun dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
1586*4882a593Smuzhiyun {
1587*4882a593Smuzhiyun 	unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
1588*4882a593Smuzhiyun 
1589*4882a593Smuzhiyun 	if (!tx)
1590*4882a593Smuzhiyun 		return DMA_COMPLETE;
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun 	while (tx->cookie == -EBUSY) {
1593*4882a593Smuzhiyun 		if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
1594*4882a593Smuzhiyun 			dev_err(tx->chan->device->dev,
1595*4882a593Smuzhiyun 				"%s timeout waiting for descriptor submission\n",
1596*4882a593Smuzhiyun 				__func__);
1597*4882a593Smuzhiyun 			return DMA_ERROR;
1598*4882a593Smuzhiyun 		}
1599*4882a593Smuzhiyun 		cpu_relax();
1600*4882a593Smuzhiyun 	}
1601*4882a593Smuzhiyun 	return dma_sync_wait(tx->chan, tx->cookie);
1602*4882a593Smuzhiyun }
1603*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
1604*4882a593Smuzhiyun 
1605*4882a593Smuzhiyun /**
1606*4882a593Smuzhiyun  * dma_run_dependencies - process dependent operations on the target channel
1607*4882a593Smuzhiyun  * @tx:		transaction with dependencies
1608*4882a593Smuzhiyun  *
1609*4882a593Smuzhiyun  * Helper routine for DMA drivers to process (start) dependent operations
1610*4882a593Smuzhiyun  * on their target channel.
1611*4882a593Smuzhiyun  */
dma_run_dependencies(struct dma_async_tx_descriptor * tx)1612*4882a593Smuzhiyun void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
1613*4882a593Smuzhiyun {
1614*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *dep = txd_next(tx);
1615*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *dep_next;
1616*4882a593Smuzhiyun 	struct dma_chan *chan;
1617*4882a593Smuzhiyun 
1618*4882a593Smuzhiyun 	if (!dep)
1619*4882a593Smuzhiyun 		return;
1620*4882a593Smuzhiyun 
1621*4882a593Smuzhiyun 	/* we'll submit tx->next now, so clear the link */
1622*4882a593Smuzhiyun 	txd_clear_next(tx);
1623*4882a593Smuzhiyun 	chan = dep->chan;
1624*4882a593Smuzhiyun 
1625*4882a593Smuzhiyun 	/* keep submitting up until a channel switch is detected
1626*4882a593Smuzhiyun 	 * in that case we will be called again as a result of
1627*4882a593Smuzhiyun 	 * processing the interrupt from async_tx_channel_switch
1628*4882a593Smuzhiyun 	 */
1629*4882a593Smuzhiyun 	for (; dep; dep = dep_next) {
1630*4882a593Smuzhiyun 		txd_lock(dep);
1631*4882a593Smuzhiyun 		txd_clear_parent(dep);
1632*4882a593Smuzhiyun 		dep_next = txd_next(dep);
1633*4882a593Smuzhiyun 		if (dep_next && dep_next->chan == chan)
1634*4882a593Smuzhiyun 			txd_clear_next(dep); /* ->next will be submitted */
1635*4882a593Smuzhiyun 		else
1636*4882a593Smuzhiyun 			dep_next = NULL; /* submit current dep and terminate */
1637*4882a593Smuzhiyun 		txd_unlock(dep);
1638*4882a593Smuzhiyun 
1639*4882a593Smuzhiyun 		dep->tx_submit(dep);
1640*4882a593Smuzhiyun 	}
1641*4882a593Smuzhiyun 
1642*4882a593Smuzhiyun 	chan->device->device_issue_pending(chan);
1643*4882a593Smuzhiyun }
1644*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(dma_run_dependencies);
1645*4882a593Smuzhiyun 
dma_bus_init(void)1646*4882a593Smuzhiyun static int __init dma_bus_init(void)
1647*4882a593Smuzhiyun {
1648*4882a593Smuzhiyun 	int err = dmaengine_init_unmap_pool();
1649*4882a593Smuzhiyun 
1650*4882a593Smuzhiyun 	if (err)
1651*4882a593Smuzhiyun 		return err;
1652*4882a593Smuzhiyun 
1653*4882a593Smuzhiyun 	err = class_register(&dma_devclass);
1654*4882a593Smuzhiyun 	if (!err)
1655*4882a593Smuzhiyun 		dmaengine_debugfs_init();
1656*4882a593Smuzhiyun 
1657*4882a593Smuzhiyun 	return err;
1658*4882a593Smuzhiyun }
1659*4882a593Smuzhiyun arch_initcall(dma_bus_init);
1660