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/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c78 /* Array of Deskew results */ in ddr3_pbs_tx()
257 * Bit# Deskew <- Bit# Deskew - in ddr3_pbs_tx()
259 * Deskew For all bits (per PUP) in ddr3_pbs_tx()
305 …/* Bit# Deskew <- Bit# Deskew - last / first failing bit Deskew For all bits (per PUP) (minimize … in ddr3_pbs_tx()
357 * Bit# Deskew <- Bit# Deskew - last / first in ddr3_pbs_tx()
358 * failing bit Deskew For all bits (per PUP) in ddr3_pbs_tx()
768 * Bit# Deskew <- Bit# Deskew - in ddr3_pbs_rx()
770 * Deskew For all bits (per PUP) in ddr3_pbs_rx()
838 * Bit# Deskew <- Bit# Deskew - last / first in ddr3_pbs_rx()
839 * failing bit Deskew For all bits (per PUP) in ddr3_pbs_rx()
[all …]
H A Dddr3_write_leveling.c487 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_hw_reg_dimm()
607 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_hw_reg_dimm()
636 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_hw_reg_dimm()
903 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_sw_reg_dimm()
1102 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_sw_reg_dimm()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/
H A Dti,tfp410.yaml24 ti,deskew:
93 ti,deskew: false
96 - ti,deskew
107 ti,deskew = <3>;
/OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/dram/
H A Dddrmphy-regs.h28 #define MPHY_PIR_RDDSKW BIT(12) /* Read Data Bit Deskew */
29 #define MPHY_PIR_WRDSKW BIT(13) /* Write Data Bit Deskew */
51 #define MPHY_PGSR0_RDDONE BIT(8) /* Read Bit Deskew Done */
52 #define MPHY_PGSR0_WDDONE BIT(9) /* Write Bit Deskew Done */
59 #define MPHY_PGSR0_RDERR BIT(24) /* Read Bit Deskew Error */
60 #define MPHY_PGSR0_WDERR BIT(25) /* Write Bit Deskew Error */
H A Dddrphy-regs.h27 #define PHY_PIR_RDDSKW BIT(12) /* Read Data Bit Deskew */
28 #define PHY_PIR_WRDSKW BIT(13) /* Write Data Bit Deskew */
47 #define PHY_PGSR0_RDDONE BIT(8) /* Read Bit Deskew Done */
48 #define PHY_PGSR0_WDDONE BIT(9) /* Write Bit Deskew Done */
55 #define PHY_PGSR0_RDERR BIT(24) /* Read Bit Deskew Error */
56 #define PHY_PGSR0_WDERR BIT(25) /* Write Bit Deskew Error */
H A Dddrphy-training.c35 /* Specify the rank used during data bit deskew and eye centering */ in ddrphy_prepare_training()
79 "Read Bit Deskew",
85 "Write Bit Deskew",
H A Dumc-pxs2.c284 "Read Bit Deskew",
290 "Write Bit Deskew",
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A Dti-tfp410.c228 u32 deskew = 0; in tfp410_parse_timings() local
282 of_property_read_u32(dvi->dev->of_node, "ti,deskew", &deskew); in tfp410_parse_timings()
283 if (deskew > 7) in tfp410_parse_timings()
286 timings->setup_time_ps = 1200 - 350 * ((s32)deskew - 4); in tfp410_parse_timings()
287 timings->hold_time_ps = max(0, 1300 + 350 * ((s32)deskew - 4)); in tfp410_parse_timings()
H A Dmaxim-max96755f.c440 ser->dpi_deskew_en = of_property_read_bool(np, "dpi-deskew-en"); in max96755f_link_parse()
/OK3568_Linux_fs/kernel/drivers/staging/comedi/drivers/
H A Dz8536.h137 #define Z8536_PAB_MODE_DTE BIT(0) /* Deskew Timer Enabled */
156 #define Z8536_PAB_HANDSHAKE_DESKEW(x) ((x) << 0)/* Deskew Time */
157 #define Z8536_PAB_HANDSHAKE_DESKEW_MASK (3 << 0)/* Deskew Time mask */
/OK3568_Linux_fs/kernel/drivers/devfreq/
H A Drockchip_dmc_dbg.c30 #define PROC_DMCDBG_DESKEW "deskew"
683 /* get deskew information */ in skew_proc_show()
724 "echo group_number=value > /proc/dmcdbg/deskew\n" in skew_proc_show()
726 " echo 0_1=8 > /proc/dmcdbg/deskew\n" in skew_proc_show()
729 "echo group_number=value,group_number=value,... > /proc/dmcdbg/deskew\n" in skew_proc_show()
731 " echo 0_1=8,1_2=8 > /proc/dmcdbg/deskew\n" in skew_proc_show()
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588-vehicle-maxim-cameras-s66.dtsi247 auto-init-deskew-mask = <0x3>;
277 auto-init-deskew-mask = <0x3>;
H A Drk3588-vehicle-evb-maxim-max96712.dtsi67 auto-init-deskew-mask = <0x03>;
H A Drk3588-vehicle-evb-maxim-max96722.dtsi67 auto-init-deskew-mask = <0x03>;
/OK3568_Linux_fs/kernel/kernel/gcov/
H A Dfs.c355 static const char *deskew(const char *basename) in deskew() function
387 node->links[i] = debugfs_create_symlink(deskew(basename), in add_links()
446 node->dentry = debugfs_create_file(deskew(node->name), 0600, in new_node()
/OK3568_Linux_fs/u-boot/drivers/ddr/fsl/
H A Dfsl_ddr_gen4.c234 /* disable transmit bit deskew */ in fsl_ddr_set_memctl_regs()
368 temp32 &= ~DDR_TX_BD_DIS; /* Enable deskew */ in fsl_ddr_set_memctl_regs()
370 ddr_out32(&ddr->debug[1], 0x400); /* restart deskew */ in fsl_ddr_set_memctl_regs()
/OK3568_Linux_fs/kernel/drivers/media/i2c/
H A Dmax96712.c12 * auto initial deskew enable configure.
901 dev_info(dev, "Auto initial deskew: deskew_mask = 0x%02x\n", deskew_mask); in max96712_auto_init_deskew()
903 // D-PHY Deskew Initial Calibration Control in max96712_auto_init_deskew()
1871 /* auto initial deskew mask */ in max96712_parse_dt()
1872 ret = of_property_read_u32(node, "auto-init-deskew-mask", in max96712_parse_dt()
1876 dev_info(dev, "auto init deskew mask: 0x%02x\n", max96712->auto_init_deskew_mask); in max96712_parse_dt()
H A Dmax96722.c919 dev_info(dev, "Auto initial deskew: deskew_mask = 0x%02x\n", deskew_mask); in max96722_auto_init_deskew()
921 // D-PHY Deskew Initial Calibration Control in max96722_auto_init_deskew()
1871 /* auto initial deskew mask */ in max96722_parse_dt()
1872 ret = of_property_read_u32(node, "auto-init-deskew-mask", in max96722_parse_dt()
1876 dev_info(dev, "auto init deskew mask: 0x%02x\n", max96722->auto_init_deskew_mask); in max96722_parse_dt()
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Dmax96755f.c192 priv->dpi_deskew_en = dev_read_bool(dev, "dpi-deskew-en"); in max96755f_bridge_probe()
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_phy_px30.c197 /* deskew */ in phy_cfg()
/OK3568_Linux_fs/u-boot/include/
H A Dfsl_ddr_sdram.h198 #define DDR_TX_BD_DIS (1 << 10) /* Transmit Bit Deskew Disable */
/OK3568_Linux_fs/u-boot/drivers/ddr/altera/
H A Dsequencer.c2380 * rw_mgr_mem_calibrate_vfifo_center() - Per-bit deskew DQ and centering
2387 * Per-bit deskew DQ and centering.
2646 * Read per-bit deskew can be done on a per shadow register basis. in rw_mgr_mem_calibrate_dq_dqs_centering()
2681 * - we also do a per-bit deskew on the DQ lines.
2944 * Center all windows. Do per-bit-deskew to possibly increase size of
2976 /* Per-bit deskew. */ in rw_mgr_mem_calibrate_writes_center()
/OK3568_Linux_fs/kernel/drivers/scsi/
H A DNCR5380.c1099 * The initiator shall then wait at least two deskew delays and release in NCR5380_select()
1102 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ in NCR5380_select()
1122 * one deskew delay. in NCR5380_select()
1162 * No less than two deskew delays after the initiator detects the in NCR5380_select()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Ddw-mipi-dsi2-rockchip.c598 * initial deskew calibration be sent. in dw_mipi_dsi2_phy_clk_mode_cfg()
817 * initial deskew calibration is send after phy_power_on, in dw_mipi_dsi2_pre_enable()
/OK3568_Linux_fs/kernel/drivers/scsi/bfa/
H A Dbfi_ms.h292 __be32 deskew; member

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